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*.asc
*.blif
*.swp
*.json
*.o
*.oo

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[submodule "src/advanced/up5k_6502"]
path = src/advanced/up5k_6502
url = https://github.com/wuxx/up5k_6502.git
[submodule "src/advanced/litex-buildenv"]
path = src/advanced/litex-buildenv
url = https://github.com/wuxx/litex-buildenv.git
[submodule "src/advanced/usb"]
path = src/advanced/usb
url = https://github.com/wuxx/up5k.git

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iCESugar
-----------
* [iCESugar介绍](#iCESugar介绍)
* [芯片规格](#芯片规格)
* [硬件说明](#硬件说明)
* [iCE40UP5K](iCE40UP5K)
* [iCELink](iCELink)
* [资源下载](#虚拟机镜像)
* [开发环境搭建](#开发环境搭建)
* [视频教程](#视频教程)
* [FPGA教程](#fpga教程)
* [参考](#参考)
# iCESugar介绍
iCESugar 是MuseLab基于Lattice iCE40UP5K设计的开源FPGA开发板开发板小巧精致资源丰富板载RGB LEDSwitchTYPE-C-USB, Micro-USB大部分IO以标准PMOD接口引出可与标准PMOD外设进行对接方便日常的开发使用。
板载的调试器iCELink经过精心设计支持拖拽烧录用户只需将综合出的FPGA bitstream文件拖拽至虚拟U盘中即可实现烧录。iCELink亦支持虚拟串口以和FPGA进行通信同时引出JTAG接口方便用户对FPGA上实现的SoC进行调试。
Lattice的iCE40系列芯片在国外的开源创客社区中拥有大量拥趸其所有的开发软件环境亦均为开源。一般来说假若您使用Xilinx或者Altera系列的开发板您需要安装复杂臃肿的IDE开发环境(而且一般为盗版,使用存在一定法律风险), 在未开始开发前首先还先需要学会如何操作其复杂的IDE。 iCESugar则使用完全开源的工具链进行开发包括FPGA综合yosys布线arachne-pnr & nextpnr, 打包烧录icestorm编译gcc只需在Linux下输入数条命令即可将整套工具链轻松安装随后即可开始您的FPGA之旅而且这一切都是开源的您可仔细研究整个过程中任何一个细节的实现非常适合个人研究学习对于有丰富经验的开发者亦可用来作为快速的逻辑验证平台。典型的基于iCE40系列的开源开发板有iCEBreaker、UPduino、BlackIce、iCEstick、TinyFPGA 等社区中拥有丰富的demo可用于验证测试或者作为自己开发学习的参考。
![icesugar_render](https://github.com/wuxx/icesugar/blob/master/doc/iCESugar_render.jpg)
![icesugar](https://github.com/wuxx/icesugar/blob/master/doc/iCESugar.jpg)
# 芯片规格
iCE40UP5K-SG48
1. 5280 Logic Cells (4-LUT + Carry + FF)
2. 128 KBit Dual-Port Block RAM
3. 1 MBit (128 KB) Single-Port RAM
4. PLL, Two SPI and two I2C hard IPs
5. Two internal oscillators (10 kHz and 48 MHz)
6. 8 DSPs (16x16 multiply + 32 bit accumulate)
7. 3x 24mA drive and 3x hard PWM IP
# 硬件说明
### iCE40UP5K
1. SPI Flash使用W25Q648MB
2. 板载拨码开关和RGB LED可用于测试
3. 所有IO以标准PMOD接口引出可用于开发调试
### iCELink
iCESugar实现了一个板载的调试器iCELink您可仅用一根USB线便可实现FPGA的烧录和调试具体功能说明如下
1. 拖拽烧录将综合布线打包生成的bin文件一般称之为配置或者逻辑拖拽到iCELink的虚拟U盘中即可实现烧录
2. 虚拟串口可用于和FPGA直接数据的发送接收
3. 支持JTAG, 可对FPGA上实现的SoC进行调试
4. 通过MCO输出12Mhz时钟作为FPGA的外部时钟
# 虚拟机镜像
链接https://pan.baidu.com/s/1qVSdwM7DnFbaS0xdqsPNrA
提取码6gn3
`user: ubuntu`
`passwd: ubuntu`
所有环境包括综合(yosys),布线(nextpnr),打包(icesorm),编译器(gcc) 已经预制好,启动即可开始使用。
# 开发环境搭建
推荐使用虚拟机镜像进行开发测试,简单方便。
FPGA工具链安装请参考[icestorm](http://www.clifford.at/icestorm/)
gcc工具链安装请参考 [riscv-gnu-toolchain](https://pingu98.wordpress.com/2019/04/08/how-to-build-your-own-cpu-from-scratch-inside-an-fpga/)
# 视频教程
- [开源FPGA开发板-硬件介绍](https://www.bilibili.com/video/av85029350?from=search&seid=17750023774521991972)
- [开源FPGA开发板-开发环境搭建](https://www.bilibili.com/video/av85146557?from=search&seid=17750023774521991972)
- [开源FPGA开发板-RISC-V SoC烧录演示](https://www.bilibili.com/video/av90891200?from=search&seid=17750023774521991972)
# FPGA教程
强烈推荐学习此教程,`src/basic/open-fpga-verilog-tutorial`目录中有对应的例程
[open-fpga-verilog-tutorial](https://github.com/Obijuan/open-fpga-verilog-tutorial/wiki/Home_EN)
# 参考
### toolchain
http://www.clifford.at/icestorm/
### examples
https://github.com/damdoy/ice40_ultraplus_examples
https://github.com/icebreaker-fpga/icebreaker-examples
### 开源FPGA单板iCESugar介绍
https://www.muselab-tech.com/wan-quan-shi-yong-kai-yuan-gong-ju-lian-de-fpgadan-ban/

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#!/bin/bash
CURRENT_DIR=$(cd $(dirname $0); pwd)
cd $CURRENT_DIR/../src/basic
DEMOS=$(ls)
echo $DEMOS
for DEMO in $DEMOS
do
echo "DEMO $DEMO"
cd ${DEMO} && make && cd ..
cp ${DEMO}/*.bin $CURRENT_DIR/${DEMO}.bin
done

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*.bin

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# picorv32 (commit-id e308982e)
https://github.com/cliffordwolf/picorv32.git
## build & run
`picocom -b 115200 /dev/ttyACM0`
`make icesprog`
# icicle (commit-id c653af1d)
https://github.com/grahamedgecombe/icicle.git
## build & run
`picocom -b 9600 /dev/ttyACM0`
`make BOARD=icesugar flash`
# litex-fupy (commit-id d6cffe26)
https://github.com/wuxx/litex-buildenv.git
## build
`picocom -b 115200 /dev/ttyACM0`
`./build_micropython.sh`
## how to test: connect the P27 to a LED
>>import litex
>>l = litex.LED(1)
>>l.on()
>>l.off()
# up5k_6502 (commit-id 18610cb)
https://github.com/emeb/up5k_6502.git
## build & run
`picocom -b 9600 /dev/ttyACM0`
`cd icestorm && make && make prog`
# usb
https://github.com/wuxx/up5k.git
## build & run
`cd usb/usb && ./build.sh && icesprog serial-demo.bin`

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.*
*~
*.asc
*.bin
*.blif
*.hex
*.json
*.o
*.rpt
*.stat
*.svf
/checks
/disasm.s
/pll.sv
/defines.sv
/progmem
/progmem.lds
/start.s
!.git*
!.mailmap

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image: gitlab-registry.grahamedgecombe.com/gpe/icestorm-docker:latest
stages:
- build
build:
stage: build
script:
- make YS_ICE40=/usr/share/yosys/ice40/cells_sim.v syntax time stat

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Copyright (c) 2017-2018 Graham Edgecombe <gpe@grahamedgecombe.com>
Permission to use, copy, modify, and/or distribute this software for any
purpose with or without fee is hereby granted, provided that the above
copyright notice and this permission notice appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.

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.DEFAULT_GOAL = all
QUIET = -q
PLL = pll.sv
SRC = $(sort $(wildcard *.sv) $(PLL))
TOP = top
SV = $(TOP).sv
YS = $(ARCH).ys
YS_ICE40 = `yosys-config --datdir/$(ARCH)/cells_sim.v`
BLIF = $(TOP).blif
JSON = $(TOP).json
ASC_SYN = $(TOP)_syn.asc
ASC = $(TOP).asc
BIN = $(TOP).bin
SVF = $(TOP).svf
TIME_RPT = $(TOP).rpt
STAT = $(TOP).stat
BOARD ?= ice40hx8k-b-evn
PROGRAM ?= hello
C_SRC = $(filter-out programs/uip/fsdata.c, $(wildcard programs/$(PROGRAM)/*.c))
OBJ = $(sort $(addsuffix .o, $(basename $(C_SRC))) start.o)
TARGET ?= riscv64-unknown-elf
AS = $(TARGET)-as
ASFLAGS = -march=rv32i -mabi=ilp32
LD = $(TARGET)-gcc
LDFLAGS = $(CFLAGS) -Wl,-Tprogmem.lds
CC = $(TARGET)-gcc
CFLAGS = -march=rv32i -mabi=ilp32 -Wall -Wextra -pedantic -DFREQ=$(FREQ_PLL)000000 -Os -ffreestanding -nostartfiles -g -Iprograms/$(PROGRAM)
OBJCOPY = $(TARGET)-objcopy
include boards/$(BOARD).mk
include arch/$(ARCH).mk
.PHONY: all clean syntax time stat flash
all: $(BIN)
clean:
$(RM) $(BLIF) $(JSON) $(ASC_SYN) $(ASC) $(BIN) $(SVF) $(PLL) $(TIME_RPT) $(STAT) $(OBJ) progmem_syn.hex progmem.hex progmem.bin start.o start.s progmem progmem.lds defines.sv
progmem.bin: progmem
$(OBJCOPY) -O binary $< $@
progmem.hex: progmem.bin
xxd -p -c 4 < $< > $@
image:
truncate -s 1048576 top.bin
cat top.bin progmem.bin > icicle.bin
progmem: $(OBJ) progmem.lds
$(LD) $(LDFLAGS) -o $@ $(OBJ)
$(BLIF) $(JSON): $(YS) $(SRC) progmem_syn.hex progmem.hex defines.sv
yosys $(QUIET) $<
syntax: $(SRC) progmem_syn.hex defines.sv
iverilog -D$(shell echo $(ARCH) | tr 'a-z' 'A-Z') -Wall -t null -g2012 $(YS_ICE40) $(SV)
defines.sv: boards/$(BOARD)-defines.sv
cp boards/$(BOARD)-defines.sv defines.sv
start.s: start-$(PROGMEM).s
cp $< $@
progmem.lds: arch/$(ARCH)-$(PROGMEM).lds
cp $< $@
time: $(TIME_RPT)
cat $<
stat: $(STAT)
cat $<

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# Icicle
## Introduction
Icicle is a 32-bit [RISC-V][riscv] system on chip for [iCE40 HX8K][ice40],
[iCE40 UP5K][ice40-up5k] and [ECP5][ecp5] FPGAs. It can be built with the
open-source [SymbiFlow][symbiflow] toolchain and currently targets several
development boards.
## Current features
* RV32I core with a [classic 5-stage RISC pipeline][classic-risc], static branch
prediction, bypassing and interlocking. It currently implements the entire
[user ISA][riscv-user] parts of the [privileged ISA][riscv-priv].
* Shared instruction and data memory (8 KiB, implemented with FPGA block RAM).
* Memory-mapped UART and LEDs.
* Memory-mapped SPI flash.
## Dependencies
* [GNU Make][make]
* [GNU RISC-V toolchain][riscv-gnu]
* [Icarus Verilog][iverilog] (`master` branch)
* [nextpnr][nextpnr] or [arachne-pnr][arachne-pnr]
* [Project IceStorm][icestorm] or [Project Trellis][trellis]
* [vim][vim] (for `xxd`)
* [Yosys][yosys] (`master` branch)
## Building and testing
### Supported boards
Icicle supports several development boards:
* `blackice-ii`: [BlackIce II][blackice-ii-board]
* `ecp5-evn`: [ECP5 evaluation board][ecp5-evn]
* `ice40hx8k-b-evn`: [iCE40-HX8K breakout board][ice40-hx8k-breakout]
* `icebreaker`: [iCEBreaker][icebreaker]
* `upduino`: [UPduino][upduino]
`<board>` should be replaced with the internal name of your development board in
the rest of the instructions (e.g. `ice40hx8k-b-evn` for the iCE40-HX8K breakout
board).
### Building
* Run `make BOARD=<board> syntax` to check the syntax with [Icarus][iverilog],
which has a stricter parser than [Yosys][yosys]. At the time of writing the
`master` branch of Icarus is required as there isn't a stable release with
`always_comb`/`always_ff` support yet.
* Run `make BOARD=<board>` to synthesize the design, place and route, compile
the demo program in `progmem.c` and create the bitstream.
### Programming
#### BlackIce II
* Configure jumper on board for [DFU Mode][dfu-mode] and connect both USB1 and
USB2 on the board to host USB ports.
* Run `make BOARD=blackice-ii dfu-flash` to flash the bitstream.
#### ECP5 evaluation board
* Remove R22, R23 and R24 to disconnect the channel B of the FTDI chip from the
I2C bus.
* Populate R34 and R35 with zero-ohm resistors to connect channel B of the FTDI
chip to the UART RX and TX pins.
* Optionally populate R21 with a zero-ohm resistor to enable the UART TX
indicator LED.
#### iCE40-HX8K breakout board
* Configure the jumpers for flash programming.
* Run `make BOARD=ice40hx8k-b-evn flash` to flash the bitstream.
### Testing
* If your chosen board has built-in LEDs, some of the LEDs should turn on.
* Run `picocom -b 9600 /dev/ttyUSBn` (replacing `ttyUSBn` with the name of the
serial port) to connect to the serial port. `Hello, world!` should be printed
once per second.
### Other targets
The `make BOARD=<board> stat` target runs `icebox_stat` and the
`make BOARD=<board> time` target prints the `icetime` report.
The `Makefile` runs the [IceStorm][icestorm] toolchain in quiet mode. Unset the
`QUIET` variable to run the toolchain in verbose mode - e.g.
`make BOARD=<board> QUIET= ...`.
Set the `PNR` variable to `arachne-pnr` to use [arachne-pnr][arachne-pnr]
instead of [nextpnr][nextpnr] (the default) - e.g. `make PNR=arachne-pnr`.
## Formal verification
Icicle supports the RISC-V Formal Interface (RVFI), allowing it to be formally
verified with [SymbiYosys][symbiyosys] and [riscv-formal][riscv-formal]:
* Run `git clone https://github.com/SymbioticEDA/riscv-formal` to clone
riscv-formal.
* Run `cd riscv-formal/cores && git clone https://github.com/grahamedgecombe/icicle`
to clone Icicle in the `cores` subdirectory.
* Run ``cd icicle && python ../../checks/genchecks.py && make -C checks -j `nproc```
to verify the core.
## Planned features
* Use remaining block RAM tiles to eke out as much memory as possible.
* Use the SPRAM tiles on UP5K devices.
* Implement remaining bits of the user ISA.
* Implement machine mode from the privileged ISA.
* Interrupts/exceptions.
* Unaligned memory access support.
* Memory-mapped GPIOs.
* Add XIP, DDR, DSPI and QSPI support to the SPI flash controller.
* Improved reset support (a reset signal + boot ROM to zero all the registers).
* Automated tests.
* Multiply/divide support.
* Compressed instruction support.
* Add flags to disable certain features (e.g. privileged mode) to save LUTs on
smaller devices (e.g. the UP5K).
* Investigate using DSP tiles on the UP5K.
## Size and performance
The entire system on chip currently occupies around 3,000 LUTs on an iCE40 when
synthesized with [Yosys][yosys].
If bypassing and branch prediction are disabled [nextpnr][nextpnr] estimates it
can be clocked at around 50 MHz on a HX series device and 20 MHz on a UP series
device.
The core is capable of issuing and retiring one instruction per clock cycle,
although the actual number of instructions per cycle will be slightly less than
this in practice due to interlocking, branch mispredictions and the shared
memory bus.
## License
This project is available under the terms of the ISC license, which is similar
to the 2-clause BSD license. See the `LICENSE` file for the copyright
information and licensing terms.
[arachne-pnr]: https://github.com/cseed/arachne-pnr#readme
[blackice-ii-board]: https://github.com/mystorm-org/BlackIce-II#readme
[classic-risc]: https://en.wikipedia.org/wiki/Classic_RISC_pipeline
[dfu-mode]: https://github.com/mystorm-org/BlackIce-II/wiki/DFU-operations-on-the-BlackIce-II
[ecp5-evn]: https://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/ECP5EvaluationBoard.aspx
[ecp5]: https://www.latticesemi.com/Products/FPGAandCPLD/ECP5.aspx
[ice40-hx8k-breakout]: https://www.latticesemi.com/Products/DevelopmentBoardsAndKits/iCE40HX8KBreakoutBoard.aspx
[ice40-up5k]: https://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra.aspx
[ice40]: https://www.latticesemi.com/Products/FPGAandCPLD/iCE40.aspx
[icebreaker]: https://github.com/icebreaker-fpga/
[icestorm]: http://www.clifford.at/icestorm/
[iverilog]: http://iverilog.icarus.com/
[make]: https://www.gnu.org/software/make/
[nextpnr]: https://github.com/YosysHQ/nextpnr#readme
[riscv-formal]: https://github.com/SymbioticEDA/riscv-formal
[riscv-gnu]: https://github.com/riscv/riscv-gnu-toolchain#readme
[riscv-priv]: https://riscv.org/specifications/privileged-isa/
[riscv-user]: https://riscv.org/specifications/
[riscv]: https://riscv.org/risc-v-isa/
[symbiflow]: https://symbiflow.github.io/
[symbiyosys]: https://symbiyosys.readthedocs.io/
[trellis]: https://github.com/SymbiFlow/prjtrellis#readme
[upduino]: http://gnarlygrey.atspace.cc/development-platform.html#upduino
[vim]: https://www.vim.org/
[yosys]: http://www.clifford.at/yosys/

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ENTRY(start)
MEMORY {
bram (rwx) : ORIGIN = 0x00000000, LENGTH = 32K
flash (rx) : ORIGIN = 0x01100000, LENGTH = 3M
}
SECTIONS {
.text : {
start.o(.text);
*(.text);
*(.text.*);
} > flash
.data : ALIGN(4) {
*(.data);
*(.data.*);
. = ALIGN(4);
} > bram AT> flash
.rodata : {
*(.rodata);
*(.rodata.*);
} > flash
.bss : ALIGN(4) {
*(.bss);
*(.bss.*);
. = ALIGN(4);
} > bram
bss_start = ADDR(.bss);
bss_end = bss_start + SIZEOF(.bss);
data_flash_start = LOADADDR(.data);
data_start = ADDR(.data);
data_end = data_start + SIZEOF(.data);
stack_top = ORIGIN(bram) + LENGTH(bram);
}

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ENTRY(start)
MEMORY {
bram (rwx) : ORIGIN = 0x00000000, LENGTH = 32K
}
SECTIONS {
.text : {
start.o(.text);
*(.text);
*(.text.*);
} > bram
.data : {
*(.data);
*(.data.*);
} > bram
.rodata : {
*(.rodata);
*(.rodata.*);
} > bram
.bss : ALIGN(4) {
*(.bss);
*(.bss.*);
. = ALIGN(4);
} > bram
bss_start = ADDR(.bss);
bss_end = bss_start + SIZEOF(.bss);
stack_top = ORIGIN(bram) + LENGTH(bram);
}

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LPF = boards/$(BOARD).lpf
FREQ_PLL = 80
progmem_syn.hex:
touch $@
$(PLL):
ecppll -i $(FREQ_OSC) -o $(FREQ_PLL) -f $@
$(ASC_SYN): $(JSON) $(LPF)
nextpnr-ecp5 $(QUIET) --$(DEVICE) --speed $(SPEED) --package $(PACKAGE) --json $< --lpf $(LPF) --freq $(FREQ_PLL) --textcfg $@
$(ASC): $(ASC_SYN) progmem_syn.hex progmem.hex
cp $< $@
$(BIN) $(SVF): $(ASC)
ecppack --svf $(SVF) $< $@
$(TIME_RPT):
touch $@
$(STAT):
touch $@
flash: $(SVF) $(TIME_RPT)
openocd -f boards/$(BOARD)-openocd.cfg -c 'transport select jtag; init; svf $<; exit'

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ENTRY(start)
MEMORY {
bram (rwx) : ORIGIN = 0x00000000, LENGTH = 8K
flash (rx) : ORIGIN = 0x01100000, LENGTH = 3M
}
SECTIONS {
.text : {
start.o(.text);
*(.text);
*(.text.*);
} > flash
.data : ALIGN(4) {
*(.data);
*(.data.*);
. = ALIGN(4);
} > bram AT> flash
.rodata : {
*(.rodata);
*(.rodata.*);
} > flash
.bss : ALIGN(4) {
*(.bss);
*(.bss.*);
. = ALIGN(4);
} > bram
bss_start = ADDR(.bss);
bss_end = bss_start + SIZEOF(.bss);
data_flash_start = LOADADDR(.data);
data_start = ADDR(.data);
data_end = data_start + SIZEOF(.data);
stack_top = ORIGIN(bram) + LENGTH(bram);
}

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@@ -0,0 +1,35 @@
ENTRY(start)
MEMORY {
bram (rwx) : ORIGIN = 0x00000000, LENGTH = 8K
}
SECTIONS {
.text : {
start.o(.text);
*(.text);
*(.text.*);
} > bram
.data : {
*(.data);
*(.data.*);
} > bram
.rodata : {
*(.rodata);
*(.rodata.*);
} > bram
.bss : ALIGN(4) {
*(.bss);
*(.bss.*);
. = ALIGN(4);
} > bram
bss_start = ADDR(.bss);
bss_end = bss_start + SIZEOF(.bss);
stack_top = ORIGIN(bram) + LENGTH(bram);
}

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@@ -0,0 +1,47 @@
PNR ?= nextpnr
PCF = boards/$(BOARD).pcf
ifeq ($(SPEED),up)
FREQ_PLL = 16
else
FREQ_PLL = 48
endif
progmem_syn.hex:
icebram -g 32 2048 > $@
$(PLL):
icepll $(QUIET) -i $(FREQ_OSC) -o $(FREQ_PLL) -m -f $@
ifeq ($(PNR),arachne-pnr)
$(ASC_SYN): $(BLIF) $(PCF)
arachne-pnr $(QUIET) -d $(DEVICE) -P $(PACKAGE) -o $@ -p $(PCF) $<
else
$(ASC_SYN): $(JSON) $(PCF)
nextpnr-ice40 $(QUIET) --$(SPEED)$(DEVICE) --package $(PACKAGE) --json $< --pcf $(PCF) --freq $(FREQ_PLL) --asc $@
endif
$(ASC): $(ASC_SYN) progmem_syn.hex progmem.hex
ifeq ($(PROGMEM),ram)
icebram progmem_syn.hex progmem.hex < $< > $@
else
cp $< $@
endif
$(BIN): $(ASC)
ifeq ($(PROGMEM),flash)
icepack -s $< $@
else
icepack $< $@
endif
$(TIME_RPT): $(ASC_SYN) $(PCF)
icetime -t -m -d $(SPEED)$(DEVICE) -P $(PACKAGE) -p $(PCF) -c $(FREQ_PLL) -r $@ $<
$(STAT): $(ASC_SYN)
icebox_stat $< > $@
flash: $(BIN) progmem.bin #$(TIME_RPT)
icesprog $<
ifeq ($(PROGMEM),flash)
icesprog -o 0x100000 progmem.bin
endif

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@@ -0,0 +1 @@
// Defines for BlackIce-II

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@@ -0,0 +1,10 @@
ARCH = ice40
SPEED = hx
DEVICE = 8k
PACKAGE = tq144:4k
FREQ_OSC = 100
PROGMEM = ram
# Flash to BlackIce-II board
dfu-flash: $(BIN) $(TIME_RPT)
dfu-util -d 0483:df11 --alt 0 --dfuse-address 0x0801F000 -D $(BIN)

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@@ -0,0 +1,21 @@
set_io clk 129
set_io leds[0] 70
set_io leds[1] 68
set_io leds[2] 67
set_io leds[3] 71
# Connected to regular GPIOs, not LEDs
set_io leds[4] 20
set_io leds[5] 19
set_io leds[6] 16
set_io leds[7] 15
set_io uart_rx 88
set_io uart_tx 85
# set flash_* sigs to unused pmod 2 pins
# set_io flash_clk 95
# set_io flash_csn 93
# set_io flash_io0 90
# set_io flash_io1 87

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@@ -0,0 +1 @@
// Defines for ECP5 evaluation board

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@@ -0,0 +1,15 @@
# this supports ECP5 Evaluation Board
interface ftdi
ftdi_vid_pid 0x0403 0x6010
# channel 1 does not have any functionality
ftdi_channel 0
# just TCK TDI TDO TMS, no reset
ftdi_layout_init 0xfff8 0xfffb
reset_config none
# default speed
adapter_khz 5000
# ECP5 device - LFE5UM5G-85F
jtag newtap ecp5 tap -irlen 8 -expected-id 0x81113043

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@@ -0,0 +1,31 @@
LOCATE COMP "clk" SITE "A10";
LOCATE COMP "flash_clk" SITE "U3";
LOCATE COMP "flash_csn" SITE "R2";
LOCATE COMP "flash_io0" SITE "W2";
LOCATE COMP "flash_io1" SITE "V2";
LOCATE COMP "leds[0]" SITE "B17";
LOCATE COMP "leds[1]" SITE "A17";
LOCATE COMP "leds[2]" SITE "C17";
LOCATE COMP "leds[3]" SITE "B18";
LOCATE COMP "leds[4]" SITE "A18";
LOCATE COMP "leds[5]" SITE "B19";
LOCATE COMP "leds[6]" SITE "A12";
LOCATE COMP "leds[7]" SITE "A13";
LOCATE COMP "uart_tx" SITE "P3";
LOCATE COMP "uart_rx" SITE "P2";
IOBUF PORT "clk" IO_TYPE=LVCMOS33;
IOBUF PORT "flash_clk" IO_TYPE=LVCMOS33;
IOBUF PORT "flash_csn" IO_TYPE=LVCMOS33;
IOBUF PORT "flash_io0" IO_TYPE=LVCMOS33;
IOBUF PORT "flash_io1" IO_TYPE=LVCMOS33;
IOBUF PORT "leds[0]" IO_TYPE=LVCMOS25;
IOBUF PORT "leds[1]" IO_TYPE=LVCMOS25;
IOBUF PORT "leds[2]" IO_TYPE=LVCMOS25;
IOBUF PORT "leds[3]" IO_TYPE=LVCMOS25;
IOBUF PORT "leds[4]" IO_TYPE=LVCMOS25;
IOBUF PORT "leds[5]" IO_TYPE=LVCMOS25;
IOBUF PORT "leds[6]" IO_TYPE=LVCMOS25;
IOBUF PORT "leds[7]" IO_TYPE=LVCMOS25;
IOBUF PORT "uart_tx" IO_TYPE=LVCMOS33;
IOBUF PORT "uart_rx" IO_TYPE=LVCMOS33;

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@@ -0,0 +1,6 @@
ARCH = ecp5
SPEED = 8
DEVICE = um5g-85k
PACKAGE = CABGA381
FREQ_OSC = 12
PROGMEM = ram

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@@ -0,0 +1,2 @@
// Defines for iCE40-HX8K breakout board
`define SPI_FLASH

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@@ -0,0 +1,6 @@
ARCH = ice40
SPEED = hx
DEVICE = 8k
PACKAGE = ct256
FREQ_OSC = 12
PROGMEM = flash

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@@ -0,0 +1,15 @@
set_io clk J3
set_io flash_clk R11
set_io flash_csn R12
set_io flash_io0 P12
set_io flash_io1 P11
set_io leds[0] C3
set_io leds[1] B3
set_io leds[2] C4
set_io leds[3] C5
set_io leds[4] A1
set_io leds[5] A2
set_io leds[6] B4
set_io leds[7] B5
set_io uart_rx B10
set_io uart_tx B12

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@@ -0,0 +1,3 @@
// Defines for iCEBreaker
`define SPI_FLASH
`define INTERNAL_OSC

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@@ -0,0 +1,6 @@
ARCH = ice40
SPEED = up
DEVICE = 5k
PACKAGE = sg48
FREQ_OSC = 48
PROGMEM = flash

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@@ -0,0 +1,66 @@
# 12 MHz clock
set_io -nowarn CLK 35
# RS232
set_io -nowarn uart_rx 6
set_io -nowarn uart_tx 9
# LEDs and Button
set_io -nowarn leds[0] 11
set_io -nowarn leds[1] 37
set_io -nowarn leds[2] 27
set_io -nowarn leds[3] 25
set_io -nowarn leds[4] 21
set_io -nowarn leds[5] 23
set_io -nowarn leds[6] 26
set_io -nowarn leds[7] 43
set_io -nowarn BTN_N 10
# RGB LED Driver
set_io -nowarn LED_RED_N 39
set_io -nowarn LED_GRN_N 40
set_io -nowarn LED_BLU_N 41
# SPI Flash
set_io -nowarn flash_clk 15
set_io -nowarn flash_csn 16
set_io -nowarn flash_io0 14
set_io -nowarn flash_io1 17
set_io -nowarn flash_io2 12
set_io -nowarn flash_io3 13
# PMOD 1A
set_io -nowarn P1A1 4
set_io -nowarn P1A2 2
set_io -nowarn P1A3 47
set_io -nowarn P1A4 45
set_io -nowarn P1A7 3
set_io -nowarn P1A8 48
set_io -nowarn P1A9 46
set_io -nowarn P1A10 44
# PMOD 1B
set_io -nowarn P1B1 43
set_io -nowarn P1B2 38
set_io -nowarn P1B3 34
set_io -nowarn P1B4 31
set_io -nowarn P1B7 42
set_io -nowarn P1B8 36
set_io -nowarn P1B9 32
set_io -nowarn P1B10 28
# PMOD 2
set_io -nowarn P2_1 27
set_io -nowarn P2_2 25
set_io -nowarn P2_3 21
set_io -nowarn P2_4 19
set_io -nowarn P2_7 26
set_io -nowarn P2_8 23
set_io -nowarn P2_9 20
set_io -nowarn P2_10 18
# LEDs and Buttons (PMOD 2)
set_io -nowarn BTN1 20
set_io -nowarn BTN2 19
set_io -nowarn BTN3 18

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@@ -0,0 +1,3 @@
// Defines for iCEBreaker
`define SPI_FLASH
`define INTERNAL_OSC

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@@ -0,0 +1,6 @@
ARCH = ice40
SPEED = up
DEVICE = 5k
PACKAGE = sg48
FREQ_OSC = 48
PROGMEM = flash

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@@ -0,0 +1,66 @@
# 12 MHz clock
set_io -nowarn CLK 35
# RS232
set_io -nowarn uart_rx 4
set_io -nowarn uart_tx 6
# LEDs and Button
set_io -nowarn leds[0] 11
set_io -nowarn leds[1] 37
set_io -nowarn leds[2] 27
set_io -nowarn leds[3] 25
set_io -nowarn leds[4] 21
set_io -nowarn leds[5] 23
set_io -nowarn leds[6] 26
set_io -nowarn leds[7] 43
set_io -nowarn BTN_N 10
# RGB LED Driver
set_io -nowarn LED_RED_N 39
set_io -nowarn LED_GRN_N 40
set_io -nowarn LED_BLU_N 41
# SPI Flash
set_io -nowarn flash_clk 15
set_io -nowarn flash_csn 16
set_io -nowarn flash_io0 14
set_io -nowarn flash_io1 17
set_io -nowarn flash_io2 12
set_io -nowarn flash_io3 13
# PMOD 1A
set_io -nowarn P1A1 4
set_io -nowarn P1A2 2
set_io -nowarn P1A3 47
set_io -nowarn P1A4 45
set_io -nowarn P1A7 3
set_io -nowarn P1A8 48
set_io -nowarn P1A9 46
set_io -nowarn P1A10 44
# PMOD 1B
set_io -nowarn P1B1 43
set_io -nowarn P1B2 38
set_io -nowarn P1B3 34
set_io -nowarn P1B4 31
set_io -nowarn P1B7 42
set_io -nowarn P1B8 36
set_io -nowarn P1B9 32
set_io -nowarn P1B10 28
# PMOD 2
set_io -nowarn P2_1 27
set_io -nowarn P2_2 25
set_io -nowarn P2_3 21
set_io -nowarn P2_4 19
set_io -nowarn P2_7 26
set_io -nowarn P2_8 23
set_io -nowarn P2_9 20
set_io -nowarn P2_10 18
# LEDs and Buttons (PMOD 2)
set_io -nowarn BTN1 20
set_io -nowarn BTN2 19
set_io -nowarn BTN3 18

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@@ -0,0 +1,3 @@
// Defines for Upduino
`define SPI_FLASH
`define INTERNAL_OSC

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@@ -0,0 +1,6 @@
ARCH = ice40
SPEED = up
DEVICE = 5k
PACKAGE = sg48
FREQ_OSC = 48
PROGMEM = flash

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@@ -0,0 +1,16 @@
# using the internal 48MHz hifreq osc
#set_io clk 35
set_io flash_clk 15
set_io flash_csn 16
set_io flash_io0 17
set_io flash_io1 14
set_io leds[0] 38
set_io leds[1] 42
set_io leds[2] 36
set_io leds[3] 43
set_io leds[4] 34
set_io leds[5] 37
set_io leds[6] 31
set_io leds[7] 32
set_io uart_rx 12
set_io uart_tx 21

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@@ -0,0 +1,94 @@
`ifndef BUS_ARBITER
`define BUS_ARBITER
module bus_arbiter (
input clk,
input reset,
/* instruction memory bus */
input [31:0] instr_address_in,
input instr_read_in,
output logic [31:0] instr_read_value_out,
output logic instr_ready_out,
output logic instr_fault_out,
/* data memory bus */
input [31:0] data_address_in,
input data_read_in,
input data_write_in,
output logic [31:0] data_read_value_out,
input [3:0] data_write_mask_in,
input [31:0] data_write_value_in,
output logic data_ready_out,
output logic data_fault_out,
/* common memory bus */
output logic [31:0] address_out,
output logic read_out,
output logic write_out,
input [31:0] read_value_in,
output logic [3:0] write_mask_out,
output logic [31:0] write_value_out,
input ready_in,
input fault_in
);
logic data_read;
logic instr_read_in_progress;
assign data_read = data_read_in || data_write_in;
always_comb begin
if (data_read && !instr_read_in_progress) begin
address_out = data_address_in;
read_out = data_read_in;
write_out = data_write_in;
instr_read_value_out = 32'bx;
data_read_value_out = read_value_in;
write_mask_out = data_write_mask_in;
write_value_out = data_write_value_in;
instr_ready_out = 1'b0;
data_ready_out = ready_in;
instr_fault_out = 1'bx;
data_fault_out = fault_in;
end else if (instr_read_in) begin
address_out = instr_address_in;
read_out = instr_read_in;
write_out = 1'b0;
instr_read_value_out = read_value_in;
data_read_value_out = 32'bx;
write_mask_out = 4'b0;
write_value_out = 32'bx;
instr_ready_out = ready_in;
data_ready_out = 1'b0;
instr_fault_out = fault_in;
data_fault_out = 1'bx;
end else begin
address_out = 32'bx;
read_out = 1'b0;
write_out = 1'b0;
instr_read_value_out = 32'bx;
data_read_value_out = 32'bx;
write_mask_out = 4'b0;
write_value_out = 32'bx;
instr_ready_out = 1'b0;
data_ready_out = 1'b0;
instr_fault_out = 32'bx;
data_fault_out = 32'bx;
end
end
always_ff @(posedge clk) begin
if (instr_read_in_progress) begin
if (ready_in)
instr_read_in_progress <= 0;
end else begin
if (!data_read && instr_read_in && !ready_in)
instr_read_in_progress <= 1;
end
if (reset)
instr_read_in_progress <= 0;
end
endmodule
`endif

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@@ -0,0 +1,24 @@
[options]
isa rv32i
[depth]
insn 20
reg 15 30
pc_fwd 10 30
pc_bwd 10 30
liveness 1 10 30
unique 1 10 30
causal 10 30
ill 20
hang 10 30
[defines]
`define RISCV_FORMAL
`define RISCV_FORMAL_NRET 1
`define RISCV_FORMAL_XLEN 32
`define RISCV_FORMAL_ILEN 32
`define RISCV_FORMAL_ALIGNED_MEM
[script-sources]
read_verilog -sv @basedir@/cores/@core@/rvfi_wrapper.sv
read_verilog -noautowire -sv @basedir@/cores/@core@/rv32.sv

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@@ -0,0 +1,20 @@
`ifndef CLK_DIV
`define CLK_DIV
module clk_div #(
parameter LOG_DIVISOR = 1
) (
input clk_in,
output logic clk_out
);
logic [LOG_DIVISOR-1:0] q;
initial q = 0;
always_ff @(posedge clk_in)
q <= q + 1;
assign clk_out = q[LOG_DIVISOR-1];
endmodule
`endif

38
src/advanced/icicle/disasm.py Executable file
View File

@@ -0,0 +1,38 @@
#!/usr/bin/env python3
from Verilog_VCD.Verilog_VCD import parse_vcd
from os import system
from sys import argv
rvfi_valid = None
rvfi_order = None
rvfi_insn = None
for netinfo in parse_vcd(argv[1]).values():
for net in netinfo['nets']:
# print(net["hier"], net["name"])
if net["hier"] == "rvfi_testbench.wrapper" and net["name"] == "rvfi_valid":
rvfi_valid = netinfo['tv']
if net["hier"] == "rvfi_testbench.wrapper" and net["name"] == "rvfi_order":
rvfi_order = netinfo['tv']
if net["hier"] == "rvfi_testbench.wrapper" and net["name"] == "rvfi_insn":
rvfi_insn = netinfo['tv']
assert len(rvfi_valid) == len(rvfi_order)
assert len(rvfi_valid) == len(rvfi_insn)
prog = list()
for tv_valid, tv_order, tv_insn in zip(rvfi_valid, rvfi_order, rvfi_insn):
if tv_valid[1] == '1':
prog.append((int(tv_order[1], 2), int(tv_insn[1], 2)))
with open("disasm.s", "w") as f:
for tv_order, tv_insn in sorted(prog):
if tv_insn & 3 != 3 and tv_insn & 0xffff0000 == 0:
print(".hword 0x%04x # %d" % (tv_insn, tv_order), file=f)
else:
print(".word 0x%08x # %d" % (tv_insn, tv_order), file=f)
system("riscv64-unknown-elf-gcc -march=rv32i -mabi=ilp32 -c disasm.s")
system("riscv64-unknown-elf-objdump -d -M numeric,no-aliases disasm.o")

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@@ -0,0 +1,8 @@
module pll (
input clock_in,
output logic clock_out,
output logic locked
);
assign clock_out = clock_in;
assign locked = 1;
endmodule

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@@ -0,0 +1,7 @@
read_verilog -DECP5 -noautowire -sv top.sv
proc
opt -full
alumacc
share -aggressive
opt -full
synth_ecp5 -abc2 -top top -blif top.blif -json top.json

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@@ -0,0 +1,97 @@
`ifndef FLASH
`define FLASH
`define FLASH_CMD_READ_MSB 1'b0
`define FLASH_CMD_READ 7'b000_0011
`define FLASH_STATE_IDLE 2'b00
`define FLASH_STATE_WRITE_CMD 2'b01
`define FLASH_STATE_READ_DATA 2'b10
`define FLASH_STATE_DONE 2'b11
module flash (
input clk,
input reset,
/* SPI bus */
output logic clk_out,
output logic csn_out,
input io0_in,
input io1_in,
output logic io0_en,
output logic io1_en,
output logic io0_out,
output logic io1_out,
/* memory bus */
input [31:0] address_in,
input sel_in,
input read_in,
output logic [31:0] read_value_out,
input [3:0] write_mask_in,
input [31:0] write_value_in,
output logic ready_out
);
logic [31:0] read_value;
logic [1:0] state;
logic [4:0] bits;
assign clk_out = clk;
assign csn_out = state != `FLASH_STATE_WRITE_CMD && state != `FLASH_STATE_READ_DATA;
assign io0_en = 1;
assign io1_en = 0;
assign read_value_out = sel_in ? {read_value[7:0], read_value[15:8], read_value[23:16], read_value[31:24]} : 0;
assign ready_out = sel_in && state == `FLASH_STATE_DONE;
initial
state <= `FLASH_STATE_IDLE;
always_ff @(posedge clk) begin
case (state)
`FLASH_STATE_IDLE: begin
if (sel_in && read_in) begin
state <= `FLASH_STATE_WRITE_CMD;
bits <= 31;
io0_out <= `FLASH_CMD_READ_MSB;
read_value <= {`FLASH_CMD_READ, address_in[23:2], 2'b0, 1'bx};
end else begin
bits <= 5'bx;
io0_out <= 1'bx;
end
end
`FLASH_STATE_WRITE_CMD: begin
if (|bits) begin
bits <= bits - 1;
io0_out <= read_value[31];
read_value <= {read_value[30:0], 1'bx};
end else begin
state <= `FLASH_STATE_READ_DATA;
bits <= 31;
io0_out <= 1'bx;
read_value <= {31'bx, io1_in};
end
end
`FLASH_STATE_READ_DATA: begin
if (|bits) begin
bits <= bits - 1;
end else begin
state <= `FLASH_STATE_DONE;
bits <= 5'bx;
end
io0_out <= 1'bx;
read_value <= {read_value[30:0], io1_in};
end
`FLASH_STATE_DONE: begin
state <= `FLASH_STATE_IDLE;
bits <= 5'bx;
io0_out <= 1'bx;
end
endcase
if (reset)
state <= `FLASH_STATE_IDLE;
end
endmodule
`endif

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@@ -0,0 +1,7 @@
read_verilog -DICE40 -noautowire -sv top.sv
proc
opt -full
alumacc
share -aggressive
opt -full
synth_ice40 -abc2 -top top -blif top.blif -json top.json

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@@ -0,0 +1,261 @@
`include "bus_arbiter.sv"
`include "flash.sv"
`include "ram.sv"
`include "rv32.sv"
`include "timer.sv"
`include "uart.sv"
`ifdef ECP5
`define RAM_SIZE 8192
`else
`define RAM_SIZE 2048
`endif
`ifdef SPI_FLASH
`define RESET_VECTOR 32'h01100000
`else
`define RESET_VECTOR 32'h00000000
`endif
module icicle (
input clk,
input reset,
`ifdef SPI_FLASH
/* serial flash */
output logic flash_clk,
output logic flash_csn,
output logic flash_io0_en,
input flash_io0_in,
output logic flash_io0_out,
output logic flash_io1_en,
input flash_io1_in,
output logic flash_io1_out,
`endif
/* LEDs */
output logic [7:0] leds,
/* UART */
input uart_rx,
output logic uart_tx
);
/* instruction memory bus */
logic [31:0] instr_address;
logic instr_read;
logic [31:0] instr_read_value;
logic instr_ready;
logic instr_fault;
/* data memory bus */
logic [31:0] data_address;
logic data_read;
logic data_write;
logic [31:0] data_read_value;
logic [3:0] data_write_mask;
logic [31:0] data_write_value;
logic data_ready;
logic data_fault;
/* memory bus */
logic [31:0] mem_address;
logic mem_read;
logic mem_write;
logic [31:0] mem_read_value;
logic [3:0] mem_write_mask;
logic [31:0] mem_write_value;
logic mem_ready;
logic mem_fault;
assign mem_read_value = ram_read_value | leds_read_value | uart_read_value | timer_read_value | flash_read_value;
assign mem_ready = ram_ready | leds_ready | uart_ready | timer_ready | flash_ready | mem_fault;
bus_arbiter bus_arbiter (
.clk(clk),
.reset(reset),
/* instruction memory bus */
.instr_address_in(instr_address),
.instr_read_in(instr_read),
.instr_read_value_out(instr_read_value),
.instr_ready_out(instr_ready),
.instr_fault_out(instr_fault),
/* data memory bus */
.data_address_in(data_address),
.data_read_in(data_read),
.data_write_in(data_write),
.data_read_value_out(data_read_value),
.data_write_mask_in(data_write_mask),
.data_write_value_in(data_write_value),
.data_ready_out(data_ready),
.data_fault_out(data_fault),
/* common memory bus */
.address_out(mem_address),
.read_out(mem_read),
.write_out(mem_write),
.read_value_in(mem_read_value),
.write_mask_out(mem_write_mask),
.write_value_out(mem_write_value),
.ready_in(mem_ready),
.fault_in(mem_fault)
);
logic [63:0] cycle;
rv32 #(
.RESET_VECTOR(`RESET_VECTOR)
) rv32 (
.clk(clk),
.reset(reset),
/* instruction memory bus */
.instr_address_out(instr_address),
.instr_read_out(instr_read),
.instr_read_value_in(instr_read_value),
.instr_ready_in(instr_ready),
.instr_fault_in(instr_fault),
/* data memory bus */
.data_address_out(data_address),
.data_read_out(data_read),
.data_write_out(data_write),
.data_read_value_in(data_read_value),
.data_write_mask_out(data_write_mask),
.data_write_value_out(data_write_value),
.data_ready_in(data_ready),
.data_fault_in(data_fault),
/* timer */
.cycle_out(cycle)
);
logic ram_sel;
logic leds_sel;
logic uart_sel;
logic timer_sel;
logic flash_sel;
always_comb begin
ram_sel = 0;
leds_sel = 0;
uart_sel = 0;
timer_sel = 0;
flash_sel = 0;
mem_fault = 0;
casez (mem_address)
32'b00000000_00000000_????????_????????: ram_sel = 1;
32'b00000000_00000001_00000000_000000??: leds_sel = 1;
32'b00000000_00000010_00000000_0000????: uart_sel = 1;
32'b00000000_00000011_00000000_0000????: timer_sel = 1;
32'b00000001_????????_????????_????????: flash_sel = 1;
default: mem_fault = 1;
endcase
end
logic [31:0] ram_read_value;
logic ram_ready;
ram #(
.SIZE(`RAM_SIZE)
) ram (
.clk(clk),
.reset(reset),
/* memory bus */
.address_in(mem_address),
.sel_in(ram_sel),
.read_value_out(ram_read_value),
.write_mask_in(mem_write_mask),
.write_value_in(mem_write_value),
.ready_out(ram_ready)
);
logic [31:0] leds_read_value;
logic leds_ready;
assign leds_read_value = {24'b0, leds_sel ? leds : 8'b0};
assign leds_ready = leds_sel;
always_ff @(posedge clk) begin
if (leds_sel && mem_write_mask[0])
leds <= mem_write_value[7:0];
end
logic [31:0] uart_read_value;
logic uart_ready;
uart uart (
.clk(clk),
.reset(reset),
/* serial port */
.rx_in(uart_rx),
.tx_out(uart_tx),
/* memory bus */
.address_in(mem_address),
.sel_in(uart_sel),
.read_in(mem_read),
.read_value_out(uart_read_value),
.write_mask_in(mem_write_mask),
.write_value_in(mem_write_value),
.ready_out(uart_ready)
);
logic [31:0] timer_read_value;
logic timer_ready;
timer timer (
.clk(clk),
.reset(reset),
/* cycle count (from the CPU core) */
.cycle_in(cycle),
/* memory bus */
.address_in(mem_address),
.sel_in(timer_sel),
.read_in(mem_read),
.read_value_out(timer_read_value),
.write_mask_in(mem_write_mask),
.write_value_in(mem_write_value),
.ready_out(timer_ready)
);
logic [31:0] flash_read_value;
logic flash_ready;
`ifdef SPI_FLASH
flash flash (
.clk(clk),
.reset(reset),
/* SPI bus */
.clk_out(flash_clk),
.csn_out(flash_csn),
.io0_in(flash_io0_in),
.io1_in(flash_io1_in),
.io0_en(flash_io0_en),
.io1_en(flash_io1_en),
.io0_out(flash_io0_out),
.io1_out(flash_io1_out),
/* memory bus */
.address_in(mem_address),
.sel_in(flash_sel),
.read_in(mem_read),
.read_value_out(flash_read_value),
.write_mask_in(mem_write_mask),
.write_value_in(mem_write_value),
.ready_out(flash_ready)
);
`else
assign flash_read_value = 0;
assign flash_ready = flash_sel;
`endif
endmodule

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#include <stdint.h>
#define LEDS *((volatile uint32_t *) 0x00010000)
#define UART_BAUD *((volatile uint32_t *) 0x00020000)
#define UART_STATUS *((volatile uint32_t *) 0x00020004)
#define UART_DATA *((volatile int32_t *) 0x00020008)
#define MTIME *((volatile uint64_t *) 0x00030000)
#define MTIMECMP *((volatile uint64_t *) 0x00030008)
#define UART_STATUS_TX_READY 0x1
#define UART_STATUS_RX_READY 0x2
#define BAUD_RATE 9600
static void uart_putc(char c) {
while (!(UART_STATUS & UART_STATUS_TX_READY));
UART_DATA = c;
}
static void uart_puts(const char *str) {
char c;
while ((c = *str++)) {
uart_putc(c);
}
}
static inline uint32_t rdcycle(void) {
uint32_t cycle;
asm volatile ("rdcycle %0" : "=r"(cycle));
return cycle;
}
int main() {
UART_BAUD = FREQ / BAUD_RATE;
LEDS = 0xAA;
for (;;) {
uart_puts("iclcle Hello, world!\r\n");
uint32_t start = rdcycle();
while ((rdcycle() - start) <= FREQ);
}
}

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/**
* \addtogroup httpd
* @{
*/
/**
* \file
* HTTP server script language C functions file.
* \author Adam Dunkels <adam@dunkels.com>
*
* This file contains functions that are called by the web server
* scripts. The functions takes one argument, and the return value is
* interpreted as follows. A zero means that the function did not
* complete and should be invoked for the next packet as well. A
* non-zero value indicates that the function has completed and that
* the web server should move along to the next script line.
*
*/
/*
* Copyright (c) 2001, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack.
*
* $Id: cgi.c,v 1.23.2.4 2003/10/07 13:22:27 adam Exp $
*
*/
#include "uip.h"
#include "cgi.h"
#include "httpd.h"
#include "fs.h"
#include <stdio.h>
#include <string.h>
static u8_t print_stats(u8_t next);
static u8_t file_stats(u8_t next);
static u8_t tcp_stats(u8_t next);
cgifunction cgitab[] = {
print_stats, /* CGI function "a" */
file_stats, /* CGI function "b" */
tcp_stats /* CGI function "c" */
};
static const char closed[] = /* "CLOSED",*/
{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};
static const char syn_rcvd[] = /* "SYN-RCVD",*/
{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,
0x44, 0};
static const char syn_sent[] = /* "SYN-SENT",*/
{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,
0x54, 0};
static const char established[] = /* "ESTABLISHED",*/
{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,
0x45, 0x44, 0};
static const char fin_wait_1[] = /* "FIN-WAIT-1",*/
{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
0x54, 0x2d, 0x31, 0};
static const char fin_wait_2[] = /* "FIN-WAIT-2",*/
{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
0x54, 0x2d, 0x32, 0};
static const char closing[] = /* "CLOSING",*/
{0x43, 0x4c, 0x4f, 0x53, 0x49,
0x4e, 0x47, 0};
static const char time_wait[] = /* "TIME-WAIT,"*/
{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,
0x49, 0x54, 0};
static const char last_ack[] = /* "LAST-ACK"*/
{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,
0x4b, 0};
static const char *states[] = {
closed,
syn_rcvd,
syn_sent,
established,
fin_wait_1,
fin_wait_2,
closing,
time_wait,
last_ack};
/*-----------------------------------------------------------------------------------*/
/* print_stats:
*
* Prints out a part of the uIP statistics. The statistics data is
* written into the uip_appdata buffer. It overwrites any incoming
* packet.
*/
static u8_t
print_stats(u8_t next)
{
#if UIP_STATISTICS
u16_t i, j;
u8_t *buf;
u16_t *databytes;
if(next) {
/* If our last data has been acknowledged, we move on the next
chunk of statistics. */
hs->count = hs->count + 4;
if(hs->count >= sizeof(struct uip_stats)/sizeof(u16_t)) {
/* We have printed out all statistics, so we return 1 to
indicate that we are done. */
return 1;
}
}
/* Write part of the statistics into the uip_appdata buffer. */
databytes = (u16_t *)&uip_stat + hs->count;
buf = (u8_t *)uip_appdata;
j = 4 + 1;
i = hs->count;
while (i < sizeof(struct uip_stats)/sizeof(u16_t) && --j > 0) {
sprintf((char *)buf, "%5u\r\n", *databytes);
++databytes;
buf += 6;
++i;
}
/* Send the data. */
uip_send(uip_appdata, buf - uip_appdata);
return 0;
#else
return 1;
#endif /* UIP_STATISTICS */
}
/*-----------------------------------------------------------------------------------*/
static u8_t
file_stats(u8_t next)
{
/* We use sprintf() to print the number of file accesses to a
particular file (given as an argument to the function in the
script). We then use uip_send() to actually send the data. */
if(next) {
return 1;
}
uip_send(uip_appdata, sprintf((char *)uip_appdata, "%5u", fs_count(&hs->script[4])));
return 0;
}
/*-----------------------------------------------------------------------------------*/
static u8_t
tcp_stats(u8_t next)
{
struct uip_conn *conn;
if(next) {
/* If the previously sent data has been acknowledged, we move
forward one connection. */
if(++hs->count == UIP_CONNS) {
/* If all connections has been printed out, we are done and
return 1. */
return 1;
}
}
conn = &uip_conns[hs->count];
if((conn->tcpstateflags & TS_MASK) == CLOSED) {
uip_send(uip_appdata, sprintf((char *)uip_appdata,
"<tr align=\"center\"><td>-</td><td>-</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",
conn->nrtx,
conn->timer,
(uip_outstanding(conn))? '*':' ',
(uip_stopped(conn))? '!':' '));
} else {
uip_send(uip_appdata, sprintf((char *)uip_appdata,
"<tr align=\"center\"><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",
htons(conn->ripaddr[0]) >> 8,
htons(conn->ripaddr[0]) & 0xff,
htons(conn->ripaddr[1]) >> 8,
htons(conn->ripaddr[1]) & 0xff,
htons(conn->rport),
states[conn->tcpstateflags & TS_MASK],
conn->nrtx,
conn->timer,
(uip_outstanding(conn))? '*':' ',
(uip_stopped(conn))? '!':' '));
}
return 0;
}
/*-----------------------------------------------------------------------------------*/

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/**
* \addtogroup httpd
* @{
*/
/**
* \file
* HTTP script language header file.
* \author Adam Dunkels <adam@dunkels.com>
*/
/*
* Copyright (c) 2001, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack.
*
* $Id: cgi.h,v 1.3.2.4 2003/10/07 13:22:27 adam Exp $
*
*/
#ifndef __CGI_H__
#define __CGI_H__
typedef u8_t (* cgifunction)(u8_t next);
/**
* A table containing pointers to C functions that can be called from
* a web server script.
*/
extern cgifunction cgitab[];
#endif /* __CGI_H__ */

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/**
* \addtogroup httpd
* @{
*/
/**
* \file
* HTTP server read-only file system code.
* \author Adam Dunkels <adam@dunkels.com>
*
* A simple read-only filesystem.
*/
/*
* Copyright (c) 2001, Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
* $Id: fs.c,v 1.7.2.3 2003/10/07 13:22:27 adam Exp $
*/
#include "uip.h"
#include "httpd.h"
#include "fs.h"
#include "fsdata.h"
#define NULL (void *)0
#include "fsdata.c"
#ifdef FS_STATISTICS
#if FS_STATISTICS == 1
static u16_t count[FS_NUMFILES];
#endif /* FS_STATISTICS */
#endif /* FS_STATISTICS */
/*-----------------------------------------------------------------------------------*/
static u8_t
fs_strcmp(const char *str1, const char *str2)
{
u8_t i;
i = 0;
loop:
if(str2[i] == 0 ||
str1[i] == '\r' ||
str1[i] == '\n') {
return 0;
}
if(str1[i] != str2[i]) {
return 1;
}
++i;
goto loop;
}
/*-----------------------------------------------------------------------------------*/
int
fs_open(const char *name, struct fs_file *file)
{
#ifdef FS_STATISTICS
#if FS_STATISTICS == 1
u16_t i = 0;
#endif /* FS_STATISTICS */
#endif /* FS_STATISTICS */
struct fsdata_file_noconst *f;
for(f = (struct fsdata_file_noconst *)FS_ROOT;
f != NULL;
f = (struct fsdata_file_noconst *)f->next) {
if(fs_strcmp(name, f->name) == 0) {
file->data = f->data;
file->len = f->len;
#ifdef FS_STATISTICS
#if FS_STATISTICS == 1
++count[i];
#endif /* FS_STATISTICS */
#endif /* FS_STATISTICS */
return 1;
}
#ifdef FS_STATISTICS
#if FS_STATISTICS == 1
++i;
#endif /* FS_STATISTICS */
#endif /* FS_STATISTICS */
}
return 0;
}
/*-----------------------------------------------------------------------------------*/
void
fs_init(void)
{
#ifdef FS_STATISTICS
#if FS_STATISTICS == 1
u16_t i;
for(i = 0; i < FS_NUMFILES; i++) {
count[i] = 0;
}
#endif /* FS_STATISTICS */
#endif /* FS_STATISTICS */
}
/*-----------------------------------------------------------------------------------*/
#ifdef FS_STATISTICS
#if FS_STATISTICS == 1
u16_t fs_count
(char *name)
{
struct fsdata_file_noconst *f;
u16_t i;
i = 0;
for(f = (struct fsdata_file_noconst *)FS_ROOT;
f != NULL;
f = (struct fsdata_file_noconst *)f->next) {
if(fs_strcmp(name, f->name) == 0) {
return count[i];
}
++i;
}
return 0;
}
#endif /* FS_STATISTICS */
#endif /* FS_STATISTICS */
/*-----------------------------------------------------------------------------------*/

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/**
* \addtogroup httpd
* @{
*/
/**
* \file
* HTTP server read-only file system header file.
* \author Adam Dunkels <adam@dunkels.com>
*/
/*
* Copyright (c) 2001, Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
* $Id: fs.h,v 1.6.2.3 2003/10/07 13:22:27 adam Exp $
*/
#ifndef __FS_H__
#define __FS_H__
#include "uip.h"
/**
* An open file in the read-only file system.
*/
struct fs_file {
char *data; /**< The actual file data. */
int len; /**< The length of the file data. */
};
/**
* Open a file in the read-only file system.
*
* \param name The name of the file.
*
* \param file The file pointer, which must be allocated by caller and
* will be filled in by the function.
*/
int fs_open(const char *name, struct fs_file *file);
#ifdef FS_STATISTICS
#if FS_STATISTICS == 1
u16_t fs_count(char *name);
#endif /* FS_STATISTICS */
#endif /* FS_STATISTICS */
/**
* Initialize the read-only file system.
*/
void fs_init(void);
#endif /* __FS_H__ */

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<html><body bgcolor="white"><center><h1>404 - file not found</h1></center></body></html>

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<html>
<body bgcolor="white">
<center>
<table width="600" border="0"><tr><td>
<h2>Welcome</h2>
<p align="justify">
These web pages are served by the small web server running on top of
the <a href="http://dunkels.com/adam/uip/" target="_top">uIP TCP/IP
stack</a>.
</p>
<p align="justify">
Click on the links above to see some status information about the web
server and the TCP/IP stack.
</p>
</td></tr></table>
</center>
</body>
</html>

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# This script shows the access statistics for different files on the
# web server.
#
# First, we include the HTML header.
i /files_header.html
# Print out the name of the file, and call the function that prints
# the access statistics of that file.
t <tr><td><a href="/index.html">/index.html</a></td><td>
c b /index.html
t </td></tr> <tr><td><a href="/about.html">/about.html</a></td><td>
c b /about.html
t </td></tr> <tr><td><a href="/control.html">/control.html</a></td><td>
c b /control.html
t </td></tr> <tr><td><a href="/img/bg.png">/img/bg.png</a></td><td>
c b /img/bg.png
t </td></tr> <tr><td><a href="/404.html">/404.html</a></td><td>
c b /404.html
t </td></tr> <tr><td><a href="/cgi/files">/cgi/files</a></td><td>
c b /cgi/files
t </td></tr> <tr><td><a href="/cgi/stats">/cgi/stats</a></td><td>
c b /cgi/stats
t </td></tr> <tr><td><a href="/cgi/tcp">/cgi/tcp</a></td><td>
c b /cgi/tcp
t </td></tr>
# Include the HTML footer.
i /files_footer.plain
# End of script.
.

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@@ -0,0 +1,4 @@
i /stats_header.html
c a
i /stats_footer.plain
.

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@@ -0,0 +1,4 @@
i /tcp_header.html
c c
i /tcp_footer.plain
.

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@@ -0,0 +1,14 @@
<html>
<body bgcolor="white">
<center>
<table width="797" height="94" border="0" cellpadding="0"
cellspacing="0" background="/img/bg.png"><tr><td align="center">
<h1>uIP web server test pages</h1>
[ <a href="about.html" target="main">About</a> |
<a href="/cgi/tcp" target="main">Connections</a> |
<a href="/cgi/files" target="main">Files</a> |
<a href="/cgi/stats" target="main">Statistics</a> ]
</td></tr></table>
</center>
</body>
</html>

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</td></tr></table>
</body>
</html>

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<html>
<body bgcolor="white">
<center>
<table width="600" border="0">

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<html>
<head><title>uIP web server test page</title></head>
<frameset cols="*" rows="120,*" frameborder="no">
<frame src="control.html">
<frame src="about.html" name="main">
</frameset>
<noframes>
<body>
Your browser must support frames
</body>
</noframes>
</html>

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</td></tr></table>
</body>
</html>

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<html>
<body bgcolor="white">
<center>
<table width="600" border="0">
<tr><td>
<pre>
IP Packets dropped
Packets received
Packets sent
IP errors IP version/header length
IP length, high byte
IP length, low byte
IP fragments
Header checksum
Wrong protocol
ICMP Packets dropped
Packets received
Packets sent
Type errors
TCP Packets dropped
Packets received
Packets sent
Checksum errors
Data packets without ACKs
Resets
Retransmissions
No connection avaliable
Connection attempts to closed ports
</pre>
</td><td><pre>

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</td></tr></table>
</center>
</body>
</html>

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<html>
<body bgcolor="white">
<center>
<table width="600" border="0">
<tr><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>

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static const char data_cgi_files[] = {
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static const char data_cgi_stats[] = {
/* /cgi/stats */
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static const char data_cgi_tcp[] = {
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static const char data_img_bg_png[] = {
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0x69, 0x6f, 0x6e, 0x73, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c,
0x74, 0x68, 0x3e, 0x54, 0x69, 0x6d, 0x65, 0x72, 0x3c, 0x2f,
0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x46, 0x6c, 0x61,
0x67, 0x73, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x2f, 0x74,
0x72, 0x3e, 0xa, 0xa, };
const struct fsdata_file file_cgi_files[] = {{NULL, data_cgi_files, data_cgi_files + 11, sizeof(data_cgi_files) - 11}};
const struct fsdata_file file_cgi_stats[] = {{file_cgi_files, data_cgi_stats, data_cgi_stats + 11, sizeof(data_cgi_stats) - 11}};
const struct fsdata_file file_cgi_tcp[] = {{file_cgi_stats, data_cgi_tcp, data_cgi_tcp + 9, sizeof(data_cgi_tcp) - 9}};
const struct fsdata_file file_img_bg_png[] = {{file_cgi_tcp, data_img_bg_png, data_img_bg_png + 12, sizeof(data_img_bg_png) - 12}};
const struct fsdata_file file_about_html[] = {{file_img_bg_png, data_about_html, data_about_html + 12, sizeof(data_about_html) - 12}};
const struct fsdata_file file_control_html[] = {{file_about_html, data_control_html, data_control_html + 14, sizeof(data_control_html) - 14}};
const struct fsdata_file file_404_html[] = {{file_control_html, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};
const struct fsdata_file file_files_footer_plain[] = {{file_404_html, data_files_footer_plain, data_files_footer_plain + 20, sizeof(data_files_footer_plain) - 20}};
const struct fsdata_file file_files_header_html[] = {{file_files_footer_plain, data_files_header_html, data_files_header_html + 19, sizeof(data_files_header_html) - 19}};
const struct fsdata_file file_index_html[] = {{file_files_header_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};
const struct fsdata_file file_stats_footer_plain[] = {{file_index_html, data_stats_footer_plain, data_stats_footer_plain + 20, sizeof(data_stats_footer_plain) - 20}};
const struct fsdata_file file_stats_header_html[] = {{file_stats_footer_plain, data_stats_header_html, data_stats_header_html + 19, sizeof(data_stats_header_html) - 19}};
const struct fsdata_file file_tcp_footer_plain[] = {{file_stats_header_html, data_tcp_footer_plain, data_tcp_footer_plain + 18, sizeof(data_tcp_footer_plain) - 18}};
const struct fsdata_file file_tcp_header_html[] = {{file_tcp_footer_plain, data_tcp_header_html, data_tcp_header_html + 17, sizeof(data_tcp_header_html) - 17}};
#define FS_ROOT file_tcp_header_html
#define FS_NUMFILES 14

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@@ -0,0 +1,64 @@
/*
* Copyright (c) 2001, Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
* $Id: fsdata.h,v 1.4.2.1 2003/10/04 22:54:06 adam Exp $
*/
#ifndef __FSDATA_H__
#define __FSDATA_H__
#include "uipopt.h"
struct fsdata_file {
const struct fsdata_file *next;
const char *name;
const char *data;
const int len;
#ifdef FS_STATISTICS
#if FS_STATISTICS == 1
u16_t count;
#endif /* FS_STATISTICS */
#endif /* FS_STATISTICS */
};
struct fsdata_file_noconst {
struct fsdata_file *next;
char *name;
char *data;
int len;
#ifdef FS_STATISTICS
#if FS_STATISTICS == 1
u16_t count;
#endif /* FS_STATISTICS */
#endif /* FS_STATISTICS */
};
#endif /* __FSDATA_H__ */

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@@ -0,0 +1,371 @@
/**
* \addtogroup exampleapps
* @{
*/
/**
* \defgroup httpd Web server
* @{
*
* The uIP web server is a very simplistic implementation of an HTTP
* server. It can serve web pages and files from a read-only ROM
* filesystem, and provides a very small scripting language.
*
* The script language is very simple and works as follows. Each
* script line starts with a command character, either "i", "t", "c",
* "#" or ".". The "i" command tells the script interpreter to
* "include" a file from the virtual file system and output it to the
* web browser. The "t" command should be followed by a line of text
* that is to be output to the browser. The "c" command is used to
* call one of the C functions from the httpd-cgi.c file. A line that
* starts with a "#" is ignored (i.e., the "#" denotes a comment), and
* the "." denotes the last script line.
*
* The script that produces the file statistics page looks somewhat
* like this:
*
\code
i /header.html
t <h1>File statistics</h1><br><table width="100%">
t <tr><td><a href="/index.html">/index.html</a></td><td>
c a /index.html
t </td></tr> <tr><td><a href="/cgi/files">/cgi/files</a></td><td>
c a /cgi/files
t </td></tr> <tr><td><a href="/cgi/tcp">/cgi/tcp</a></td><td>
c a /cgi/tcp
t </td></tr> <tr><td><a href="/404.html">/404.html</a></td><td>
c a /404.html
t </td></tr></table>
i /footer.plain
.
\endcode
*
*/
/**
* \file
* HTTP server.
* \author Adam Dunkels <adam@dunkels.com>
*/
/*
* Copyright (c) 2001, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack.
*
* $Id: httpd.c,v 1.28.2.6 2003/10/07 13:22:27 adam Exp $
*
*/
#include "uip.h"
#include "httpd.h"
#include "fs.h"
#include "fsdata.h"
#include "cgi.h"
#define NULL (void *)0
/* The HTTP server states: */
#define HTTP_NOGET 0
#define HTTP_FILE 1
#define HTTP_TEXT 2
#define HTTP_FUNC 3
#define HTTP_END 4
#ifdef DEBUG
#include <stdio.h>
#define PRINT(x) printf("%s", x)
#define PRINTLN(x) printf("%s\n", x)
#else /* DEBUG */
#define PRINT(x)
#define PRINTLN(x)
#endif /* DEBUG */
struct httpd_state *hs;
extern const struct fsdata_file file_index_html;
extern const struct fsdata_file file_404_html;
static void next_scriptline(void);
static void next_scriptstate(void);
#define ISO_G 0x47
#define ISO_E 0x45
#define ISO_T 0x54
#define ISO_slash 0x2f
#define ISO_c 0x63
#define ISO_g 0x67
#define ISO_i 0x69
#define ISO_space 0x20
#define ISO_nl 0x0a
#define ISO_cr 0x0d
#define ISO_a 0x61
#define ISO_t 0x74
#define ISO_hash 0x23
#define ISO_period 0x2e
/*-----------------------------------------------------------------------------------*/
/**
* Initialize the web server.
*
* Starts to listen for incoming connection requests on TCP port 80.
*/
/*-----------------------------------------------------------------------------------*/
void
httpd_init(void)
{
fs_init();
/* Listen to port 80. */
uip_listen(HTONS(80));
}
/*-----------------------------------------------------------------------------------*/
void
httpd_appcall(void)
{
struct fs_file fsfile;
u8_t i;
switch(uip_conn->lport) {
/* This is the web server: */
case HTONS(80):
/* Pick out the application state from the uip_conn structure. */
hs = (struct httpd_state *)(uip_conn->appstate);
/* We use the uip_ test functions to deduce why we were
called. If uip_connected() is non-zero, we were called
because a remote host has connected to us. If
uip_newdata() is non-zero, we were called because the
remote host has sent us new data, and if uip_acked() is
non-zero, the remote host has acknowledged the data we
previously sent to it. */
if(uip_connected()) {
/* Since we have just been connected with the remote host, we
reset the state for this connection. The ->count variable
contains the amount of data that is yet to be sent to the
remote host, and the ->state is set to HTTP_NOGET to signal
that we haven't received any HTTP GET request for this
connection yet. */
hs->state = HTTP_NOGET;
hs->count = 0;
return;
} else if(uip_poll()) {
/* If we are polled ten times, we abort the connection. This is
because we don't want connections lingering indefinately in
the system. */
if(hs->count++ >= 10) {
uip_abort();
}
return;
} else if(uip_newdata() && hs->state == HTTP_NOGET) {
/* This is the first data we receive, and it should contain a
GET. */
/* Check for GET. */
if(uip_appdata[0] != ISO_G ||
uip_appdata[1] != ISO_E ||
uip_appdata[2] != ISO_T ||
uip_appdata[3] != ISO_space) {
/* If it isn't a GET, we abort the connection. */
uip_abort();
return;
}
/* Find the file we are looking for. */
for(i = 4; i < 40; ++i) {
if(uip_appdata[i] == ISO_space ||
uip_appdata[i] == ISO_cr ||
uip_appdata[i] == ISO_nl) {
uip_appdata[i] = 0;
break;
}
}
PRINT("request for file ");
PRINTLN(&uip_appdata[4]);
/* Check for a request for "/". */
if(uip_appdata[4] == ISO_slash &&
uip_appdata[5] == 0) {
fs_open(file_index_html.name, &fsfile);
} else {
if(!fs_open((const char *)&uip_appdata[4], &fsfile)) {
PRINTLN("couldn't open file");
fs_open(file_404_html.name, &fsfile);
}
}
if(uip_appdata[4] == ISO_slash &&
uip_appdata[5] == ISO_c &&
uip_appdata[6] == ISO_g &&
uip_appdata[7] == ISO_i &&
uip_appdata[8] == ISO_slash) {
/* If the request is for a file that starts with "/cgi/", we
prepare for invoking a script. */
hs->script = fsfile.data;
next_scriptstate();
} else {
hs->script = NULL;
/* The web server is now no longer in the HTTP_NOGET state, but
in the HTTP_FILE state since is has now got the GET from
the client and will start transmitting the file. */
hs->state = HTTP_FILE;
/* Point the file pointers in the connection state to point to
the first byte of the file. */
hs->dataptr = fsfile.data;
hs->count = fsfile.len;
}
}
if(hs->state != HTTP_FUNC) {
/* Check if the client (remote end) has acknowledged any data that
we've previously sent. If so, we move the file pointer further
into the file and send back more data. If we are out of data to
send, we close the connection. */
if(uip_acked()) {
if(hs->count >= uip_conn->len) {
hs->count -= uip_conn->len;
hs->dataptr += uip_conn->len;
} else {
hs->count = 0;
}
if(hs->count == 0) {
if(hs->script != NULL) {
next_scriptline();
next_scriptstate();
} else {
uip_close();
}
}
}
} else {
/* Call the CGI function. */
if(cgitab[hs->script[2] - ISO_a](uip_acked())) {
/* If the function returns non-zero, we jump to the next line
in the script. */
next_scriptline();
next_scriptstate();
}
}
if(hs->state != HTTP_FUNC && !uip_poll()) {
/* Send a piece of data, but not more than the MSS of the
connection. */
uip_send(hs->dataptr, hs->count);
}
/* Finally, return to uIP. Our outgoing packet will soon be on its
way... */
return;
default:
/* Should never happen. */
uip_abort();
break;
}
}
/*-----------------------------------------------------------------------------------*/
/* next_scriptline():
*
* Reads the script until it finds a newline. */
static void
next_scriptline(void)
{
/* Loop until we find a newline character. */
do {
++(hs->script);
} while(hs->script[0] != ISO_nl);
/* Eat up the newline as well. */
++(hs->script);
}
/*-----------------------------------------------------------------------------------*/
/* next_sciptstate:
*
* Reads one line of script and decides what to do next.
*/
static void
next_scriptstate(void)
{
struct fs_file fsfile;
u8_t i;
again:
switch(hs->script[0]) {
case ISO_t:
/* Send a text string. */
hs->state = HTTP_TEXT;
hs->dataptr = &hs->script[2];
/* Calculate length of string. */
for(i = 0; hs->dataptr[i] != ISO_nl; ++i);
hs->count = i;
break;
case ISO_c:
/* Call a function. */
hs->state = HTTP_FUNC;
hs->dataptr = NULL;
hs->count = 0;
cgitab[hs->script[2] - ISO_a](0);
break;
case ISO_i:
/* Include a file. */
hs->state = HTTP_FILE;
if(!fs_open(&hs->script[2], &fsfile)) {
uip_abort();
}
hs->dataptr = fsfile.data;
hs->count = fsfile.len;
break;
case ISO_hash:
/* Comment line. */
next_scriptline();
goto again;
break;
case ISO_period:
/* End of script. */
hs->state = HTTP_END;
uip_close();
break;
default:
uip_abort();
break;
}
}
/*-----------------------------------------------------------------------------------*/
/** @} */
/** @} */

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@@ -0,0 +1,77 @@
/**
* \addtogroup httpd
* @{
*/
/**
* \file
* HTTP server header file.
* \author Adam Dunkels <adam@dunkels.com>
*/
/*
* Copyright (c) 2001, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack.
*
* $Id: httpd.h,v 1.4.2.3 2003/10/06 22:56:44 adam Exp $
*
*/
#ifndef __HTTPD_H__
#define __HTTPD_H__
void httpd_init(void);
void httpd_appcall(void);
/* UIP_APPCALL: the name of the application function. This function
must return void and take no arguments (i.e., C type "void
appfunc(void)"). */
#ifndef UIP_APPCALL
#define UIP_APPCALL httpd_appcall
#endif
struct httpd_state {
u8_t state;
u16_t count;
char *dataptr;
char *script;
};
/* UIP_APPSTATE_SIZE: The size of the application-specific state
stored in the uip_conn structure. */
#ifndef UIP_APPSTATE_SIZE
#define UIP_APPSTATE_SIZE (sizeof(struct httpd_state))
#endif
#define FS_STATISTICS 1
extern struct httpd_state *hs;
#endif /* __HTTPD_H__ */

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@@ -0,0 +1,46 @@
#include "slipdev.h"
#include "slipdev_icicle.h"
#include "uip.h"
#include "httpd.h"
#include <stdint.h>
#define LEDS *((volatile uint32_t *) 0x00010000)
static inline uint32_t rdcycle(void) {
uint32_t cycle;
asm volatile ("rdcycle %0" : "=r"(cycle));
return cycle;
}
int main(void) {
LEDS = 0xAA;
slipdev_icicle_init();
uip_init();
httpd_init();
uint32_t last_periodic = rdcycle();
for (;;) {
uip_len = slipdev_poll();
if (uip_len > 0) {
uip_input();
if (uip_len > 0) {
slipdev_send();
}
}
uint32_t now = rdcycle();
if ((now - last_periodic) >= FREQ) {
last_periodic = now;
for (uint8_t i = 0; i < UIP_CONNS; i++) {
uip_periodic(i);
if (uip_len > 0) {
slipdev_send();
}
}
}
}
}

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@@ -0,0 +1,93 @@
#!/usr/bin/perl
open(OUTPUT, "> fsdata.c");
chdir("fs");
open(FILES, "find . -type f |");
while($file = <FILES>) {
# Do not include files in CVS directories nor backup files.
if($file =~ /(CVS|~)/) {
next;
}
chop($file);
open(HEADER, "> /tmp/header") || die $!;
if($file =~ /404.html/) {
print(HEADER "HTTP/1.0 404 File not found\r\n");
} else {
print(HEADER "HTTP/1.0 200 OK\r\n");
}
print(HEADER "Server: uIP/0.9 (http://dunkels.com/adam/uip/)\r\n");
if($file =~ /\.html$/) {
print(HEADER "Content-type: text/html\r\n");
} elsif($file =~ /\.gif$/) {
print(HEADER "Content-type: image/gif\r\n");
} elsif($file =~ /\.png$/) {
print(HEADER "Content-type: image/png\r\n");
} elsif($file =~ /\.jpg$/) {
print(HEADER "Content-type: image/jpeg\r\n");
} else {
print(HEADER "Content-type: text/plain\r\n");
}
print(HEADER "\r\n");
close(HEADER);
unless($file =~ /\.plain$/ || $file =~ /cgi/) {
system("cat /tmp/header $file > /tmp/file");
} else {
system("cp $file /tmp/file");
}
open(FILE, "/tmp/file");
unlink("/tmp/file");
unlink("/tmp/header");
$file =~ s/\.//;
$fvar = $file;
$fvar =~ s-/-_-g;
$fvar =~ s-\.-_-g;
print(OUTPUT "static const char data".$fvar."[] = {\n");
print(OUTPUT "\t/* $file */\n\t");
for($j = 0; $j < length($file); $j++) {
printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));
}
printf(OUTPUT "0,\n");
$i = 0;
while(read(FILE, $data, 1)) {
if($i == 0) {
print(OUTPUT "\t");
}
printf(OUTPUT "%#02x, ", unpack("C", $data));
$i++;
if($i == 10) {
print(OUTPUT "\n");
$i = 0;
}
}
print(OUTPUT "};\n\n");
close(FILE);
push(@fvars, $fvar);
push(@files, $file);
}
for($i = 0; $i < @fvars; $i++) {
$file = $files[$i];
$fvar = $fvars[$i];
if($i == 0) {
$prevfile = "NULL";
} else {
$prevfile = "file" . $fvars[$i - 1];
}
print(OUTPUT "const struct fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");
print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");
print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");
}
print(OUTPUT "#define FS_ROOT file$fvars[$i - 1]\n\n");
print(OUTPUT "#define FS_NUMFILES $i");

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/**
* \addtogroup uip
* @{
*/
/**
* \defgroup slip Serial Line IP (SLIP) protocol
* @{
*
* The SLIP protocol is a very simple way to transmit IP packets over
* a serial line. It does not provide any framing or error control,
* and is therefore not very widely used today.
*
* This SLIP implementation requires two functions for accessing the
* serial device: slipdev_char_poll() and slipdev_char_put(). These
* must be implemented specifically for the system on which the SLIP
* protocol is to be run.
*/
/**
* \file
* SLIP protocol implementation
* \author Adam Dunkels <adam@dunkels.com>
*/
/*
* Copyright (c) 2001, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack.
*
* $Id: slipdev.c,v 1.1.2.3 2003/10/07 13:23:01 adam Exp $
*
*/
/*
* This is a generic implementation of the SLIP protocol over an RS232
* (serial) device.
*
* Huge thanks to Ullrich von Bassewitz <uz@cc65.org> of cc65 fame for
* and endless supply of bugfixes, insightsful comments and
* suggestions, and improvements to this code!
*/
#include "slipdev.h"
#include "uip.h"
#include <string.h>
#define SLIP_END 0300
#define SLIP_ESC 0333
#define SLIP_ESC_END 0334
#define SLIP_ESC_ESC 0335
static u8_t slip_buf[UIP_BUFSIZE];
static u16_t len, tmplen;
static u8_t lastc;
/*-----------------------------------------------------------------------------------*/
/**
* Send the packet in the uip_buf and uip_appdata buffers using the
* SLIP protocol.
*
* The first 40 bytes of the packet (the IP and TCP headers) are read
* from the uip_buf buffer, and the following bytes (the application
* data) are read from the uip_appdata buffer.
*
*/
/*-----------------------------------------------------------------------------------*/
void
slipdev_send(void)
{
u16_t i;
u8_t *ptr;
u8_t c;
slipdev_char_put(SLIP_END);
ptr = uip_buf;
for(i = 0; i < uip_len; ++i) {
if(i == 40) {
ptr = (u8_t *)uip_appdata;
}
c = *ptr++;
switch(c) {
case SLIP_END:
slipdev_char_put(SLIP_ESC);
slipdev_char_put(SLIP_ESC_END);
break;
case SLIP_ESC:
slipdev_char_put(SLIP_ESC);
slipdev_char_put(SLIP_ESC_ESC);
break;
default:
slipdev_char_put(c);
break;
}
}
slipdev_char_put(SLIP_END);
}
/*-----------------------------------------------------------------------------------*/
/**
* Poll the SLIP device for an available packet.
*
* This function will poll the SLIP device to see if a packet is
* available. It uses a buffer in which all avaliable bytes from the
* RS232 interface are read into. When a full packet has been read
* into the buffer, the packet is copied into the uip_buf buffer and
* the length of the packet is returned.
*
* \return The length of the packet placed in the uip_buf buffer, or
* zero if no packet is available.
*/
/*-----------------------------------------------------------------------------------*/
u16_t
slipdev_poll(void)
{
u8_t c;
while(slipdev_char_poll(&c)) {
switch(c) {
case SLIP_ESC:
lastc = c;
break;
case SLIP_END:
lastc = c;
/* End marker found, we copy our input buffer to the uip_buf
buffer and return the size of the packet we copied. */
memcpy(uip_buf, slip_buf, len);
tmplen = len;
len = 0;
return tmplen;
default:
if(lastc == SLIP_ESC) {
lastc = c;
/* Previous read byte was an escape byte, so this byte will be
interpreted differently from others. */
switch(c) {
case SLIP_ESC_END:
c = SLIP_END;
break;
case SLIP_ESC_ESC:
c = SLIP_ESC;
break;
}
} else {
lastc = c;
}
slip_buf[len] = c;
++len;
if(len > UIP_BUFSIZE) {
len = 0;
}
break;
}
}
return 0;
}
/*-----------------------------------------------------------------------------------*/
/**
* Initialize the SLIP module.
*
* This function does not initialize the underlying RS232 device, but
* only the SLIP part.
*/
/*-----------------------------------------------------------------------------------*/
void
slipdev_init(void)
{
lastc = len = 0;
}
/*-----------------------------------------------------------------------------------*/
/** @} */
/** @} */

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