2018-05-10 21:21:58 +08:00
|
|
|
/*
|
2022-01-17 20:54:53 +08:00
|
|
|
* Copyright (C) 2021-2022 Intel Corporation
|
2018-05-10 21:21:58 +08:00
|
|
|
*
|
2018-09-18 15:11:08 +08:00
|
|
|
* SPDX-License-Identifier: MIT
|
2018-05-10 21:21:58 +08:00
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
2020-02-24 05:44:01 +08:00
|
|
|
#include "shared/source/gen9/hw_info.h"
|
2021-04-13 20:00:07 +08:00
|
|
|
#include "shared/test/common/helpers/unit_test_helper.h"
|
|
|
|
#include "shared/test/common/helpers/unit_test_helper.inl"
|
2022-01-17 20:54:53 +08:00
|
|
|
#include "shared/test/common/helpers/unit_test_helper_bdw_and_later.inl"
|
2018-05-10 21:21:58 +08:00
|
|
|
|
2019-03-26 18:59:46 +08:00
|
|
|
namespace NEO {
|
2019-08-14 15:33:51 +08:00
|
|
|
using Family = SKLFamily;
|
2018-05-10 21:21:58 +08:00
|
|
|
|
2019-08-14 15:33:51 +08:00
|
|
|
template <>
|
|
|
|
bool UnitTestHelper<Family>::isPipeControlWArequired(const HardwareInfo &hwInfo) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-09-24 00:46:42 +08:00
|
|
|
template <>
|
|
|
|
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
|
|
|
|
return 0x20ec;
|
|
|
|
}
|
|
|
|
|
|
|
|
template <>
|
|
|
|
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
|
|
|
|
return (1u << 6) | (1u << 22);
|
|
|
|
}
|
|
|
|
|
|
|
|
template <>
|
|
|
|
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
|
|
|
|
return 0xe400;
|
|
|
|
}
|
|
|
|
|
|
|
|
template <>
|
|
|
|
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
|
|
|
|
return (1u << 7) | (1u << 4);
|
|
|
|
}
|
|
|
|
|
2019-08-14 15:33:51 +08:00
|
|
|
template struct UnitTestHelper<Family>;
|
2019-03-26 18:59:46 +08:00
|
|
|
} // namespace NEO
|