2017-12-21 07:45:38 +08:00
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/*
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2020-01-08 22:00:45 +08:00
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* Copyright (C) 2017-2020 Intel Corporation
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2017-12-21 07:45:38 +08:00
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*
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2018-09-18 15:11:08 +08:00
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* SPDX-License-Identifier: MIT
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2017-12-21 07:45:38 +08:00
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*
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*/
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#pragma once
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2019-08-01 04:44:27 +08:00
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#include "core/helpers/basic_math.h"
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2019-12-11 22:28:22 +08:00
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#include "core/os_interface/linux/engine_info.h"
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#include "core/os_interface/linux/memory_info.h"
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2020-01-08 22:00:45 +08:00
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#include "core/utilities/api_intercept.h"
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2017-12-21 07:45:38 +08:00
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2019-08-21 18:50:47 +08:00
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#include "drm/i915_drm.h"
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2019-07-11 20:29:45 +08:00
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#include "engine_node.h"
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2019-02-27 18:39:32 +08:00
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#include "igfxfmid.h"
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2017-12-21 07:45:38 +08:00
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#include <cerrno>
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2019-02-27 18:39:32 +08:00
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#include <fcntl.h>
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2019-03-19 20:53:55 +08:00
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#include <memory>
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2017-12-21 07:45:38 +08:00
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#include <string>
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2019-02-27 18:39:32 +08:00
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#include <sys/ioctl.h>
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#include <unistd.h>
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2017-12-21 07:45:38 +08:00
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2018-02-05 15:54:46 +08:00
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struct GT_SYSTEM_INFO;
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2019-03-26 18:59:46 +08:00
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namespace NEO {
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2017-12-21 07:45:38 +08:00
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#define I915_CONTEXT_PRIVATE_PARAM_BOOST 0x80000000
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class DeviceFactory;
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2018-02-05 15:54:46 +08:00
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struct HardwareInfo;
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2019-10-15 21:01:57 +08:00
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struct DeviceDescriptor { // NOLINT(clang-analyzer-optin.performance.Padding)
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2018-02-05 15:54:46 +08:00
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unsigned short deviceId;
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const HardwareInfo *pHwInfo;
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2019-03-28 22:34:26 +08:00
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void (*setupHardwareInfo)(HardwareInfo *, bool);
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2018-02-05 15:54:46 +08:00
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GTTYPE eGtType;
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};
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extern const DeviceDescriptor deviceDescriptorTable[];
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2017-12-21 07:45:38 +08:00
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class Drm {
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friend DeviceFactory;
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public:
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static Drm *get(int32_t deviceOrdinal);
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2019-02-11 23:49:23 +08:00
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virtual ~Drm();
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2017-12-21 07:45:38 +08:00
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virtual int ioctl(unsigned long request, void *arg);
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int getDeviceID(int &devId);
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int getDeviceRevID(int &revId);
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int getExecSoftPin(int &execSoftPin);
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int enableTurboBoost();
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int getEuTotal(int &euTotal);
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int getSubsliceTotal(int &subsliceTotal);
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int getMaxGpuFrequency(int &maxGpuFrequency);
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int getEnabledPooledEu(int &enabled);
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int getMinEuInPool(int &minEUinPool);
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2019-12-17 22:17:52 +08:00
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int queryGttSize(uint64_t >tSizeOutput);
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2018-12-07 22:03:23 +08:00
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bool isPreemptionSupported() const { return preemptionSupported; }
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2019-12-24 19:20:23 +08:00
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2018-12-07 22:03:23 +08:00
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MOCKABLE_VIRTUAL void checkPreemptionSupport();
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2017-12-21 07:45:38 +08:00
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int getFileDescriptor() const { return fd; }
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2018-12-11 15:21:56 +08:00
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uint32_t createDrmContext();
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void destroyDrmContext(uint32_t drmContextId);
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void setLowPriorityContextParam(uint32_t drmContextId);
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2019-12-24 19:20:23 +08:00
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2019-07-11 20:29:45 +08:00
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unsigned int bindDrmContext(uint32_t drmContextId, uint32_t deviceIndex, aub_stream::EngineType engineType);
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2017-12-21 07:45:38 +08:00
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void setGtType(GTTYPE eGtType) { this->eGtType = eGtType; }
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GTTYPE getGtType() const { return this->eGtType; }
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2018-02-28 19:09:48 +08:00
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MOCKABLE_VIRTUAL int getErrno();
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2019-08-21 18:50:47 +08:00
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bool setQueueSliceCount(uint64_t sliceCount);
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void checkQueueSliceSupport();
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uint64_t getSliceMask(uint64_t sliceCount);
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2019-11-09 01:49:54 +08:00
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bool queryEngineInfo();
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bool queryMemoryInfo();
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2019-10-18 16:15:09 +08:00
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int setupHardwareInfo(DeviceDescriptor *, bool);
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2019-12-24 19:20:23 +08:00
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bool areNonPersistentContextsSupported() const { return nonPersistentContextsSupported; }
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void checkNonPersistentContextsSupport();
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void setNonPersistentContext(uint32_t drmContextId);
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2017-12-21 07:45:38 +08:00
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2019-04-30 19:09:49 +08:00
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MemoryInfo *getMemoryInfo() const {
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2019-04-10 20:32:41 +08:00
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return memoryInfo.get();
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}
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2019-10-15 00:05:30 +08:00
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static bool (*pIsi915Version)(int fd);
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static bool isi915Version(int fd);
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static int (*pClose)(int fd);
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2019-04-10 20:32:41 +08:00
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2017-12-21 07:45:38 +08:00
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protected:
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2019-08-21 18:50:47 +08:00
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int getQueueSliceCount(drm_i915_gem_context_param_sseu *sseu);
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bool sliceCountChangeSupported = false;
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drm_i915_gem_context_param_sseu sseu{};
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2018-12-07 22:03:23 +08:00
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bool preemptionSupported = false;
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2019-12-24 19:20:23 +08:00
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bool nonPersistentContextsSupported = false;
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2017-12-21 07:45:38 +08:00
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int fd;
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2019-05-09 14:16:50 +08:00
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int deviceId = 0;
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int revisionId = 0;
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GTTYPE eGtType = GTTYPE_UNDEFINED;
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Drm(int fd) : fd(fd) {}
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std::unique_ptr<EngineInfo> engineInfo;
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2019-03-19 20:53:55 +08:00
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std::unique_ptr<MemoryInfo> memoryInfo;
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2017-12-21 07:45:38 +08:00
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static int getDeviceFd(const int devType);
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static int openDevice();
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static Drm *create(int32_t deviceOrdinal);
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static void closeDevice(int32_t deviceOrdinal);
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std::string getSysFsPciPath(int deviceID);
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2019-04-30 19:09:49 +08:00
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void *query(uint32_t queryId);
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2017-12-21 07:45:38 +08:00
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#pragma pack(1)
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struct PCIConfig {
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uint16_t VendorID;
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uint16_t DeviceID;
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uint16_t Command;
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uint16_t Status;
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uint8_t Revision;
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uint8_t ProgIF;
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uint8_t Subclass;
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uint8_t ClassCode;
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uint8_t cacheLineSize;
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uint8_t LatencyTimer;
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uint8_t HeaderType;
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uint8_t BIST;
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uint32_t BAR0[6];
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uint32_t CardbusCISPointer;
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uint16_t SubsystemVendorID;
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uint16_t SubsystemDeviceID;
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uint32_t ROM;
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uint8_t Capabilities;
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uint8_t Reserved[7];
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uint8_t InterruptLine;
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uint8_t InterruptPIN;
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uint8_t MinGrant;
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uint8_t MaxLatency;
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};
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#pragma pack()
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static const char *sysFsDefaultGpuPath;
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static const char *maxGpuFrequencyFile;
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static const char *configFileName;
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2018-03-12 19:03:20 +08:00
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private:
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int getParamIoctl(int param, int *dstValue);
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2017-12-21 07:45:38 +08:00
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};
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2019-03-26 18:59:46 +08:00
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} // namespace NEO
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