2019-10-25 23:55:22 +08:00
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/*
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2022-03-18 19:06:51 +08:00
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* Copyright (C) 2020-2022 Intel Corporation
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2019-10-25 23:55:22 +08:00
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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2022-03-18 19:06:51 +08:00
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#pragma once
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2020-03-19 17:29:36 +08:00
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#include "shared/source/command_container/command_encoder.h"
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2022-03-18 19:06:51 +08:00
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#include "shared/source/command_stream/linear_stream.h"
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#include "shared/source/helpers/hw_helper.h"
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2021-12-22 22:11:05 +08:00
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#include "shared/source/helpers/pipe_control_args.h"
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2019-10-25 23:55:22 +08:00
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namespace NEO {
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2019-12-13 09:32:11 +08:00
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template <>
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2022-03-18 19:06:51 +08:00
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void EncodeWA<Family>::addPipeControlBeforeStateBaseAddress(LinearStream &commandStream,
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const HardwareInfo &hwInfo, bool isRcs) {
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2021-12-21 05:37:45 +08:00
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PipeControlArgs args;
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2022-03-18 19:06:51 +08:00
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args.dcFlushEnable = MemorySynchronizationCommands<Family>::getDcFlushEnable(true, hwInfo);
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2020-04-27 03:48:59 +08:00
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args.textureCacheInvalidationEnable = true;
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args.hdcPipelineFlush = true;
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2021-09-30 00:07:23 +08:00
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2022-03-18 19:06:51 +08:00
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NEO::EncodeWA<Family>::addPipeControlPriorToNonPipelinedStateCommand(commandStream, args, hwInfo, isRcs);
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2019-12-13 09:32:11 +08:00
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}
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2021-10-01 19:47:49 +08:00
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2019-12-13 09:32:11 +08:00
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} // namespace NEO
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