Media
/
compute-runtime
mirror of https://github.com/intel/compute-runtime.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

fix: transfer ftrTile64Optimization flag to gmmlib 

Related-To: NEO-8053
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
This commit is contained in:
Mateusz Jablonski 2023-09-25 15:00:24 +00:00 committed by Compute-Runtime-Automation
parent 529aa60563
commit 071e240d15
7 changed files with 9 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
shared/source/sku_info/operations/sku_info_transfer.h
View File

@ -48,6 +48,7 @@ class SkuInfoTransfer {
TRANSFER_FTR_TO_GMM(Ppgtt64KBWalkOptimization);
TRANSFER_FTR_TO_GMM(Unified3DMediaCompressionFormats);
TRANSFER_FTR_TO_GMM(57bGPUAddressing);
TRANSFER_FTR_TO_GMM(Tile64Optimization);
#undef TRANSFER_FTR_TO_GMM
}

1
shared/source/sku_info/operations/windows/sku_info_receiver.h
View File

@ -67,6 +67,7 @@ class SkuInfoReceiver {
RECEIVE_FTR(Ppgtt64KBWalkOptimization);
RECEIVE_FTR(Unified3DMediaCompressionFormats);
RECEIVE_FTR(57bGPUAddressing);
RECEIVE_FTR(Tile64Optimization);
#undef RECEIVE_FTR
}

3
shared/source/sku_info/sku_info_base.h
View File

@ -65,7 +65,8 @@ struct FeatureTableBase {
uint32_t ftrPpgtt64KBWalkOptimization : 1;
uint32_t ftrUnified3DMediaCompressionFormats : 1;
uint32_t ftr57bGPUAddressing : 1;
uint32_t reserved : 23;
uint32_t ftrTile64Optimization : 1;
uint32_t reserved : 22;
};
BcsInfoMask ftrBcsInfo = 1;

1
shared/source/xe_hpg_core/hw_info_dg2.cpp
View File

@ -118,6 +118,7 @@ void DG2::setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo) {
featureTable->flags.ftrCCSRing = true;
featureTable->flags.ftrUnified3DMediaCompressionFormats = true;
featureTable->flags.ftrTile64Optimization = true;
workaroundTable->flags.wa4kAlignUVOffsetNV12LinearSurface = true;
};

1
shared/source/xe_hpg_core/hw_info_mtl.cpp
View File

@ -109,6 +109,7 @@ void MTL::setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo) {
featureTable->flags.ftrE2ECompression = false;
featureTable->flags.ftrCCSNode = true;
featureTable->flags.ftrCCSRing = true;
featureTable->flags.ftrTile64Optimization = true;
workaroundTable->flags.wa4kAlignUVOffsetNV12LinearSurface = true;
workaroundTable->flags.waUntypedBufferCompression = true;

2
shared/test/unit_test/sku_info/sku_info_base_reference.h
View File

@ -44,6 +44,7 @@ struct SkuInfoBaseReference {
refFtrTable.FtrPpgtt64KBWalkOptimization = 1;
refFtrTable.FtrUnified3DMediaCompressionFormats = 1;
refFtrTable.Ftr57bGPUAddressing = 1;
refFtrTable.FtrTile64Optimization = 1;
}
static void fillReferenceWaForTransfer(_WA_TABLE &refWaTable) {
@ -111,6 +112,7 @@ struct SkuInfoBaseReference {
refFtrTable.flags.ftrPpgtt64KBWalkOptimization = true;
refFtrTable.flags.ftrUnified3DMediaCompressionFormats = true;
refFtrTable.flags.ftr57bGPUAddressing = true;
refFtrTable.flags.ftrTile64Optimization = true;
}
static void fillReferenceWaToReceive(WorkaroundTable &refWaTable) {

1
shared/test/unit_test/xe_hpg_core/os_agnostic_product_helper_xe_lpg_tests.cpp
View File

@ -121,6 +121,7 @@ HWTEST2_F(XeLpgHwInfoTests, givenBoolWhenCallHardwareInfoSetupThenFeatureTableAn
EXPECT_EQ(setParamBool, featureTable.flags.ftrLinearCCS);
EXPECT_EQ(setParamBool, featureTable.flags.ftrCCSNode);
EXPECT_EQ(setParamBool, featureTable.flags.ftrCCSRing);
EXPECT_EQ(setParamBool, featureTable.flags.ftrTile64Optimization);
EXPECT_EQ(setParamBool, workaroundTable.flags.wa4kAlignUVOffsetNV12LinearSurface);
EXPECT_EQ(setParamBool, workaroundTable.flags.waUntypedBufferCompression);