mirror of
https://github.com/intel/compute-runtime.git
synced 2025-11-15 10:14:56 +08:00
New numerical approach to platforms in ocloc
For AOT feature, a new approach to passing the -device arg to ocloc is implemented. New character: <Major>.<Minor>.<Revision> Signed-off-by: Daria Hinz <daria.hinz@intel.com> Related-To: NEO-5954
This commit is contained in:
committed by
Compute-Runtime-Automation
parent
ef6f75d993
commit
0aeca8df22
39
shared/source/dll/devices/platforms.h
Normal file
39
shared/source/dll/devices/platforms.h
Normal file
@@ -0,0 +1,39 @@
|
||||
/*
|
||||
* Copyright (C) 2021 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
UNKNOWN_ISA = 0,
|
||||
BDW = 0x080000,
|
||||
SKL = 0x090000,
|
||||
KBL = 0x090100,
|
||||
CML = 0x090200,
|
||||
AML = 0x090200,
|
||||
WHL = 0x090200,
|
||||
CFL = 0x090200,
|
||||
BXT = 0x090300,
|
||||
APL = 0x090300,
|
||||
GLK = 0x090400,
|
||||
ICL = 0x0b0000,
|
||||
JSL = 0x0b0200,
|
||||
EHL = 0x0b0200,
|
||||
DG1 = 0x0c0000,
|
||||
RPL_S = 0x0c0000,
|
||||
ADL_P = 0x0c0000,
|
||||
ADL_S = 0x0c0000,
|
||||
RKL = 0x0c0000,
|
||||
TGL = 0x0c0000,
|
||||
XEHP_SDV = 0x0c0100,
|
||||
DG2_G10_A0 = 0x0c0200,
|
||||
DG2_G11 = 0x0c0201,
|
||||
DG2_G10_B0 = 0x0c0201,
|
||||
DG2_G12 = 0x0c0202,
|
||||
PVC_XL_A0 = 0x0c0300,
|
||||
PVC_XL_B0 = 0x0c0301,
|
||||
PVC_XT_A0 = 0x0c0400,
|
||||
PVC_XT_B0 = 0x0c0401,
|
||||
CONFIG_MAX_PLATFORM,
|
||||
} PRODUCT_CONFIG;
|
||||
24
shared/source/dll/devices/product_config.inl
Normal file
24
shared/source/dll/devices/product_config.inl
Normal file
@@ -0,0 +1,24 @@
|
||||
/*
|
||||
* Copyright (C) 2021 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
*/
|
||||
|
||||
#include "shared/source/dll/devices/product_config_base.inl"
|
||||
|
||||
#ifdef SUPPORT_XE_HPG_CORE
|
||||
#ifdef SUPPORT_DG2
|
||||
DEVICE_CONFIG_REVISION(DG2_G10_A0, DG2_CONFIG, 0x00)
|
||||
DEVICE_CONFIG_REVISION(DG2_G10_B0, DG2_CONFIG, 0x04)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if SUPPORT_XE_HPC_CORE
|
||||
#ifdef SUPPORT_PVC
|
||||
DEVICE_CONFIG_REVISION(PVC_XT_A0, PVC_CONFIG, 0x03)
|
||||
DEVICE_CONFIG_REVISION(PVC_XT_B0, PVC_CONFIG, 0x1E)
|
||||
DEVICE_CONFIG_REVISION(PVC_XL_A0, PVC_CONFIG, 0x00)
|
||||
DEVICE_CONFIG_REVISION(PVC_XL_B0, PVC_CONFIG, 0x01)
|
||||
#endif
|
||||
#endif
|
||||
66
shared/source/dll/devices/product_config_base.inl
Normal file
66
shared/source/dll/devices/product_config_base.inl
Normal file
@@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (C) 2021 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
*/
|
||||
|
||||
#ifdef SUPPORT_XE_HP_CORE
|
||||
#ifdef SUPPORT_XE_HP_SDV
|
||||
DEVICE_CONFIG(XEHP_SDV, XE_HP_SDV_CONFIG)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_GEN12LP
|
||||
#ifdef SUPPORT_TGLLP
|
||||
DEVICE_CONFIG(TGL, TGLLP_1x6x16)
|
||||
#endif
|
||||
#ifdef SUPPORT_DG1
|
||||
DEVICE_CONFIG(DG1, DG1_CONFIG)
|
||||
#endif
|
||||
#ifdef SUPPORT_RKL
|
||||
DEVICE_CONFIG(RKL, RKL_HW_CONFIG)
|
||||
#endif
|
||||
#ifdef SUPPORT_ADLS
|
||||
DEVICE_CONFIG(ADL_S, ADLS_HW_CONFIG)
|
||||
#endif
|
||||
#ifdef SUPPORT_ADLP
|
||||
DEVICE_CONFIG(ADL_P, ADLP_CONFIG)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_GEN11
|
||||
#ifdef SUPPORT_ICLLP
|
||||
DEVICE_CONFIG(ICL, ICLLP_1x8x8)
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_EHL
|
||||
DEVICE_CONFIG(EHL, EHL_HW_CONFIG)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_GEN9
|
||||
#ifdef SUPPORT_SKL
|
||||
DEVICE_CONFIG(SKL, SKL_1x3x8)
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_KBL
|
||||
DEVICE_CONFIG(KBL, KBL_1x3x6)
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_CFL
|
||||
DEVICE_CONFIG(CFL, CFL_1x3x6)
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_GLK
|
||||
DEVICE_CONFIG(GLK, GLK_1x3x6)
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_BXT
|
||||
DEVICE_CONFIG(BXT, BXT_1x3x6)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_GEN8
|
||||
DEVICE_CONFIG(BDW, BDW_1x3x8)
|
||||
#endif
|
||||
Reference in New Issue
Block a user