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Simplify code with offsetof.

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Change-Id: I23c1904daecc85623c01198c1e71232454ef2bb3
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
This commit is contained in:
Piotr Fusik
2019-04-11 14:29:28 +02:00
committed by sys_ocldev
parent 3a008fafc6
commit 2fd7a9a3bb
4 changed files with 4 additions and 20 deletions
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6
unit_tests/aub_tests/gen10/execution_model/enqueue_parent_kernel_tests_gen10.cpp
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@ -101,11 +101,7 @@ GEN10TEST_F(GEN10AUBParentKernelFixture, DISABLED_EnqueueParentKernel) {
pCmdQ->finish(false); pCmdQ->finish(false);
uint32_t expectedNumberOfEnqueues = 1; uint32_t expectedNumberOfEnqueues = 1;
IGIL_CommandQueue *igilQueue = reinterpret_cast<IGIL_CommandQueue *>(devQueue->getQueueBuffer()->getUnderlyingBuffer()); uint64_t gpuAddress = devQueue->getQueueBuffer()->getGpuAddress() + offsetof(IGIL_CommandQueue, m_controls.m_TotalNumberOfQueues);
uint64_t gpuAddress = devQueue->getQueueBuffer()->getGpuAddress();
uint32_t *pointerTonumberOfEnqueues = &igilQueue->m_controls.m_TotalNumberOfQueues;
size_t offsetToEnqueues = ptrDiff(pointerTonumberOfEnqueues, igilQueue);
gpuAddress = gpuAddress + offsetToEnqueues;
AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)gpuAddress, &expectedNumberOfEnqueues, sizeof(uint32_t)); AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)gpuAddress, &expectedNumberOfEnqueues, sizeof(uint32_t));
AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)buffer->getGraphicsAllocation()->getGpuAddress(), &argScalar, sizeof(size_t)); AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)buffer->getGraphicsAllocation()->getGpuAddress(), &argScalar, sizeof(size_t));

6
unit_tests/aub_tests/gen11/execution_model/enqueue_parent_kernel_tests_gen11.cpp
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@ -101,11 +101,7 @@ GEN11TEST_F(GEN11AUBParentKernelFixture, EnqueueParentKernel) {
pCmdQ->finish(false); pCmdQ->finish(false);
uint32_t expectedNumberOfEnqueues = 1; uint32_t expectedNumberOfEnqueues = 1;
IGIL_CommandQueue *igilQueue = reinterpret_cast<IGIL_CommandQueue *>(devQueue->getQueueBuffer()->getUnderlyingBuffer()); uint64_t gpuAddress = devQueue->getQueueBuffer()->getGpuAddress() + offsetof(IGIL_CommandQueue, m_controls.m_TotalNumberOfQueues);
uint64_t gpuAddress = devQueue->getQueueBuffer()->getGpuAddress();
uint32_t *pointerTonumberOfEnqueues = &igilQueue->m_controls.m_TotalNumberOfQueues;
size_t offsetToEnqueues = ptrDiff(pointerTonumberOfEnqueues, igilQueue);
gpuAddress = gpuAddress + offsetToEnqueues;
AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)gpuAddress, &expectedNumberOfEnqueues, sizeof(uint32_t)); AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)gpuAddress, &expectedNumberOfEnqueues, sizeof(uint32_t));
AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)buffer->getGraphicsAllocation()->getGpuAddress(), &argScalar, sizeof(size_t)); AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)buffer->getGraphicsAllocation()->getGpuAddress(), &argScalar, sizeof(size_t));

6
unit_tests/aub_tests/gen8/execution_model/enqueue_parent_kernel_tests_gen8.cpp
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@ -101,11 +101,7 @@ GEN8TEST_F(GEN8AUBParentKernelFixture, EnqueueParentKernel) {
pCmdQ->finish(false); pCmdQ->finish(false);
uint32_t expectedNumberOfEnqueues = 1; uint32_t expectedNumberOfEnqueues = 1;
IGIL_CommandQueue *igilQueue = reinterpret_cast<IGIL_CommandQueue *>(devQueue->getQueueBuffer()->getUnderlyingBuffer()); uint64_t gpuAddress = devQueue->getQueueBuffer()->getGpuAddress() + offsetof(IGIL_CommandQueue, m_controls.m_TotalNumberOfQueues);
uint64_t gpuAddress = devQueue->getQueueBuffer()->getGpuAddress();
uint32_t *pointerTonumberOfEnqueues = &igilQueue->m_controls.m_TotalNumberOfQueues;
size_t offsetToEnqueues = ptrDiff(pointerTonumberOfEnqueues, igilQueue);
gpuAddress = gpuAddress + offsetToEnqueues;
AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)gpuAddress, &expectedNumberOfEnqueues, sizeof(uint32_t)); AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)gpuAddress, &expectedNumberOfEnqueues, sizeof(uint32_t));
AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)buffer->getGraphicsAllocation()->getGpuAddress(), &argScalar, sizeof(size_t)); AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)buffer->getGraphicsAllocation()->getGpuAddress(), &argScalar, sizeof(size_t));

6
unit_tests/aub_tests/gen9/execution_model/enqueue_parent_kernel_tests_gen9.cpp
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@ -99,11 +99,7 @@ GEN9TEST_F(AUBParentKernelFixture, EnqueueParentKernel) {
pCmdQ->finish(false); pCmdQ->finish(false);
uint32_t expectedNumberOfEnqueues = 1; uint32_t expectedNumberOfEnqueues = 1;
IGIL_CommandQueue *igilQueue = reinterpret_cast<IGIL_CommandQueue *>(devQueue->getQueueBuffer()->getUnderlyingBuffer()); uint64_t gpuAddress = devQueue->getQueueBuffer()->getGpuAddress() + offsetof(IGIL_CommandQueue, m_controls.m_TotalNumberOfQueues);
uint64_t gpuAddress = devQueue->getQueueBuffer()->getGpuAddress();
uint32_t *pointerTonumberOfEnqueues = &igilQueue->m_controls.m_TotalNumberOfQueues;
size_t offsetToEnqueues = ptrDiff(pointerTonumberOfEnqueues, igilQueue);
gpuAddress = gpuAddress + offsetToEnqueues;
AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)gpuAddress, &expectedNumberOfEnqueues, sizeof(uint32_t)); AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)gpuAddress, &expectedNumberOfEnqueues, sizeof(uint32_t));
AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)buffer->getGraphicsAllocation()->getGpuAddress(), &argScalar, sizeof(size_t)); AUBCommandStreamFixture::expectMemory<FamilyType>((void *)(uintptr_t)buffer->getGraphicsAllocation()->getGpuAddress(), &argScalar, sizeof(size_t));