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Create a wrapper struct for drm_i915_reg_read

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Related-To: NEO-6852
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
This commit is contained in:
Mateusz Jablonski
2022-05-12 13:46:22 +00:00
committed by Compute-Runtime-Automation
parent 987ef450d1
commit 40e00e5c08
6 changed files with 35 additions and 29 deletions
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12
opencl/test/unit_test/linux/drm_null_device_tests.cpp
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@ -59,14 +59,14 @@ TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENcallIoctlTHENalwaysSuccess) {
}
TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENregReadOtherThenTimestampReadTHENalwaysSuccess) {
struct drm_i915_reg_read arg;
RegisterRead arg;
arg.offset = 0;
ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), 0);
}
TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENgetGpuTimestamp32bOr64bTHENerror) {
struct drm_i915_reg_read arg;
RegisterRead arg;
arg.offset = REG_GLOBAL_TIMESTAMP_LDW;
ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), -1);
@ -76,15 +76,15 @@ TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENgetGpuTimestamp32bOr64bTHENerro
}
TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENgetGpuTimestamp36bTHENproperValues) {
struct drm_i915_reg_read arg;
RegisterRead arg;
arg.offset = REG_GLOBAL_TIMESTAMP_LDW | 1;
ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), 0);
EXPECT_EQ(arg.val, 1000ULL);
EXPECT_EQ(arg.value, 1000ULL);
ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), 0);
EXPECT_EQ(arg.val, 2000ULL);
EXPECT_EQ(arg.value, 2000ULL);
ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), 0);
EXPECT_EQ(arg.val, 3000ULL);
EXPECT_EQ(arg.value, 3000ULL);
}

32
shared/source/os_interface/linux/device_time_drm.cpp
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@ -25,7 +25,7 @@ DeviceTimeDrm::DeviceTimeDrm(OSInterface *osInterface) {
}
void DeviceTimeDrm::timestampTypeDetect() {
struct drm_i915_reg_read reg = {};
RegisterRead reg = {};
int err;
if (pDrm == nullptr)
@ -47,50 +47,50 @@ void DeviceTimeDrm::timestampTypeDetect() {
}
bool DeviceTimeDrm::getGpuTime32(uint64_t *timestamp) {
struct drm_i915_reg_read reg = {};
RegisterRead reg = {};
reg.offset = REG_GLOBAL_TIMESTAMP_LDW;
if (pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg)) {
return false;
}
*timestamp = reg.val >> 32;
*timestamp = reg.value >> 32;
return true;
}
bool DeviceTimeDrm::getGpuTime36(uint64_t *timestamp) {
struct drm_i915_reg_read reg = {};
RegisterRead reg = {};
reg.offset = REG_GLOBAL_TIMESTAMP_LDW | 1;
if (pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg)) {
return false;
}
*timestamp = reg.val;
*timestamp = reg.value;
return true;
}
bool DeviceTimeDrm::getGpuTimeSplitted(uint64_t *timestamp) {
struct drm_i915_reg_read reg_hi = {};
struct drm_i915_reg_read reg_lo = {};
uint64_t tmp_hi;
RegisterRead regHi = {};
RegisterRead regLo = {};
uint64_t tmpHi;
int err = 0, loop = 3;
reg_hi.offset = REG_GLOBAL_TIMESTAMP_UN;
reg_lo.offset = REG_GLOBAL_TIMESTAMP_LDW;
regHi.offset = REG_GLOBAL_TIMESTAMP_UN;
regLo.offset = REG_GLOBAL_TIMESTAMP_LDW;
err += pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg_hi);
err += pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &regHi);
do {
tmp_hi = reg_hi.val;
err += pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg_lo);
err += pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg_hi);
} while (err == 0 && reg_hi.val != tmp_hi && --loop);
tmpHi = regHi.value;
err += pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &regLo);
err += pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &regHi);
} while (err == 0 && regHi.value != tmpHi && --loop);
if (err) {
return false;
}
*timestamp = reg_lo.val | (reg_hi.val << 32);
*timestamp = regLo.value | (regHi.value << 32);
return true;
}

5
shared/source/os_interface/linux/drm_null_device.h
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@ -23,12 +23,11 @@ class DrmNullDevice : public Drm {
if (request == DRM_IOCTL_I915_GETPARAM || request == DRM_IOCTL_I915_QUERY) {
return Drm::ioctl(request, arg);
} else if (request == DRM_IOCTL_I915_REG_READ) {
struct drm_i915_reg_read *regArg = static_cast<struct drm_i915_reg_read *>(arg);
auto *regArg = static_cast<RegisterRead *>(arg);
// Handle only 36b timestamp
if (regArg->offset == (REG_GLOBAL_TIMESTAMP_LDW | 1)) {
gpuTimestamp += 1000;
regArg->val = gpuTimestamp & 0x0000000FFFFFFFFF;
regArg->value = gpuTimestamp & 0x0000000FFFFFFFFF;
} else if (regArg->offset == REG_GLOBAL_TIMESTAMP_LDW || regArg->offset == REG_GLOBAL_TIMESTAMP_UN) {
return -1;
}

4
shared/source/os_interface/linux/ioctl_helper.cpp
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@ -18,6 +18,10 @@ uint32_t IoctlHelper::ioctl(Drm *drm, unsigned long request, void *arg) {
return drm->ioctl(request, arg);
}
static_assert(sizeof(RegisterRead) == sizeof(drm_i915_reg_read));
static_assert(offsetof(RegisterRead, offset) == offsetof(drm_i915_reg_read, offset));
static_assert(offsetof(RegisterRead, value) == offsetof(drm_i915_reg_read, val));
static_assert(sizeof(ExecObject) == sizeof(drm_i915_gem_exec_object2));
void IoctlHelper::fillExecObject(ExecObject &execObject, uint32_t handle, uint64_t gpuAddress, uint32_t drmContextId, bool bindInfo, bool isMarkedForCapture) {

5
shared/source/os_interface/linux/ioctl_helper.h
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@ -71,6 +71,11 @@ struct UuidRegisterResult {
uint32_t handle;
};
struct RegisterRead {
uint64_t offset;
uint64_t value;
};
using MemRegionsVec = StackVec<MemoryClassInstance, 5>;
using VmBindExtSetPatT = uint8_t[40];
using VmBindExtUserFenceT = uint8_t[56];

6
shared/test/common/os_interface/linux/device_command_stream_fixture.h
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@ -12,13 +12,11 @@
#include "shared/source/os_interface/linux/drm_neo.h"
#include "shared/test/common/helpers/default_hw_info.h"
#include "drm/i915_drm.h"
#include "engine_node.h"
#include "gtest/gtest.h"
#include <atomic>
#include <cstdint>
#include <iostream>
using NEO::Drm;
using NEO::HwDeviceIdDrm;
@ -76,8 +74,8 @@ class DrmMockTime : public DrmMockSuccess {
public:
using DrmMockSuccess::DrmMockSuccess;
int ioctl(unsigned long request, void *arg) override {
drm_i915_reg_read *reg = reinterpret_cast<drm_i915_reg_read *>(arg);
reg->val = getVal() << 32;
auto *reg = reinterpret_cast<NEO::RegisterRead *>(arg);
reg->value = getVal() << 32;
return 0;
};