For HostPtr surfaces of enqueue calls use GPU address
Change-Id: I67bf5076d23d43438f5e82c5cb6cbd3b9ed2f152
This commit is contained in:
parent
7198c604f9
commit
45dedb37f3
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@ -2,4 +2,4 @@
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neoDependenciesRev='735095-769'
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neoDependenciesRev='735095-769'
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strategy='EQUAL'
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strategy='EQUAL'
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allowedF=43
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allowedF=43
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allowedCD=342
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allowedCD=341
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@ -427,18 +427,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyBufferRect> : public BuiltinDispatchI
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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// Store source and destination surfaces for residency purposes
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if (operationParams.srcMemObj) {
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.srcMemObj)));
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} else {
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new HostPtrSurface(operationParams.srcPtr, hostPtrSize)));
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}
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if (operationParams.dstMemObj) {
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.dstMemObj)));
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} else {
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new HostPtrSurface(operationParams.dstPtr, hostPtrSize)));
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}
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return true;
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return true;
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}
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}
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@ -601,14 +589,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyBufferToImage3d> : public BuiltinDisp
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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// Store source and destination surfaces for residency purposes
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if (operationParams.srcMemObj) {
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.srcMemObj)));
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} else {
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<HostPtrSurface>(new HostPtrSurface(operationParams.srcPtr, hostPtrSize)));
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}
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.dstMemObj)));
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return true;
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return true;
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}
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}
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@ -695,14 +675,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyImage3dToBuffer> : public BuiltinDisp
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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// Store source and destination surfaces for residency purposes
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.srcMemObj)));
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if (operationParams.dstMemObj) {
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.dstMemObj)));
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} else {
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new HostPtrSurface(operationParams.dstPtr, hostPtrSize)));
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}
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return true;
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return true;
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}
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}
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@ -768,10 +740,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyImageToImage3d> : public BuiltinDispa
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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// Store source and destination surfaces for residency purposes
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(srcImage)));
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(dstImage)));
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return true;
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return true;
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}
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}
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@ -830,9 +798,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::FillImage3d> : public BuiltinDispatchInfo
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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kernelNoSplit3DBuilder.bake(multiDispatchInfo);
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// Store destination surface for residency purposes
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multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(image)));
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return true;
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return true;
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}
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}
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@ -340,6 +340,8 @@ class CommandQueueHw : public CommandQueue {
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protected:
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protected:
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MOCKABLE_VIRTUAL void enqueueHandlerHook(const unsigned int commandType, const MultiDispatchInfo &dispatchInfo);
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MOCKABLE_VIRTUAL void enqueueHandlerHook(const unsigned int commandType, const MultiDispatchInfo &dispatchInfo);
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bool createAllocationForHostSurface(HostPtrSurface &surface);
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size_t calculateHostPtrSizeForImage(size_t *region, size_t rowPitch, size_t slicePitch, Image *image);
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private:
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private:
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bool isTaskLevelUpdateRequired(const uint32_t &taskLevel, const cl_event *eventWaitList, const cl_uint &numEventsInWaitList, unsigned int commandType);
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bool isTaskLevelUpdateRequired(const uint32_t &taskLevel, const cl_event *eventWaitList, const cl_uint &numEventsInWaitList, unsigned int commandType);
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@ -30,6 +30,7 @@
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#include "runtime/helpers/kernel_commands.h"
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#include "runtime/helpers/kernel_commands.h"
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#include "runtime/helpers/dispatch_info_builder.h"
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#include "runtime/helpers/dispatch_info_builder.h"
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#include "runtime/mem_obj/buffer.h"
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#include "runtime/mem_obj/buffer.h"
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#include "runtime/mem_obj/image.h"
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#include "runtime/memory_manager/memory_manager.h"
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#include "runtime/memory_manager/memory_manager.h"
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#include "runtime/memory_manager/surface.h"
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#include "runtime/memory_manager/surface.h"
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#include "runtime/built_ins/built_ins.h"
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#include "runtime/built_ins/built_ins.h"
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@ -667,4 +668,26 @@ void CommandQueueHw<GfxFamily>::computeOffsetsValueForRectCommands(size_t *buffe
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*bufferOffset = bufferOrigin[2] * computedBufferSlicePitch + bufferOrigin[1] * computedBufferRowPitch + bufferOrigin[0];
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*bufferOffset = bufferOrigin[2] * computedBufferSlicePitch + bufferOrigin[1] * computedBufferRowPitch + bufferOrigin[0];
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*hostOffset = hostOrigin[2] * computedHostSlicePitch + hostOrigin[1] * computedHostRowPitch + hostOrigin[0];
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*hostOffset = hostOrigin[2] * computedHostSlicePitch + hostOrigin[1] * computedHostRowPitch + hostOrigin[0];
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}
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}
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template <typename GfxFamily>
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bool CommandQueueHw<GfxFamily>::createAllocationForHostSurface(HostPtrSurface &surface) {
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auto memoryManager = device->getCommandStreamReceiver().getMemoryManager();
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GraphicsAllocation *allocation = memoryManager->allocateGraphicsMemory(surface.getSurfaceSize(), surface.getMemoryPointer());
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if (allocation == nullptr) {
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return false;
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}
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allocation->taskCount = Event::eventNotReady;
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surface.setAllocation(allocation);
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memoryManager->storeAllocation(std::unique_ptr<GraphicsAllocation>(allocation), TEMPORARY_ALLOCATION);
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return true;
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}
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template <typename GfxFamily>
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size_t CommandQueueHw<GfxFamily>::calculateHostPtrSizeForImage(size_t *region, size_t rowPitch, size_t slicePitch, Image *image) {
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auto bytesPerPixel = image->getSurfaceFormatInfo().ImageElementSizeInBytes;
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auto dstRowPitch = rowPitch ? rowPitch : region[0] * bytesPerPixel;
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auto dstSlicePitch = slicePitch ? slicePitch : ((image->getImageDesc().image_type == CL_MEM_OBJECT_IMAGE1D_ARRAY ? 1 : region[1]) * dstRowPitch);
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return Image::calculateHostPtrSize(region, dstRowPitch, dstSlicePitch, bytesPerPixel, image->getImageDesc().image_type);
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}
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} // namespace OCLRT
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} // namespace OCLRT
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2017, Intel Corporation
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* Copyright (c) 2017 - 2018, Intel Corporation
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@ -52,6 +52,10 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferRect(
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this->getContext(), this->getDevice());
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this->getContext(), this->getDevice());
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builder.takeOwnership(this->context);
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builder.takeOwnership(this->context);
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MemObjSurface srcBufferSurf(srcBuffer);
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MemObjSurface dstBufferSurf(dstBuffer);
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Surface *surfaces[] = {&srcBufferSurf, &dstBufferSurf};
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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dc.srcMemObj = srcBuffer;
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dc.srcMemObj = srcBuffer;
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dc.dstMemObj = dstBuffer;
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dc.dstMemObj = dstBuffer;
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@ -65,8 +69,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferRect(
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builder.buildDispatchInfos(dispatchInfo, dc);
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builder.buildDispatchInfos(dispatchInfo, dc);
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enqueueHandler<CL_COMMAND_COPY_BUFFER_RECT>(
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enqueueHandler<CL_COMMAND_COPY_BUFFER_RECT>(
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dispatchInfo.getUsedSurfaces().begin(),
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surfaces,
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dispatchInfo.getUsedSurfaces().size(),
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false,
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false,
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dispatchInfo,
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dispatchInfo,
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numEventsInWaitList,
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numEventsInWaitList,
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@ -77,4 +80,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferRect(
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return CL_SUCCESS;
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return CL_SUCCESS;
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}
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}
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}
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} // namespace OCLRT
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2017, Intel Corporation
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* Copyright (c) 2017 - 2018, Intel Corporation
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@ -51,6 +51,10 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferToImage(
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this->getContext(), this->getDevice());
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this->getContext(), this->getDevice());
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builder.takeOwnership(this->context);
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builder.takeOwnership(this->context);
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MemObjSurface srcBufferSurf(srcBuffer);
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MemObjSurface dstImgSurf(dstImage);
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Surface *surfaces[] = {&srcBufferSurf, &dstImgSurf};
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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dc.srcMemObj = srcBuffer;
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dc.srcMemObj = srcBuffer;
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dc.dstMemObj = dstImage;
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dc.dstMemObj = dstImage;
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@ -60,8 +64,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferToImage(
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builder.buildDispatchInfos(di, dc);
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builder.buildDispatchInfos(di, dc);
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enqueueHandler<CL_COMMAND_COPY_BUFFER_TO_IMAGE>(
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enqueueHandler<CL_COMMAND_COPY_BUFFER_TO_IMAGE>(
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di.getUsedSurfaces().begin(),
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surfaces,
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di.getUsedSurfaces().size(),
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false,
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false,
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di,
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di,
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numEventsInWaitList,
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numEventsInWaitList,
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@ -72,4 +75,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferToImage(
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return CL_SUCCESS;
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return CL_SUCCESS;
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}
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}
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}
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} // namespace OCLRT
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2017, Intel Corporation
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* Copyright (c) 2017 - 2018, Intel Corporation
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@ -51,6 +51,10 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImage(
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this->getContext(), this->getDevice());
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this->getContext(), this->getDevice());
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builder.takeOwnership(this->context);
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builder.takeOwnership(this->context);
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MemObjSurface srcImgSurf(srcImage);
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MemObjSurface dstImgSurf(dstImage);
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Surface *surfaces[] = {&srcImgSurf, &dstImgSurf};
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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dc.srcMemObj = srcImage;
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dc.srcMemObj = srcImage;
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dc.dstMemObj = dstImage;
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dc.dstMemObj = dstImage;
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@ -60,8 +64,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImage(
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builder.buildDispatchInfos(di, dc);
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builder.buildDispatchInfos(di, dc);
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enqueueHandler<CL_COMMAND_COPY_IMAGE>(
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enqueueHandler<CL_COMMAND_COPY_IMAGE>(
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di.getUsedSurfaces().begin(),
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surfaces,
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di.getUsedSurfaces().size(),
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false,
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false,
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di,
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di,
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numEventsInWaitList,
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numEventsInWaitList,
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@ -72,4 +75,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImage(
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return CL_SUCCESS;
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return CL_SUCCESS;
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}
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}
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}
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} // namespace OCLRT
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2017, Intel Corporation
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* Copyright (c) 2017 - 2018, Intel Corporation
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@ -51,6 +51,10 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImageToBuffer(
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this->getContext(), this->getDevice());
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this->getContext(), this->getDevice());
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builder.takeOwnership(this->context);
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builder.takeOwnership(this->context);
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MemObjSurface srcImgSurf(srcImage);
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MemObjSurface dstBufferSurf(dstBuffer);
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Surface *surfaces[] = {&srcImgSurf, &dstBufferSurf};
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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dc.srcMemObj = srcImage;
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dc.srcMemObj = srcImage;
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dc.dstMemObj = dstBuffer;
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dc.dstMemObj = dstBuffer;
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@ -60,8 +64,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImageToBuffer(
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builder.buildDispatchInfos(di, dc);
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builder.buildDispatchInfos(di, dc);
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enqueueHandler<CL_COMMAND_COPY_IMAGE_TO_BUFFER>(
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enqueueHandler<CL_COMMAND_COPY_IMAGE_TO_BUFFER>(
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di.getUsedSurfaces().begin(),
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surfaces,
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di.getUsedSurfaces().size(),
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false,
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false,
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di,
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di,
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numEventsInWaitList,
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numEventsInWaitList,
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@ -72,4 +75,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImageToBuffer(
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return CL_SUCCESS;
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return CL_SUCCESS;
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}
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}
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}
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} // namespace OCLRT
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2017, Intel Corporation
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* Copyright (c) 2017 - 2018, Intel Corporation
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@ -51,6 +51,9 @@ cl_int CommandQueueHw<GfxFamily>::enqueueFillImage(
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this->getContext(), this->getDevice());
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this->getContext(), this->getDevice());
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builder.takeOwnership(this->context);
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builder.takeOwnership(this->context);
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MemObjSurface dstImgSurf(image);
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Surface *surfaces[] = {&dstImgSurf};
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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dc.srcPtr = const_cast<void *>(fillColor);
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dc.srcPtr = const_cast<void *>(fillColor);
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dc.dstMemObj = image;
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dc.dstMemObj = image;
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@ -60,8 +63,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueFillImage(
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builder.buildDispatchInfos(di, dc);
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builder.buildDispatchInfos(di, dc);
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enqueueHandler<CL_COMMAND_FILL_IMAGE>(
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enqueueHandler<CL_COMMAND_FILL_IMAGE>(
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di.getUsedSurfaces().begin(),
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surfaces,
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di.getUsedSurfaces().size(),
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false,
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false,
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di,
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di,
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numEventsInWaitList,
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numEventsInWaitList,
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@ -72,4 +74,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueFillImage(
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return CL_SUCCESS;
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return CL_SUCCESS;
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}
|
}
|
||||||
}
|
} // namespace OCLRT
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -96,17 +96,28 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBuffer(
|
||||||
this->getContext(), this->getDevice());
|
this->getContext(), this->getDevice());
|
||||||
builder.takeOwnership(this->context);
|
builder.takeOwnership(this->context);
|
||||||
|
|
||||||
|
void *dstPtr = ptr;
|
||||||
|
|
||||||
|
MemObjSurface bufferSurf(buffer);
|
||||||
|
HostPtrSurface hostPtrSurf(dstPtr, size);
|
||||||
|
Surface *surfaces[] = {&bufferSurf, &hostPtrSurf};
|
||||||
|
|
||||||
|
if (size != 0) {
|
||||||
|
bool status = createAllocationForHostSurface(hostPtrSurf);
|
||||||
|
if (!status) {
|
||||||
|
builder.releaseOwnership();
|
||||||
|
return CL_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
dstPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
|
||||||
|
}
|
||||||
|
|
||||||
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
||||||
dc.dstPtr = ptr;
|
dc.dstPtr = dstPtr;
|
||||||
dc.srcMemObj = buffer;
|
dc.srcMemObj = buffer;
|
||||||
dc.srcOffset = {offset, 0, 0};
|
dc.srcOffset = {offset, 0, 0};
|
||||||
dc.size = {size, 0, 0};
|
dc.size = {size, 0, 0};
|
||||||
builder.buildDispatchInfos(dispatchInfo, dc);
|
builder.buildDispatchInfos(dispatchInfo, dc);
|
||||||
|
|
||||||
MemObjSurface s1(buffer);
|
|
||||||
HostPtrSurface s2(ptr, size);
|
|
||||||
Surface *surfaces[] = {&s1, &s2};
|
|
||||||
|
|
||||||
if (context->isProvidingPerformanceHints()) {
|
if (context->isProvidingPerformanceHints()) {
|
||||||
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_REQUIRES_COPY_DATA, static_cast<cl_mem>(buffer), ptr);
|
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_REQUIRES_COPY_DATA, static_cast<cl_mem>(buffer), ptr);
|
||||||
if (!isL3Capable(ptr, size)) {
|
if (!isL3Capable(ptr, size)) {
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -81,9 +81,27 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
|
||||||
this->getContext(), this->getDevice());
|
this->getContext(), this->getDevice());
|
||||||
builder.takeOwnership(this->context);
|
builder.takeOwnership(this->context);
|
||||||
|
|
||||||
|
size_t hostPtrSize = Buffer::calculateHostPtrSize(hostOrigin, region, hostRowPitch, hostSlicePitch);
|
||||||
|
void *dstPtr = ptr;
|
||||||
|
|
||||||
|
MemObjSurface bufferSurf(buffer);
|
||||||
|
HostPtrSurface hostPtrSurf(dstPtr, hostPtrSize);
|
||||||
|
Surface *surfaces[] = {&bufferSurf, &hostPtrSurf};
|
||||||
|
|
||||||
|
if (region[0] != 0 &&
|
||||||
|
region[1] != 0 &&
|
||||||
|
region[2] != 0) {
|
||||||
|
bool status = createAllocationForHostSurface(hostPtrSurf);
|
||||||
|
if (!status) {
|
||||||
|
builder.releaseOwnership();
|
||||||
|
return CL_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
dstPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
|
||||||
|
}
|
||||||
|
|
||||||
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
||||||
dc.srcMemObj = buffer;
|
dc.srcMemObj = buffer;
|
||||||
dc.dstPtr = ptr;
|
dc.dstPtr = dstPtr;
|
||||||
dc.srcOffset = bufferOrigin;
|
dc.srcOffset = bufferOrigin;
|
||||||
dc.dstOffset = hostOrigin;
|
dc.dstOffset = hostOrigin;
|
||||||
dc.size = region;
|
dc.size = region;
|
||||||
|
@ -94,8 +112,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
|
||||||
builder.buildDispatchInfos(dispatchInfo, dc);
|
builder.buildDispatchInfos(dispatchInfo, dc);
|
||||||
|
|
||||||
enqueueHandler<CL_COMMAND_READ_BUFFER_RECT>(
|
enqueueHandler<CL_COMMAND_READ_BUFFER_RECT>(
|
||||||
dispatchInfo.getUsedSurfaces().begin(),
|
surfaces,
|
||||||
dispatchInfo.getUsedSurfaces().size(),
|
|
||||||
blockingRead == CL_TRUE,
|
blockingRead == CL_TRUE,
|
||||||
dispatchInfo,
|
dispatchInfo,
|
||||||
numEventsInWaitList,
|
numEventsInWaitList,
|
||||||
|
@ -106,10 +123,8 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
|
||||||
|
|
||||||
if (context->isProvidingPerformanceHints()) {
|
if (context->isProvidingPerformanceHints()) {
|
||||||
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_RECT_REQUIRES_COPY_DATA, static_cast<cl_mem>(buffer), ptr);
|
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_RECT_REQUIRES_COPY_DATA, static_cast<cl_mem>(buffer), ptr);
|
||||||
HostPtrSurface *hps = dispatchInfo.getHostPtrSurface();
|
if (!isL3Capable(ptr, hostPtrSize)) {
|
||||||
DEBUG_BREAK_IF(!((hps != nullptr) && (hps->getMemoryPointer() == ptr)));
|
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_RECT_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, ptr, hostPtrSize, MemoryConstants::pageSize, MemoryConstants::pageSize);
|
||||||
if (!isL3Capable(hps->getMemoryPointer(), hps->getSurfaceSize())) {
|
|
||||||
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_RECT_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, hps->getMemoryPointer(), hps->getSurfaceSize(), MemoryConstants::pageSize, MemoryConstants::pageSize);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -83,9 +83,27 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadImage(
|
||||||
|
|
||||||
builder.takeOwnership(this->context);
|
builder.takeOwnership(this->context);
|
||||||
|
|
||||||
|
size_t hostPtrSize = calculateHostPtrSizeForImage(const_cast<size_t *>(region), inputRowPitch, inputSlicePitch, srcImage);
|
||||||
|
void *dstPtr = ptr;
|
||||||
|
|
||||||
|
MemObjSurface srcImgSurf(srcImage);
|
||||||
|
HostPtrSurface hostPtrSurf(dstPtr, hostPtrSize);
|
||||||
|
Surface *surfaces[] = {&srcImgSurf, &hostPtrSurf};
|
||||||
|
|
||||||
|
if (region[0] != 0 &&
|
||||||
|
region[1] != 0 &&
|
||||||
|
region[2] != 0) {
|
||||||
|
bool status = createAllocationForHostSurface(hostPtrSurf);
|
||||||
|
if (!status) {
|
||||||
|
builder.releaseOwnership();
|
||||||
|
return CL_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
dstPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
|
||||||
|
}
|
||||||
|
|
||||||
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
||||||
dc.srcMemObj = srcImage;
|
dc.srcMemObj = srcImage;
|
||||||
dc.dstPtr = ptr;
|
dc.dstPtr = dstPtr;
|
||||||
dc.srcOffset = origin;
|
dc.srcOffset = origin;
|
||||||
dc.size = region;
|
dc.size = region;
|
||||||
dc.srcRowPitch = inputRowPitch;
|
dc.srcRowPitch = inputRowPitch;
|
||||||
|
@ -93,8 +111,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadImage(
|
||||||
builder.buildDispatchInfos(di, dc);
|
builder.buildDispatchInfos(di, dc);
|
||||||
|
|
||||||
enqueueHandler<CL_COMMAND_READ_IMAGE>(
|
enqueueHandler<CL_COMMAND_READ_IMAGE>(
|
||||||
di.getUsedSurfaces().begin(),
|
surfaces,
|
||||||
di.getUsedSurfaces().size(),
|
|
||||||
blockingRead == CL_TRUE,
|
blockingRead == CL_TRUE,
|
||||||
di,
|
di,
|
||||||
numEventsInWaitList,
|
numEventsInWaitList,
|
||||||
|
@ -104,10 +121,8 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadImage(
|
||||||
builder.releaseOwnership();
|
builder.releaseOwnership();
|
||||||
|
|
||||||
if (context->isProvidingPerformanceHints()) {
|
if (context->isProvidingPerformanceHints()) {
|
||||||
HostPtrSurface *hps = di.getHostPtrSurface();
|
if (!isL3Capable(ptr, hostPtrSize)) {
|
||||||
DEBUG_BREAK_IF(!((hps != nullptr) && (hps->getMemoryPointer() == ptr)));
|
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_IMAGE_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, ptr, hostPtrSize, MemoryConstants::pageSize, MemoryConstants::pageSize);
|
||||||
if (!isL3Capable(hps->getMemoryPointer(), hps->getSurfaceSize())) {
|
|
||||||
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_IMAGE_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, hps->getMemoryPointer(), hps->getSurfaceSize(), MemoryConstants::pageSize, MemoryConstants::pageSize);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -97,17 +97,28 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBuffer(
|
||||||
|
|
||||||
builder.takeOwnership(this->context);
|
builder.takeOwnership(this->context);
|
||||||
|
|
||||||
|
void *srcPtr = const_cast<void *>(ptr);
|
||||||
|
|
||||||
|
MemObjSurface bufferSurf(buffer);
|
||||||
|
HostPtrSurface hostPtrSurf(srcPtr, size);
|
||||||
|
Surface *surfaces[] = {&bufferSurf, &hostPtrSurf};
|
||||||
|
|
||||||
|
if (size != 0) {
|
||||||
|
bool status = createAllocationForHostSurface(hostPtrSurf);
|
||||||
|
if (!status) {
|
||||||
|
builder.releaseOwnership();
|
||||||
|
return CL_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
srcPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
|
||||||
|
}
|
||||||
|
|
||||||
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
||||||
dc.srcPtr = const_cast<void *>(ptr);
|
dc.srcPtr = srcPtr;
|
||||||
dc.dstMemObj = buffer;
|
dc.dstMemObj = buffer;
|
||||||
dc.dstOffset = {offset, 0, 0};
|
dc.dstOffset = {offset, 0, 0};
|
||||||
dc.size = {size, 0, 0};
|
dc.size = {size, 0, 0};
|
||||||
builder.buildDispatchInfos(dispatchInfo, dc);
|
builder.buildDispatchInfos(dispatchInfo, dc);
|
||||||
|
|
||||||
MemObjSurface s1(buffer);
|
|
||||||
HostPtrSurface s2(const_cast<void *>(ptr), size);
|
|
||||||
Surface *surfaces[] = {&s1, &s2};
|
|
||||||
|
|
||||||
enqueueHandler<CL_COMMAND_WRITE_BUFFER>(
|
enqueueHandler<CL_COMMAND_WRITE_BUFFER>(
|
||||||
surfaces,
|
surfaces,
|
||||||
blockingWrite == CL_TRUE,
|
blockingWrite == CL_TRUE,
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -80,8 +80,26 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBufferRect(
|
||||||
this->getContext(), this->getDevice());
|
this->getContext(), this->getDevice());
|
||||||
builder.takeOwnership(this->context);
|
builder.takeOwnership(this->context);
|
||||||
|
|
||||||
|
size_t hostPtrSize = Buffer::calculateHostPtrSize(hostOrigin, region, hostRowPitch, hostSlicePitch);
|
||||||
|
void *srcPtr = const_cast<void *>(ptr);
|
||||||
|
|
||||||
|
MemObjSurface dstBufferSurf(buffer);
|
||||||
|
HostPtrSurface hostPtrSurf(srcPtr, hostPtrSize);
|
||||||
|
Surface *surfaces[] = {&dstBufferSurf, &hostPtrSurf};
|
||||||
|
|
||||||
|
if (region[0] != 0 &&
|
||||||
|
region[1] != 0 &&
|
||||||
|
region[2] != 0) {
|
||||||
|
bool status = createAllocationForHostSurface(hostPtrSurf);
|
||||||
|
if (!status) {
|
||||||
|
builder.releaseOwnership();
|
||||||
|
return CL_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
srcPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
|
||||||
|
}
|
||||||
|
|
||||||
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
||||||
dc.srcPtr = const_cast<void *>(ptr);
|
dc.srcPtr = srcPtr;
|
||||||
dc.dstMemObj = buffer;
|
dc.dstMemObj = buffer;
|
||||||
dc.srcOffset = hostOrigin;
|
dc.srcOffset = hostOrigin;
|
||||||
dc.dstOffset = bufferOrigin;
|
dc.dstOffset = bufferOrigin;
|
||||||
|
@ -93,8 +111,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBufferRect(
|
||||||
builder.buildDispatchInfos(dispatchInfo, dc);
|
builder.buildDispatchInfos(dispatchInfo, dc);
|
||||||
|
|
||||||
enqueueHandler<CL_COMMAND_WRITE_BUFFER_RECT>(
|
enqueueHandler<CL_COMMAND_WRITE_BUFFER_RECT>(
|
||||||
dispatchInfo.getUsedSurfaces().begin(),
|
surfaces,
|
||||||
dispatchInfo.getUsedSurfaces().size(),
|
|
||||||
blockingWrite == CL_TRUE,
|
blockingWrite == CL_TRUE,
|
||||||
dispatchInfo,
|
dispatchInfo,
|
||||||
numEventsInWaitList,
|
numEventsInWaitList,
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -80,8 +80,26 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteImage(
|
||||||
|
|
||||||
builder.takeOwnership(this->context);
|
builder.takeOwnership(this->context);
|
||||||
|
|
||||||
|
size_t hostPtrSize = calculateHostPtrSizeForImage(const_cast<size_t *>(region), inputRowPitch, inputSlicePitch, dstImage);
|
||||||
|
void *srcPtr = const_cast<void *>(ptr);
|
||||||
|
|
||||||
|
MemObjSurface dstImgSurf(dstImage);
|
||||||
|
HostPtrSurface hostPtrSurf(srcPtr, hostPtrSize);
|
||||||
|
Surface *surfaces[] = {&dstImgSurf, &hostPtrSurf};
|
||||||
|
|
||||||
|
if (region[0] != 0 &&
|
||||||
|
region[1] != 0 &&
|
||||||
|
region[2] != 0) {
|
||||||
|
bool status = createAllocationForHostSurface(hostPtrSurf);
|
||||||
|
if (!status) {
|
||||||
|
builder.releaseOwnership();
|
||||||
|
return CL_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
srcPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
|
||||||
|
}
|
||||||
|
|
||||||
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
|
||||||
dc.srcPtr = const_cast<void *>(ptr);
|
dc.srcPtr = srcPtr;
|
||||||
dc.dstMemObj = dstImage;
|
dc.dstMemObj = dstImage;
|
||||||
dc.dstOffset = origin;
|
dc.dstOffset = origin;
|
||||||
dc.size = region;
|
dc.size = region;
|
||||||
|
@ -90,8 +108,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteImage(
|
||||||
builder.buildDispatchInfos(di, dc);
|
builder.buildDispatchInfos(di, dc);
|
||||||
|
|
||||||
enqueueHandler<CL_COMMAND_WRITE_IMAGE>(
|
enqueueHandler<CL_COMMAND_WRITE_IMAGE>(
|
||||||
di.getUsedSurfaces().begin(),
|
surfaces,
|
||||||
di.getUsedSurfaces().size(),
|
|
||||||
blockingWrite == CL_TRUE,
|
blockingWrite == CL_TRUE,
|
||||||
di,
|
di,
|
||||||
numEventsInWaitList,
|
numEventsInWaitList,
|
||||||
|
|
|
@ -98,6 +98,13 @@ GraphicsAllocation *CommandStreamReceiver::createAllocationAndHandleResidency(co
|
||||||
return graphicsAllocation;
|
return graphicsAllocation;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void CommandStreamReceiver::makeResidentHostPtrAllocation(GraphicsAllocation *gfxAllocation) {
|
||||||
|
makeResident(*gfxAllocation);
|
||||||
|
if (!gfxAllocation->isL3Capable()) {
|
||||||
|
setDisableL3Cache(true);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
void CommandStreamReceiver::waitForTaskCountAndCleanAllocationList(uint32_t requiredTaskCount, uint32_t allocationType) {
|
void CommandStreamReceiver::waitForTaskCountAndCleanAllocationList(uint32_t requiredTaskCount, uint32_t allocationType) {
|
||||||
|
|
||||||
auto address = getTagAddress();
|
auto address = getTagAddress();
|
||||||
|
@ -161,7 +168,6 @@ void CommandStreamReceiver::cleanupResources() {
|
||||||
scratchAllocation = nullptr;
|
scratchAllocation = nullptr;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
if (commandStream.getBase()) {
|
if (commandStream.getBase()) {
|
||||||
memoryManager->freeGraphicsMemory(commandStream.getGraphicsAllocation());
|
memoryManager->freeGraphicsMemory(commandStream.getGraphicsAllocation());
|
||||||
commandStream.replaceGraphicsAllocation(nullptr);
|
commandStream.replaceGraphicsAllocation(nullptr);
|
||||||
|
|
|
@ -71,6 +71,7 @@ class CommandStreamReceiver {
|
||||||
void makeSurfacePackNonResident(ResidencyContainer *allocationsForResidency);
|
void makeSurfacePackNonResident(ResidencyContainer *allocationsForResidency);
|
||||||
virtual void processResidency(ResidencyContainer *allocationsForResidency) {}
|
virtual void processResidency(ResidencyContainer *allocationsForResidency) {}
|
||||||
virtual void processEviction();
|
virtual void processEviction();
|
||||||
|
void makeResidentHostPtrAllocation(GraphicsAllocation *gfxAllocation);
|
||||||
|
|
||||||
virtual void addPipeControl(LinearStream &commandStream, bool dcFlush) = 0;
|
virtual void addPipeControl(LinearStream &commandStream, bool dcFlush) = 0;
|
||||||
|
|
||||||
|
@ -122,6 +123,10 @@ class CommandStreamReceiver {
|
||||||
void setSamplerCacheFlushRequired(SamplerCacheFlushState value) { this->samplerCacheFlushRequired = value; }
|
void setSamplerCacheFlushRequired(SamplerCacheFlushState value) { this->samplerCacheFlushRequired = value; }
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
|
void setDisableL3Cache(bool val) {
|
||||||
|
disableL3Cache = val;
|
||||||
|
}
|
||||||
|
|
||||||
// taskCount - # of tasks submitted
|
// taskCount - # of tasks submitted
|
||||||
uint32_t taskCount = 0;
|
uint32_t taskCount = 0;
|
||||||
// current taskLevel. Used for determining if a PIPE_CONTROL is needed.
|
// current taskLevel. Used for determining if a PIPE_CONTROL is needed.
|
||||||
|
@ -159,7 +164,7 @@ class CommandStreamReceiver {
|
||||||
std::unique_ptr<SubmissionAggregator> submissionAggregator;
|
std::unique_ptr<SubmissionAggregator> submissionAggregator;
|
||||||
|
|
||||||
DispatchMode dispatchMode = ImmediateDispatch;
|
DispatchMode dispatchMode = ImmediateDispatch;
|
||||||
bool disableL3Cache = 0;
|
bool disableL3Cache = false;
|
||||||
uint32_t requiredScratchSize = 0;
|
uint32_t requiredScratchSize = 0;
|
||||||
uint64_t totalMemoryUsed = 0u;
|
uint64_t totalMemoryUsed = 0u;
|
||||||
SamplerCacheFlushState samplerCacheFlushRequired = SamplerCacheFlushState::samplerCacheFlushNotRequired;
|
SamplerCacheFlushState samplerCacheFlushRequired = SamplerCacheFlushState::samplerCacheFlushNotRequired;
|
||||||
|
|
|
@ -80,7 +80,7 @@ Device::Device(const HardwareInfo &hwInfo,
|
||||||
memset(&deviceInfo, 0, sizeof(deviceInfo));
|
memset(&deviceInfo, 0, sizeof(deviceInfo));
|
||||||
deviceExtensions.reserve(1000);
|
deviceExtensions.reserve(1000);
|
||||||
preemptionMode = PreemptionHelper::getDefaultPreemptionMode(hwInfo);
|
preemptionMode = PreemptionHelper::getDefaultPreemptionMode(hwInfo);
|
||||||
deviceEngineType = DebugManager.flags.NodeOrdinal.get() == -1
|
engineType = DebugManager.flags.NodeOrdinal.get() == -1
|
||||||
? hwInfo.capabilityTable.defaultEngineType
|
? hwInfo.capabilityTable.defaultEngineType
|
||||||
: static_cast<EngineType>(DebugManager.flags.NodeOrdinal.get());
|
: static_cast<EngineType>(DebugManager.flags.NodeOrdinal.get());
|
||||||
}
|
}
|
||||||
|
|
|
@ -82,7 +82,7 @@ class Device : public BaseObject<_cl_device_id> {
|
||||||
DeviceInfo *getMutableDeviceInfo();
|
DeviceInfo *getMutableDeviceInfo();
|
||||||
MOCKABLE_VIRTUAL const WorkaroundTable *getWaTable() const;
|
MOCKABLE_VIRTUAL const WorkaroundTable *getWaTable() const;
|
||||||
EngineType getEngineType() const {
|
EngineType getEngineType() const {
|
||||||
return deviceEngineType;
|
return engineType;
|
||||||
}
|
}
|
||||||
|
|
||||||
void *getSLMWindowStartAddress();
|
void *getSLMWindowStartAddress();
|
||||||
|
@ -166,7 +166,7 @@ class Device : public BaseObject<_cl_device_id> {
|
||||||
std::string exposedBuiltinKernels = "";
|
std::string exposedBuiltinKernels = "";
|
||||||
|
|
||||||
PreemptionMode preemptionMode;
|
PreemptionMode preemptionMode;
|
||||||
EngineType deviceEngineType;
|
EngineType engineType;
|
||||||
};
|
};
|
||||||
|
|
||||||
template <cl_device_info Param>
|
template <cl_device_info Param>
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -87,9 +87,6 @@ struct MultiDispatchInfo {
|
||||||
for (MemObj *redescribedSurface : redescribedSurfaces) {
|
for (MemObj *redescribedSurface : redescribedSurfaces) {
|
||||||
redescribedSurface->release();
|
redescribedSurface->release();
|
||||||
}
|
}
|
||||||
for (Surface *usedSurface : usedSurfaces) {
|
|
||||||
delete usedSurface;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
MultiDispatchInfo() {
|
MultiDispatchInfo() {
|
||||||
|
@ -152,25 +149,8 @@ struct MultiDispatchInfo {
|
||||||
redescribedSurfaces.push_back(memObj.release());
|
redescribedSurfaces.push_back(memObj.release());
|
||||||
}
|
}
|
||||||
|
|
||||||
StackVec<Surface *, 2> &getUsedSurfaces() {
|
|
||||||
return usedSurfaces;
|
|
||||||
}
|
|
||||||
|
|
||||||
void pushUsedSurface(std::unique_ptr<Surface> surface) {
|
|
||||||
usedSurfaces.push_back(surface.release());
|
|
||||||
}
|
|
||||||
|
|
||||||
HostPtrSurface *getHostPtrSurface() {
|
|
||||||
HostPtrSurface *hpt = nullptr;
|
|
||||||
for (Surface *usedSurface : usedSurfaces) {
|
|
||||||
hpt = reinterpret_cast<HostPtrSurface *>(usedSurface);
|
|
||||||
}
|
|
||||||
return hpt;
|
|
||||||
}
|
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
StackVec<DispatchInfo, 9> dispatchInfos;
|
StackVec<DispatchInfo, 9> dispatchInfos;
|
||||||
StackVec<MemObj *, 2> redescribedSurfaces;
|
StackVec<MemObj *, 2> redescribedSurfaces;
|
||||||
StackVec<Surface *, 2> usedSurfaces;
|
|
||||||
};
|
};
|
||||||
}
|
} // namespace OCLRT
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -49,34 +49,47 @@ class NullSurface : public Surface {
|
||||||
|
|
||||||
class HostPtrSurface : public Surface {
|
class HostPtrSurface : public Surface {
|
||||||
public:
|
public:
|
||||||
HostPtrSurface(void *ptr, size_t size) : memory_pointer(ptr), surface_size(size) {
|
HostPtrSurface(void *ptr, size_t size) : memoryPointer(ptr), surfaceSize(size) {
|
||||||
|
DEBUG_BREAK_IF(!ptr);
|
||||||
|
gfxAllocation = nullptr;
|
||||||
|
}
|
||||||
|
|
||||||
|
HostPtrSurface(void *ptr, size_t size, GraphicsAllocation *allocation) : memoryPointer(ptr), surfaceSize(size), gfxAllocation(allocation) {
|
||||||
DEBUG_BREAK_IF(!ptr);
|
DEBUG_BREAK_IF(!ptr);
|
||||||
}
|
}
|
||||||
~HostPtrSurface() override = default;
|
~HostPtrSurface() override = default;
|
||||||
|
|
||||||
void makeResident(CommandStreamReceiver &csr) override {
|
void makeResident(CommandStreamReceiver &csr) override {
|
||||||
allocation = csr.createAllocationAndHandleResidency(memory_pointer, surface_size);
|
DEBUG_BREAK_IF(!gfxAllocation);
|
||||||
DEBUG_BREAK_IF(!allocation);
|
csr.makeResidentHostPtrAllocation(gfxAllocation);
|
||||||
}
|
}
|
||||||
void setCompletionStamp(CompletionStamp &cs, Device *pDevice, CommandQueue *pCmdQ) override {
|
void setCompletionStamp(CompletionStamp &cs, Device *pDevice, CommandQueue *pCmdQ) override {
|
||||||
DEBUG_BREAK_IF(!allocation);
|
DEBUG_BREAK_IF(!gfxAllocation);
|
||||||
allocation->taskCount = cs.taskCount;
|
gfxAllocation->taskCount = cs.taskCount;
|
||||||
}
|
}
|
||||||
Surface *duplicate() override {
|
Surface *duplicate() override {
|
||||||
return new HostPtrSurface(this->memory_pointer, this->surface_size);
|
return new HostPtrSurface(this->memoryPointer, this->surfaceSize, this->gfxAllocation);
|
||||||
};
|
};
|
||||||
|
|
||||||
void *getMemoryPointer() const {
|
void *getMemoryPointer() const {
|
||||||
return memory_pointer;
|
return memoryPointer;
|
||||||
}
|
}
|
||||||
size_t getSurfaceSize() const {
|
size_t getSurfaceSize() const {
|
||||||
return surface_size;
|
return surfaceSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
void setAllocation(GraphicsAllocation *allocation) {
|
||||||
|
this->gfxAllocation = allocation;
|
||||||
|
}
|
||||||
|
|
||||||
|
GraphicsAllocation *getAllocation() {
|
||||||
|
return gfxAllocation;
|
||||||
}
|
}
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
GraphicsAllocation *allocation;
|
void *memoryPointer;
|
||||||
void *memory_pointer;
|
size_t surfaceSize;
|
||||||
size_t surface_size;
|
GraphicsAllocation *gfxAllocation;
|
||||||
};
|
};
|
||||||
|
|
||||||
class MemObjSurface : public Surface {
|
class MemObjSurface : public Surface {
|
||||||
|
@ -123,4 +136,4 @@ class GeneralSurface : public Surface {
|
||||||
protected:
|
protected:
|
||||||
GraphicsAllocation *gfxAllocation;
|
GraphicsAllocation *gfxAllocation;
|
||||||
};
|
};
|
||||||
}
|
} // namespace OCLRT
|
||||||
|
|
|
@ -24,6 +24,6 @@
|
||||||
|
|
||||||
namespace OCLRT {
|
namespace OCLRT {
|
||||||
|
|
||||||
constexpr uintptr_t windowsMinAddress = 0x4000;
|
constexpr uintptr_t windowsMinAddress = 0x200000;
|
||||||
|
|
||||||
} // namespace OCLRT
|
} // namespace OCLRT
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -21,8 +21,10 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#pragma once
|
#pragma once
|
||||||
|
#include "unit_tests/fixtures/buffer_fixture.h"
|
||||||
#include "unit_tests/fixtures/device_fixture.h"
|
#include "unit_tests/fixtures/device_fixture.h"
|
||||||
#include "unit_tests/fixtures/built_in_fixture.h"
|
#include "unit_tests/fixtures/built_in_fixture.h"
|
||||||
|
#include "unit_tests/fixtures/image_fixture.h"
|
||||||
#include "unit_tests/command_stream/command_stream_fixture.h"
|
#include "unit_tests/command_stream/command_stream_fixture.h"
|
||||||
#include "unit_tests/command_queue/command_queue_fixture.h"
|
#include "unit_tests/command_queue/command_queue_fixture.h"
|
||||||
#include "unit_tests/indirect_heap/indirect_heap_fixture.h"
|
#include "unit_tests/indirect_heap/indirect_heap_fixture.h"
|
||||||
|
@ -78,4 +80,36 @@ struct CommandEnqueueFixture : public CommandEnqueueBaseFixture,
|
||||||
CommandStreamFixture::TearDown();
|
CommandStreamFixture::TearDown();
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
}
|
|
||||||
|
struct NegativeFailAllocationCommandEnqueueBaseFixture : public CommandEnqueueBaseFixture {
|
||||||
|
void SetUp() override {
|
||||||
|
CommandEnqueueBaseFixture::SetUp();
|
||||||
|
failMemManager.reset(new FailMemoryManager());
|
||||||
|
|
||||||
|
BufferDefaults::context = context;
|
||||||
|
Image2dDefaults::context = context;
|
||||||
|
buffer.reset(BufferHelper<>::create());
|
||||||
|
image.reset(ImageHelper<Image2dDefaults>::create());
|
||||||
|
ptr = static_cast<void *>(array);
|
||||||
|
oldMemManager = pDevice->getMemoryManager();
|
||||||
|
pDevice->getCommandStreamReceiver().setMemoryManager(failMemManager.get());
|
||||||
|
}
|
||||||
|
|
||||||
|
void TearDown() override {
|
||||||
|
pDevice->getCommandStreamReceiver().setMemoryManager(oldMemManager);
|
||||||
|
buffer.reset(nullptr);
|
||||||
|
image.reset(nullptr);
|
||||||
|
BufferDefaults::context = nullptr;
|
||||||
|
Image2dDefaults::context = nullptr;
|
||||||
|
CommandEnqueueBaseFixture::TearDown();
|
||||||
|
}
|
||||||
|
|
||||||
|
std::unique_ptr<Buffer> buffer;
|
||||||
|
std::unique_ptr<Image> image;
|
||||||
|
std::unique_ptr<FailMemoryManager> failMemManager;
|
||||||
|
char array[MemoryConstants::cacheLineSize];
|
||||||
|
void *ptr;
|
||||||
|
MemoryManager *oldMemManager;
|
||||||
|
};
|
||||||
|
|
||||||
|
} // namespace OCLRT
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -609,3 +609,30 @@ HWTEST_F(EnqueueReadBufferRectTest, givenInOrderQueueAndDstPtrEqualSrcPtrAndNonZ
|
||||||
EXPECT_EQ(CL_SUCCESS, retVal);
|
EXPECT_EQ(CL_SUCCESS, retVal);
|
||||||
EXPECT_EQ(pCmdQ->taskLevel, 1u);
|
EXPECT_EQ(pCmdQ->taskLevel, 1u);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
|
||||||
|
|
||||||
|
HWTEST_F(NegativeFailAllocationTest, givenEnqueueReadBufferRectWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
|
||||||
|
cl_int retVal = CL_SUCCESS;
|
||||||
|
constexpr size_t rowPitch = 100;
|
||||||
|
constexpr size_t slicePitch = 100 * 100;
|
||||||
|
size_t bufferOrigin[] = {0, 0, 0};
|
||||||
|
size_t hostOrigin[] = {0, 0, 0};
|
||||||
|
size_t region[] = {50, 50, 1};
|
||||||
|
retVal = pCmdQ->enqueueReadBufferRect(
|
||||||
|
buffer.get(),
|
||||||
|
CL_FALSE,
|
||||||
|
bufferOrigin,
|
||||||
|
hostOrigin,
|
||||||
|
region,
|
||||||
|
rowPitch,
|
||||||
|
slicePitch,
|
||||||
|
rowPitch,
|
||||||
|
slicePitch,
|
||||||
|
ptr,
|
||||||
|
0,
|
||||||
|
nullptr,
|
||||||
|
nullptr);
|
||||||
|
|
||||||
|
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
|
||||||
|
}
|
||||||
|
|
|
@ -518,3 +518,19 @@ HWTEST_F(EnqueueReadBufferTypeTest, givenInOrderQueueAndEnabledSupportCpuCopiesA
|
||||||
EXPECT_EQ(CL_SUCCESS, retVal);
|
EXPECT_EQ(CL_SUCCESS, retVal);
|
||||||
EXPECT_EQ(pCmdQ->taskLevel, 1u);
|
EXPECT_EQ(pCmdQ->taskLevel, 1u);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
|
||||||
|
|
||||||
|
HWTEST_F(NegativeFailAllocationTest, givenEnqueueReadBufferWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
|
||||||
|
cl_int retVal = CL_SUCCESS;
|
||||||
|
retVal = pCmdQ->enqueueReadBuffer(buffer.get(),
|
||||||
|
CL_FALSE,
|
||||||
|
0,
|
||||||
|
MemoryConstants::cacheLineSize,
|
||||||
|
ptr,
|
||||||
|
0,
|
||||||
|
nullptr,
|
||||||
|
nullptr);
|
||||||
|
|
||||||
|
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
|
||||||
|
}
|
||||||
|
|
|
@ -588,3 +588,29 @@ HWTEST_F(EnqueueReadImageTest, GivenNonZeroCopyImage2DAndImageShareTheSameStorag
|
||||||
EXPECT_EQ(CL_SUCCESS, retVal);
|
EXPECT_EQ(CL_SUCCESS, retVal);
|
||||||
EXPECT_EQ(pCmdQ->taskLevel, 0u);
|
EXPECT_EQ(pCmdQ->taskLevel, 0u);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
|
||||||
|
|
||||||
|
HWTEST_F(NegativeFailAllocationTest, givenEnqueueWriteImageWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
|
||||||
|
cl_int retVal = CL_SUCCESS;
|
||||||
|
auto imageDesc = image->getImageDesc();
|
||||||
|
|
||||||
|
size_t origin[] = {0, 0, 0};
|
||||||
|
size_t region[] = {imageDesc.image_width, imageDesc.image_height, 1};
|
||||||
|
|
||||||
|
size_t rowPitch = image->getHostPtrRowPitch();
|
||||||
|
size_t slicePitch = image->getHostPtrSlicePitch();
|
||||||
|
|
||||||
|
retVal = pCmdQ->enqueueWriteImage(image.get(),
|
||||||
|
CL_FALSE,
|
||||||
|
origin,
|
||||||
|
region,
|
||||||
|
rowPitch,
|
||||||
|
slicePitch,
|
||||||
|
ptr,
|
||||||
|
0,
|
||||||
|
nullptr,
|
||||||
|
nullptr);
|
||||||
|
|
||||||
|
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
|
||||||
|
}
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -606,3 +606,31 @@ HWTEST_F(EnqueueWriteBufferRectTest, givenInOrderQueueAndDstPtrEqualSrcPtrAndNon
|
||||||
EXPECT_EQ(CL_SUCCESS, retVal);
|
EXPECT_EQ(CL_SUCCESS, retVal);
|
||||||
EXPECT_EQ(pCmdQ->taskLevel, 1u);
|
EXPECT_EQ(pCmdQ->taskLevel, 1u);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
|
||||||
|
|
||||||
|
HWTEST_F(NegativeFailAllocationTest, givenEnqueueWriteBufferRectWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
|
||||||
|
cl_int retVal = CL_SUCCESS;
|
||||||
|
size_t bufferOrigin[] = {0, 0, 0};
|
||||||
|
size_t hostOrigin[] = {0, 0, 0};
|
||||||
|
size_t region[] = {50, 50, 1};
|
||||||
|
constexpr size_t rowPitch = 100;
|
||||||
|
constexpr size_t slicePitch = 100 * 100;
|
||||||
|
|
||||||
|
retVal = pCmdQ->enqueueWriteBufferRect(
|
||||||
|
buffer.get(),
|
||||||
|
CL_FALSE,
|
||||||
|
bufferOrigin,
|
||||||
|
hostOrigin,
|
||||||
|
region,
|
||||||
|
rowPitch,
|
||||||
|
slicePitch,
|
||||||
|
rowPitch,
|
||||||
|
slicePitch,
|
||||||
|
ptr,
|
||||||
|
0,
|
||||||
|
nullptr,
|
||||||
|
nullptr);
|
||||||
|
|
||||||
|
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
|
||||||
|
}
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -436,3 +436,19 @@ HWTEST_F(EnqueueWriteBufferTypeTest, givenInOrderQueueAndEnabledSupportCpuCopies
|
||||||
EXPECT_EQ(CL_SUCCESS, retVal);
|
EXPECT_EQ(CL_SUCCESS, retVal);
|
||||||
EXPECT_EQ(pCmdQ->taskLevel, 1u);
|
EXPECT_EQ(pCmdQ->taskLevel, 1u);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
|
||||||
|
|
||||||
|
HWTEST_F(NegativeFailAllocationTest, givenEnqueueWriteBufferWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
|
||||||
|
cl_int retVal = CL_SUCCESS;
|
||||||
|
retVal = pCmdQ->enqueueWriteBuffer(buffer.get(),
|
||||||
|
CL_FALSE,
|
||||||
|
0,
|
||||||
|
MemoryConstants::cacheLineSize,
|
||||||
|
ptr,
|
||||||
|
0,
|
||||||
|
nullptr,
|
||||||
|
nullptr);
|
||||||
|
|
||||||
|
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
|
||||||
|
}
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -573,3 +573,29 @@ HWTEST_F(EnqueueWriteImageTest, GivenNonZeroCopyImage2DAndImageShareTheSameStora
|
||||||
EXPECT_EQ(CL_SUCCESS, retVal);
|
EXPECT_EQ(CL_SUCCESS, retVal);
|
||||||
EXPECT_EQ(pCmdQ->taskLevel, 0u);
|
EXPECT_EQ(pCmdQ->taskLevel, 0u);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
|
||||||
|
|
||||||
|
HWTEST_F(NegativeFailAllocationTest, givenEnqueueReadImageWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
|
||||||
|
cl_int retVal = CL_SUCCESS;
|
||||||
|
auto imageDesc = image->getImageDesc();
|
||||||
|
|
||||||
|
size_t origin[] = {0, 0, 0};
|
||||||
|
size_t region[] = {imageDesc.image_width, imageDesc.image_height, 1};
|
||||||
|
|
||||||
|
size_t rowPitch = image->getHostPtrRowPitch();
|
||||||
|
size_t slicePitch = image->getHostPtrSlicePitch();
|
||||||
|
|
||||||
|
retVal = pCmdQ->enqueueReadImage(image.get(),
|
||||||
|
CL_FALSE,
|
||||||
|
origin,
|
||||||
|
region,
|
||||||
|
rowPitch,
|
||||||
|
slicePitch,
|
||||||
|
ptr,
|
||||||
|
0,
|
||||||
|
nullptr,
|
||||||
|
nullptr);
|
||||||
|
|
||||||
|
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
|
||||||
|
}
|
||||||
|
|
|
@ -137,6 +137,43 @@ TEST_F(CommandStreamReceiverTest, createAllocationAndHandleResidency) {
|
||||||
EXPECT_EQ(size, graphicsAllocation->getUnderlyingBufferSize());
|
EXPECT_EQ(size, graphicsAllocation->getUnderlyingBufferSize());
|
||||||
}
|
}
|
||||||
|
|
||||||
|
TEST_F(CommandStreamReceiverTest, givenCommandStreamerWhenAllocationIsNotAddedToListThenCallerMustFreeAllocation) {
|
||||||
|
void *hostPtr = reinterpret_cast<void *>(0x1212341);
|
||||||
|
auto size = 17262u;
|
||||||
|
|
||||||
|
GraphicsAllocation *graphicsAllocation = commandStreamReceiver->createAllocationAndHandleResidency(hostPtr, size, false);
|
||||||
|
ASSERT_NE(nullptr, graphicsAllocation);
|
||||||
|
|
||||||
|
EXPECT_EQ(hostPtr, graphicsAllocation->getUnderlyingBuffer());
|
||||||
|
EXPECT_EQ(size, graphicsAllocation->getUnderlyingBufferSize());
|
||||||
|
|
||||||
|
commandStreamReceiver->getMemoryManager()->freeGraphicsMemory(graphicsAllocation);
|
||||||
|
}
|
||||||
|
|
||||||
|
HWTEST_F(CommandStreamReceiverTest, givenCommandStreamerWhenPtrAndSizeMeetL3CriteriaThenCsrEnableL3) {
|
||||||
|
void *hostPtr = reinterpret_cast<void *>(0xF000);
|
||||||
|
auto size = 0x2000u;
|
||||||
|
|
||||||
|
GraphicsAllocation *graphicsAllocation = commandStreamReceiver->createAllocationAndHandleResidency(hostPtr, size);
|
||||||
|
ASSERT_NE(nullptr, graphicsAllocation);
|
||||||
|
|
||||||
|
auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
|
||||||
|
|
||||||
|
EXPECT_FALSE(csr.disableL3Cache);
|
||||||
|
}
|
||||||
|
|
||||||
|
HWTEST_F(CommandStreamReceiverTest, givenCommandStreamerWhenPtrAndSizeDoNotMeetL3CriteriaThenCsrDisableL3) {
|
||||||
|
void *hostPtr = reinterpret_cast<void *>(0xF001);
|
||||||
|
auto size = 0x2001u;
|
||||||
|
|
||||||
|
GraphicsAllocation *graphicsAllocation = commandStreamReceiver->createAllocationAndHandleResidency(hostPtr, size);
|
||||||
|
ASSERT_NE(nullptr, graphicsAllocation);
|
||||||
|
|
||||||
|
auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
|
||||||
|
|
||||||
|
EXPECT_TRUE(csr.disableL3Cache);
|
||||||
|
}
|
||||||
|
|
||||||
TEST_F(CommandStreamReceiverTest, memoryManagerHasAccessToCSR) {
|
TEST_F(CommandStreamReceiverTest, memoryManagerHasAccessToCSR) {
|
||||||
auto *memoryManager = commandStreamReceiver->getMemoryManager();
|
auto *memoryManager = commandStreamReceiver->getMemoryManager();
|
||||||
EXPECT_EQ(commandStreamReceiver, memoryManager->csr);
|
EXPECT_EQ(commandStreamReceiver, memoryManager->csr);
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -174,24 +174,9 @@ TEST_F(DispatchInfoTest, MultiDispatchInfoEmpty) {
|
||||||
EXPECT_EQ(0u, multiDispatchInfo.getRequiredScratchSize());
|
EXPECT_EQ(0u, multiDispatchInfo.getRequiredScratchSize());
|
||||||
EXPECT_FALSE(multiDispatchInfo.usesSlm());
|
EXPECT_FALSE(multiDispatchInfo.usesSlm());
|
||||||
EXPECT_FALSE(multiDispatchInfo.usesStatelessPrintfSurface());
|
EXPECT_FALSE(multiDispatchInfo.usesStatelessPrintfSurface());
|
||||||
EXPECT_EQ(nullptr, multiDispatchInfo.getHostPtrSurface());
|
|
||||||
EXPECT_EQ(0u, multiDispatchInfo.getRedescribedSurfaces().size());
|
EXPECT_EQ(0u, multiDispatchInfo.getRedescribedSurfaces().size());
|
||||||
}
|
}
|
||||||
|
|
||||||
TEST_F(DispatchInfoTest, MultiDispatchInfoWithHostPtrSurface) {
|
|
||||||
MultiDispatchInfo multiDispatchInfo;
|
|
||||||
|
|
||||||
auto ptr = new char[10];
|
|
||||||
HostPtrSurface *hps = new HostPtrSurface(ptr, 10);
|
|
||||||
multiDispatchInfo.pushUsedSurface(std::unique_ptr<HostPtrSurface>(hps));
|
|
||||||
|
|
||||||
EXPECT_NE(nullptr, multiDispatchInfo.getHostPtrSurface());
|
|
||||||
EXPECT_EQ(ptr, multiDispatchInfo.getHostPtrSurface()->getMemoryPointer());
|
|
||||||
EXPECT_EQ(10u, multiDispatchInfo.getHostPtrSurface()->getSurfaceSize());
|
|
||||||
|
|
||||||
delete[] ptr;
|
|
||||||
}
|
|
||||||
|
|
||||||
TEST_F(DispatchInfoTest, MultiDispatchInfoWithRedescribedSurfaces) {
|
TEST_F(DispatchInfoTest, MultiDispatchInfoWithRedescribedSurfaces) {
|
||||||
MultiDispatchInfo multiDispatchInfo;
|
MultiDispatchInfo multiDispatchInfo;
|
||||||
|
|
||||||
|
@ -204,22 +189,6 @@ TEST_F(DispatchInfoTest, MultiDispatchInfoWithRedescribedSurfaces) {
|
||||||
EXPECT_EQ(1u, multiDispatchInfo.getRedescribedSurfaces().size());
|
EXPECT_EQ(1u, multiDispatchInfo.getRedescribedSurfaces().size());
|
||||||
}
|
}
|
||||||
|
|
||||||
TEST_F(DispatchInfoTest, MultiDispatchInfoWithUsedSurfaces) {
|
|
||||||
MultiDispatchInfo multiDispatchInfo;
|
|
||||||
|
|
||||||
auto ptr = new char[10];
|
|
||||||
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new HostPtrSurface(ptr, 10)));
|
|
||||||
|
|
||||||
auto image = Image2dHelper<>::create(pContext);
|
|
||||||
ASSERT_NE(nullptr, image);
|
|
||||||
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(image)));
|
|
||||||
|
|
||||||
EXPECT_EQ(2u, multiDispatchInfo.getUsedSurfaces().size());
|
|
||||||
|
|
||||||
image->release();
|
|
||||||
delete[] ptr;
|
|
||||||
}
|
|
||||||
|
|
||||||
TEST_F(DispatchInfoTest, MultiDispatchInfoWithNoGeometry) {
|
TEST_F(DispatchInfoTest, MultiDispatchInfoWithNoGeometry) {
|
||||||
DispatchInfo dispatchInfo;
|
DispatchInfo dispatchInfo;
|
||||||
|
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017, Intel Corporation
|
* Copyright (c) 2017 - 2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -44,7 +44,7 @@ Surface *Create<NullSurface>(char *data, MockBuffer *buffer, GraphicsAllocation
|
||||||
|
|
||||||
template <>
|
template <>
|
||||||
Surface *Create<HostPtrSurface>(char *data, MockBuffer *buffer, GraphicsAllocation *gfxAllocation) {
|
Surface *Create<HostPtrSurface>(char *data, MockBuffer *buffer, GraphicsAllocation *gfxAllocation) {
|
||||||
return new HostPtrSurface(data, 10);
|
return new HostPtrSurface(data, 10, gfxAllocation);
|
||||||
}
|
}
|
||||||
|
|
||||||
template <>
|
template <>
|
||||||
|
@ -56,7 +56,7 @@ template <>
|
||||||
Surface *Create<GeneralSurface>(char *data, MockBuffer *buffer, GraphicsAllocation *gfxAllocation) {
|
Surface *Create<GeneralSurface>(char *data, MockBuffer *buffer, GraphicsAllocation *gfxAllocation) {
|
||||||
return new GeneralSurface(gfxAllocation);
|
return new GeneralSurface(gfxAllocation);
|
||||||
}
|
}
|
||||||
}
|
} // namespace createSurface
|
||||||
|
|
||||||
template <typename T>
|
template <typename T>
|
||||||
class SurfaceTest : public ::testing::Test {
|
class SurfaceTest : public ::testing::Test {
|
||||||
|
@ -73,7 +73,7 @@ HWTEST_TYPED_TEST(SurfaceTest, GivenSurfaceWhenInterfaceIsUsedThenSurfaceBehaves
|
||||||
|
|
||||||
MockCsr<FamilyType> *csr = new MockCsr<FamilyType>(execStamp);
|
MockCsr<FamilyType> *csr = new MockCsr<FamilyType>(execStamp);
|
||||||
|
|
||||||
auto mm = csr->createMemoryManager(false);
|
auto memManager = csr->createMemoryManager(false);
|
||||||
|
|
||||||
Surface *surface = createSurface::Create<TypeParam>(this->data,
|
Surface *surface = createSurface::Create<TypeParam>(this->data,
|
||||||
&this->buffer,
|
&this->buffer,
|
||||||
|
@ -94,7 +94,7 @@ HWTEST_TYPED_TEST(SurfaceTest, GivenSurfaceWhenInterfaceIsUsedThenSurfaceBehaves
|
||||||
delete duplicatedSurface;
|
delete duplicatedSurface;
|
||||||
delete surface;
|
delete surface;
|
||||||
delete csr;
|
delete csr;
|
||||||
delete mm;
|
delete memManager;
|
||||||
}
|
}
|
||||||
|
|
||||||
class CoherentMemObjSurface : public SurfaceTest<MemObjSurface> {
|
class CoherentMemObjSurface : public SurfaceTest<MemObjSurface> {
|
||||||
|
|
|
@ -80,12 +80,12 @@ void MockDevice::resetCommandStreamReceiver(CommandStreamReceiver *newCsr) {
|
||||||
memoryManager->csr = commandStreamReceiver;
|
memoryManager->csr = commandStreamReceiver;
|
||||||
}
|
}
|
||||||
|
|
||||||
OCLRT::FailMemoryManager::FailMemoryManager() : MemoryManager(false) {
|
OCLRT::FailMemoryManager::FailMemoryManager() : MockMemoryManager() {
|
||||||
agnostic = nullptr;
|
agnostic = nullptr;
|
||||||
fail = 0;
|
fail = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
OCLRT::FailMemoryManager::FailMemoryManager(int32_t fail) : MemoryManager(false) {
|
OCLRT::FailMemoryManager::FailMemoryManager(int32_t fail) : MockMemoryManager() {
|
||||||
allocations.reserve(fail);
|
allocations.reserve(fail);
|
||||||
agnostic = new OsAgnosticMemoryManager(false);
|
agnostic = new OsAgnosticMemoryManager(false);
|
||||||
this->fail = fail;
|
this->fail = fail;
|
||||||
|
|
|
@ -26,6 +26,7 @@
|
||||||
#include "runtime/helpers/hw_info.h"
|
#include "runtime/helpers/hw_info.h"
|
||||||
#include "runtime/memory_manager/os_agnostic_memory_manager.h"
|
#include "runtime/memory_manager/os_agnostic_memory_manager.h"
|
||||||
#include "unit_tests/libult/ult_command_stream_receiver.h"
|
#include "unit_tests/libult/ult_command_stream_receiver.h"
|
||||||
|
#include "unit_tests/mocks/mock_memory_manager.h"
|
||||||
|
|
||||||
namespace OCLRT {
|
namespace OCLRT {
|
||||||
class OSTime;
|
class OSTime;
|
||||||
|
@ -102,7 +103,7 @@ class MockDevice : public Device {
|
||||||
WorkaroundTable mockWaTable = {};
|
WorkaroundTable mockWaTable = {};
|
||||||
};
|
};
|
||||||
|
|
||||||
class FailMemoryManager : public MemoryManager {
|
class FailMemoryManager : public MockMemoryManager {
|
||||||
public:
|
public:
|
||||||
FailMemoryManager();
|
FailMemoryManager();
|
||||||
FailMemoryManager(int32_t fail);
|
FailMemoryManager(int32_t fail);
|
||||||
|
@ -113,7 +114,6 @@ class FailMemoryManager : public MemoryManager {
|
||||||
}
|
}
|
||||||
delete agnostic;
|
delete agnostic;
|
||||||
}
|
}
|
||||||
applyCommonCleanup();
|
|
||||||
};
|
};
|
||||||
GraphicsAllocation *allocateGraphicsMemory(size_t size, size_t alignment, bool forcePin, bool uncacheable) override {
|
GraphicsAllocation *allocateGraphicsMemory(size_t size, size_t alignment, bool forcePin, bool uncacheable) override {
|
||||||
if (fail <= 0) {
|
if (fail <= 0) {
|
||||||
|
|
|
@ -38,15 +38,14 @@
|
||||||
using namespace OCLRT;
|
using namespace OCLRT;
|
||||||
|
|
||||||
HWTEST_F(WddmTestSingle, givenMinWindowsAddressWhenWddmIsInitializedThenWddmUseThisAddress) {
|
HWTEST_F(WddmTestSingle, givenMinWindowsAddressWhenWddmIsInitializedThenWddmUseThisAddress) {
|
||||||
uintptr_t expectedAddress = 0x4000;
|
uintptr_t expectedAddress = 0x200000;
|
||||||
EXPECT_EQ(expectedAddress, OCLRT::windowsMinAddress);
|
EXPECT_EQ(expectedAddress, OCLRT::windowsMinAddress);
|
||||||
Wddm *wddm = Wddm::createWddm();
|
std::unique_ptr<Wddm> wddm(Wddm::createWddm());
|
||||||
|
|
||||||
bool status = wddm->init<FamilyType>();
|
bool status = wddm->init<FamilyType>();
|
||||||
EXPECT_TRUE(status);
|
EXPECT_TRUE(status);
|
||||||
EXPECT_TRUE(wddm->isInitialized());
|
EXPECT_TRUE(wddm->isInitialized());
|
||||||
EXPECT_EQ(expectedAddress, wddm->getWddmMinAddress());
|
EXPECT_EQ(expectedAddress, wddm->getWddmMinAddress());
|
||||||
delete wddm;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
HWTEST_F(WddmTestSingle, creation) {
|
HWTEST_F(WddmTestSingle, creation) {
|
||||||
|
|
Loading…
Reference in New Issue