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For HostPtr surfaces of enqueue calls use GPU address 

Change-Id: I67bf5076d23d43438f5e82c5cb6cbd3b9ed2f152
This commit is contained in:
Zdanowicz, Zbigniew 2018-02-08 22:52:58 +01:00 committed by sys_ocldev
parent 7198c604f9
commit 45dedb37f3
35 changed files with 463 additions and 191 deletions
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2
Jenkinsfile vendored
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@ -2,4 +2,4 @@
neoDependenciesRev='735095-769'
strategy='EQUAL'
allowedF=43
allowedCD=342
allowedCD=341

35
runtime/built_ins/built_ins.cpp
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@ -427,18 +427,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyBufferRect> : public BuiltinDispatchI
kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
kernelNoSplit3DBuilder.bake(multiDispatchInfo);
// Store source and destination surfaces for residency purposes
if (operationParams.srcMemObj) {
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.srcMemObj)));
} else {
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new HostPtrSurface(operationParams.srcPtr, hostPtrSize)));
}
if (operationParams.dstMemObj) {
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.dstMemObj)));
} else {
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new HostPtrSurface(operationParams.dstPtr, hostPtrSize)));
}
return true;
}
@ -601,14 +589,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyBufferToImage3d> : public BuiltinDisp
kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
kernelNoSplit3DBuilder.bake(multiDispatchInfo);
// Store source and destination surfaces for residency purposes
if (operationParams.srcMemObj) {
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.srcMemObj)));
} else {
multiDispatchInfo.pushUsedSurface(std::unique_ptr<HostPtrSurface>(new HostPtrSurface(operationParams.srcPtr, hostPtrSize)));
}
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.dstMemObj)));
return true;
}
@ -695,14 +675,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyImage3dToBuffer> : public BuiltinDisp
kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
kernelNoSplit3DBuilder.bake(multiDispatchInfo);
// Store source and destination surfaces for residency purposes
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.srcMemObj)));
if (operationParams.dstMemObj) {
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(operationParams.dstMemObj)));
} else {
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new HostPtrSurface(operationParams.dstPtr, hostPtrSize)));
}
return true;
}
@ -768,10 +740,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyImageToImage3d> : public BuiltinDispa
kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
kernelNoSplit3DBuilder.bake(multiDispatchInfo);
// Store source and destination surfaces for residency purposes
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(srcImage)));
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(dstImage)));
return true;
}
@ -830,9 +798,6 @@ class BuiltInOp<HWFamily, EBuiltInOps::FillImage3d> : public BuiltinDispatchInfo
kernelNoSplit3DBuilder.setDispatchGeometry(operationParams.size, Vec3<size_t>{0, 0, 0}, Vec3<size_t>{0, 0, 0});
kernelNoSplit3DBuilder.bake(multiDispatchInfo);
// Store destination surface for residency purposes
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(image)));
return true;
}

2
runtime/command_queue/command_queue_hw.h
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@ -340,6 +340,8 @@ class CommandQueueHw : public CommandQueue {
protected:
MOCKABLE_VIRTUAL void enqueueHandlerHook(const unsigned int commandType, const MultiDispatchInfo &dispatchInfo);
bool createAllocationForHostSurface(HostPtrSurface &surface);
size_t calculateHostPtrSizeForImage(size_t *region, size_t rowPitch, size_t slicePitch, Image *image);
private:
bool isTaskLevelUpdateRequired(const uint32_t &taskLevel, const cl_event *eventWaitList, const cl_uint &numEventsInWaitList, unsigned int commandType);

23
runtime/command_queue/enqueue_common.h
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@ -30,6 +30,7 @@
#include "runtime/helpers/kernel_commands.h"
#include "runtime/helpers/dispatch_info_builder.h"
#include "runtime/mem_obj/buffer.h"
#include "runtime/mem_obj/image.h"
#include "runtime/memory_manager/memory_manager.h"
#include "runtime/memory_manager/surface.h"
#include "runtime/built_ins/built_ins.h"
@ -667,4 +668,26 @@ void CommandQueueHw<GfxFamily>::computeOffsetsValueForRectCommands(size_t *buffe
*bufferOffset = bufferOrigin[2] * computedBufferSlicePitch + bufferOrigin[1] * computedBufferRowPitch + bufferOrigin[0];
*hostOffset = hostOrigin[2] * computedHostSlicePitch + hostOrigin[1] * computedHostRowPitch + hostOrigin[0];
}
template <typename GfxFamily>
bool CommandQueueHw<GfxFamily>::createAllocationForHostSurface(HostPtrSurface &surface) {
auto memoryManager = device->getCommandStreamReceiver().getMemoryManager();
GraphicsAllocation *allocation = memoryManager->allocateGraphicsMemory(surface.getSurfaceSize(), surface.getMemoryPointer());
if (allocation == nullptr) {
return false;
}
allocation->taskCount = Event::eventNotReady;
surface.setAllocation(allocation);
memoryManager->storeAllocation(std::unique_ptr<GraphicsAllocation>(allocation), TEMPORARY_ALLOCATION);
return true;
}
template <typename GfxFamily>
size_t CommandQueueHw<GfxFamily>::calculateHostPtrSizeForImage(size_t *region, size_t rowPitch, size_t slicePitch, Image *image) {
auto bytesPerPixel = image->getSurfaceFormatInfo().ImageElementSizeInBytes;
auto dstRowPitch = rowPitch ? rowPitch : region[0] * bytesPerPixel;
auto dstSlicePitch = slicePitch ? slicePitch : ((image->getImageDesc().image_type == CL_MEM_OBJECT_IMAGE1D_ARRAY ? 1 : region[1]) * dstRowPitch);
return Image::calculateHostPtrSize(region, dstRowPitch, dstSlicePitch, bytesPerPixel, image->getImageDesc().image_type);
}
} // namespace OCLRT

11
runtime/command_queue/enqueue_copy_buffer_rect.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -52,6 +52,10 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferRect(
this->getContext(), this->getDevice());
builder.takeOwnership(this->context);
MemObjSurface srcBufferSurf(srcBuffer);
MemObjSurface dstBufferSurf(dstBuffer);
Surface *surfaces[] = {&srcBufferSurf, &dstBufferSurf};
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcMemObj = srcBuffer;
dc.dstMemObj = dstBuffer;
@ -65,8 +69,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferRect(
builder.buildDispatchInfos(dispatchInfo, dc);
enqueueHandler<CL_COMMAND_COPY_BUFFER_RECT>(
dispatchInfo.getUsedSurfaces().begin(),
dispatchInfo.getUsedSurfaces().size(),
surfaces,
false,
dispatchInfo,
numEventsInWaitList,
@ -77,4 +80,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferRect(
return CL_SUCCESS;
}
}
} // namespace OCLRT

11
runtime/command_queue/enqueue_copy_buffer_to_image.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -51,6 +51,10 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferToImage(
this->getContext(), this->getDevice());
builder.takeOwnership(this->context);
MemObjSurface srcBufferSurf(srcBuffer);
MemObjSurface dstImgSurf(dstImage);
Surface *surfaces[] = {&srcBufferSurf, &dstImgSurf};
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcMemObj = srcBuffer;
dc.dstMemObj = dstImage;
@ -60,8 +64,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferToImage(
builder.buildDispatchInfos(di, dc);
enqueueHandler<CL_COMMAND_COPY_BUFFER_TO_IMAGE>(
di.getUsedSurfaces().begin(),
di.getUsedSurfaces().size(),
surfaces,
false,
di,
numEventsInWaitList,
@ -72,4 +75,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferToImage(
return CL_SUCCESS;
}
}
} // namespace OCLRT

11
runtime/command_queue/enqueue_copy_image.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -51,6 +51,10 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImage(
this->getContext(), this->getDevice());
builder.takeOwnership(this->context);
MemObjSurface srcImgSurf(srcImage);
MemObjSurface dstImgSurf(dstImage);
Surface *surfaces[] = {&srcImgSurf, &dstImgSurf};
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcMemObj = srcImage;
dc.dstMemObj = dstImage;
@ -60,8 +64,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImage(
builder.buildDispatchInfos(di, dc);
enqueueHandler<CL_COMMAND_COPY_IMAGE>(
di.getUsedSurfaces().begin(),
di.getUsedSurfaces().size(),
surfaces,
false,
di,
numEventsInWaitList,
@ -72,4 +75,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImage(
return CL_SUCCESS;
}
}
} // namespace OCLRT

11
runtime/command_queue/enqueue_copy_image_to_buffer.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -51,6 +51,10 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImageToBuffer(
this->getContext(), this->getDevice());
builder.takeOwnership(this->context);
MemObjSurface srcImgSurf(srcImage);
MemObjSurface dstBufferSurf(dstBuffer);
Surface *surfaces[] = {&srcImgSurf, &dstBufferSurf};
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcMemObj = srcImage;
dc.dstMemObj = dstBuffer;
@ -60,8 +64,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImageToBuffer(
builder.buildDispatchInfos(di, dc);
enqueueHandler<CL_COMMAND_COPY_IMAGE_TO_BUFFER>(
di.getUsedSurfaces().begin(),
di.getUsedSurfaces().size(),
surfaces,
false,
di,
numEventsInWaitList,
@ -72,4 +75,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImageToBuffer(
return CL_SUCCESS;
}
}
} // namespace OCLRT

10
runtime/command_queue/enqueue_fill_image.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -51,6 +51,9 @@ cl_int CommandQueueHw<GfxFamily>::enqueueFillImage(
this->getContext(), this->getDevice());
builder.takeOwnership(this->context);
MemObjSurface dstImgSurf(image);
Surface *surfaces[] = {&dstImgSurf};
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcPtr = const_cast<void *>(fillColor);
dc.dstMemObj = image;
@ -60,8 +63,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueFillImage(
builder.buildDispatchInfos(di, dc);
enqueueHandler<CL_COMMAND_FILL_IMAGE>(
di.getUsedSurfaces().begin(),
di.getUsedSurfaces().size(),
surfaces,
false,
di,
numEventsInWaitList,
@ -72,4 +74,4 @@ cl_int CommandQueueHw<GfxFamily>::enqueueFillImage(
return CL_SUCCESS;
}
}
} // namespace OCLRT

23
runtime/command_queue/enqueue_read_buffer.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -96,17 +96,28 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBuffer(
this->getContext(), this->getDevice());
builder.takeOwnership(this->context);
void *dstPtr = ptr;
MemObjSurface bufferSurf(buffer);
HostPtrSurface hostPtrSurf(dstPtr, size);
Surface *surfaces[] = {&bufferSurf, &hostPtrSurf};
if (size != 0) {
bool status = createAllocationForHostSurface(hostPtrSurf);
if (!status) {
builder.releaseOwnership();
return CL_OUT_OF_RESOURCES;
}
dstPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
}
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.dstPtr = ptr;
dc.dstPtr = dstPtr;
dc.srcMemObj = buffer;
dc.srcOffset = {offset, 0, 0};
dc.size = {size, 0, 0};
builder.buildDispatchInfos(dispatchInfo, dc);
MemObjSurface s1(buffer);
HostPtrSurface s2(ptr, size);
Surface *surfaces[] = {&s1, &s2};
if (context->isProvidingPerformanceHints()) {
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_REQUIRES_COPY_DATA, static_cast<cl_mem>(buffer), ptr);
if (!isL3Capable(ptr, size)) {

31
runtime/command_queue/enqueue_read_buffer_rect.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -81,9 +81,27 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
this->getContext(), this->getDevice());
builder.takeOwnership(this->context);
size_t hostPtrSize = Buffer::calculateHostPtrSize(hostOrigin, region, hostRowPitch, hostSlicePitch);
void *dstPtr = ptr;
MemObjSurface bufferSurf(buffer);
HostPtrSurface hostPtrSurf(dstPtr, hostPtrSize);
Surface *surfaces[] = {&bufferSurf, &hostPtrSurf};
if (region[0] != 0 &&
region[1] != 0 &&
region[2] != 0) {
bool status = createAllocationForHostSurface(hostPtrSurf);
if (!status) {
builder.releaseOwnership();
return CL_OUT_OF_RESOURCES;
}
dstPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
}
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcMemObj = buffer;
dc.dstPtr = ptr;
dc.dstPtr = dstPtr;
dc.srcOffset = bufferOrigin;
dc.dstOffset = hostOrigin;
dc.size = region;
@ -94,8 +112,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
builder.buildDispatchInfos(dispatchInfo, dc);
enqueueHandler<CL_COMMAND_READ_BUFFER_RECT>(
dispatchInfo.getUsedSurfaces().begin(),
dispatchInfo.getUsedSurfaces().size(),
surfaces,
blockingRead == CL_TRUE,
dispatchInfo,
numEventsInWaitList,
@ -106,10 +123,8 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
if (context->isProvidingPerformanceHints()) {
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_RECT_REQUIRES_COPY_DATA, static_cast<cl_mem>(buffer), ptr);
HostPtrSurface *hps = dispatchInfo.getHostPtrSurface();
DEBUG_BREAK_IF(!((hps != nullptr) && (hps->getMemoryPointer() == ptr)));
if (!isL3Capable(hps->getMemoryPointer(), hps->getSurfaceSize())) {
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_RECT_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, hps->getMemoryPointer(), hps->getSurfaceSize(), MemoryConstants::pageSize, MemoryConstants::pageSize);
if (!isL3Capable(ptr, hostPtrSize)) {
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_RECT_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, ptr, hostPtrSize, MemoryConstants::pageSize, MemoryConstants::pageSize);
}
}

31
runtime/command_queue/enqueue_read_image.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -83,9 +83,27 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadImage(
builder.takeOwnership(this->context);
size_t hostPtrSize = calculateHostPtrSizeForImage(const_cast<size_t *>(region), inputRowPitch, inputSlicePitch, srcImage);
void *dstPtr = ptr;
MemObjSurface srcImgSurf(srcImage);
HostPtrSurface hostPtrSurf(dstPtr, hostPtrSize);
Surface *surfaces[] = {&srcImgSurf, &hostPtrSurf};
if (region[0] != 0 &&
region[1] != 0 &&
region[2] != 0) {
bool status = createAllocationForHostSurface(hostPtrSurf);
if (!status) {
builder.releaseOwnership();
return CL_OUT_OF_RESOURCES;
}
dstPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
}
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcMemObj = srcImage;
dc.dstPtr = ptr;
dc.dstPtr = dstPtr;
dc.srcOffset = origin;
dc.size = region;
dc.srcRowPitch = inputRowPitch;
@ -93,8 +111,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadImage(
builder.buildDispatchInfos(di, dc);
enqueueHandler<CL_COMMAND_READ_IMAGE>(
di.getUsedSurfaces().begin(),
di.getUsedSurfaces().size(),
surfaces,
blockingRead == CL_TRUE,
di,
numEventsInWaitList,
@ -104,10 +121,8 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadImage(
builder.releaseOwnership();
if (context->isProvidingPerformanceHints()) {
HostPtrSurface *hps = di.getHostPtrSurface();
DEBUG_BREAK_IF(!((hps != nullptr) && (hps->getMemoryPointer() == ptr)));
if (!isL3Capable(hps->getMemoryPointer(), hps->getSurfaceSize())) {
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_IMAGE_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, hps->getMemoryPointer(), hps->getSurfaceSize(), MemoryConstants::pageSize, MemoryConstants::pageSize);
if (!isL3Capable(ptr, hostPtrSize)) {
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_IMAGE_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, ptr, hostPtrSize, MemoryConstants::pageSize, MemoryConstants::pageSize);
}
}

23
runtime/command_queue/enqueue_write_buffer.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -97,17 +97,28 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBuffer(
builder.takeOwnership(this->context);
void *srcPtr = const_cast<void *>(ptr);
MemObjSurface bufferSurf(buffer);
HostPtrSurface hostPtrSurf(srcPtr, size);
Surface *surfaces[] = {&bufferSurf, &hostPtrSurf};
if (size != 0) {
bool status = createAllocationForHostSurface(hostPtrSurf);
if (!status) {
builder.releaseOwnership();
return CL_OUT_OF_RESOURCES;
}
srcPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
}
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcPtr = const_cast<void *>(ptr);
dc.srcPtr = srcPtr;
dc.dstMemObj = buffer;
dc.dstOffset = {offset, 0, 0};
dc.size = {size, 0, 0};
builder.buildDispatchInfos(dispatchInfo, dc);
MemObjSurface s1(buffer);
HostPtrSurface s2(const_cast<void *>(ptr), size);
Surface *surfaces[] = {&s1, &s2};
enqueueHandler<CL_COMMAND_WRITE_BUFFER>(
surfaces,
blockingWrite == CL_TRUE,

25
runtime/command_queue/enqueue_write_buffer_rect.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -80,8 +80,26 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBufferRect(
this->getContext(), this->getDevice());
builder.takeOwnership(this->context);
size_t hostPtrSize = Buffer::calculateHostPtrSize(hostOrigin, region, hostRowPitch, hostSlicePitch);
void *srcPtr = const_cast<void *>(ptr);
MemObjSurface dstBufferSurf(buffer);
HostPtrSurface hostPtrSurf(srcPtr, hostPtrSize);
Surface *surfaces[] = {&dstBufferSurf, &hostPtrSurf};
if (region[0] != 0 &&
region[1] != 0 &&
region[2] != 0) {
bool status = createAllocationForHostSurface(hostPtrSurf);
if (!status) {
builder.releaseOwnership();
return CL_OUT_OF_RESOURCES;
}
srcPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
}
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcPtr = const_cast<void *>(ptr);
dc.srcPtr = srcPtr;
dc.dstMemObj = buffer;
dc.srcOffset = hostOrigin;
dc.dstOffset = bufferOrigin;
@ -93,8 +111,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBufferRect(
builder.buildDispatchInfos(dispatchInfo, dc);
enqueueHandler<CL_COMMAND_WRITE_BUFFER_RECT>(
dispatchInfo.getUsedSurfaces().begin(),
dispatchInfo.getUsedSurfaces().size(),
surfaces,
blockingWrite == CL_TRUE,
dispatchInfo,
numEventsInWaitList,

25
runtime/command_queue/enqueue_write_image.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -80,8 +80,26 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteImage(
builder.takeOwnership(this->context);
size_t hostPtrSize = calculateHostPtrSizeForImage(const_cast<size_t *>(region), inputRowPitch, inputSlicePitch, dstImage);
void *srcPtr = const_cast<void *>(ptr);
MemObjSurface dstImgSurf(dstImage);
HostPtrSurface hostPtrSurf(srcPtr, hostPtrSize);
Surface *surfaces[] = {&dstImgSurf, &hostPtrSurf};
if (region[0] != 0 &&
region[1] != 0 &&
region[2] != 0) {
bool status = createAllocationForHostSurface(hostPtrSurf);
if (!status) {
builder.releaseOwnership();
return CL_OUT_OF_RESOURCES;
}
srcPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
}
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcPtr = const_cast<void *>(ptr);
dc.srcPtr = srcPtr;
dc.dstMemObj = dstImage;
dc.dstOffset = origin;
dc.size = region;
@ -90,8 +108,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteImage(
builder.buildDispatchInfos(di, dc);
enqueueHandler<CL_COMMAND_WRITE_IMAGE>(
di.getUsedSurfaces().begin(),
di.getUsedSurfaces().size(),
surfaces,
blockingWrite == CL_TRUE,
di,
numEventsInWaitList,

8
runtime/command_stream/command_stream_receiver.cpp
View File

@ -98,6 +98,13 @@ GraphicsAllocation *CommandStreamReceiver::createAllocationAndHandleResidency(co
return graphicsAllocation;
}
void CommandStreamReceiver::makeResidentHostPtrAllocation(GraphicsAllocation *gfxAllocation) {
makeResident(*gfxAllocation);
if (!gfxAllocation->isL3Capable()) {
setDisableL3Cache(true);
}
}
void CommandStreamReceiver::waitForTaskCountAndCleanAllocationList(uint32_t requiredTaskCount, uint32_t allocationType) {
auto address = getTagAddress();
@ -161,7 +168,6 @@ void CommandStreamReceiver::cleanupResources() {
scratchAllocation = nullptr;
}
if (commandStream.getBase()) {
memoryManager->freeGraphicsMemory(commandStream.getGraphicsAllocation());
commandStream.replaceGraphicsAllocation(nullptr);

7
runtime/command_stream/command_stream_receiver.h
View File

@ -71,6 +71,7 @@ class CommandStreamReceiver {
void makeSurfacePackNonResident(ResidencyContainer *allocationsForResidency);
virtual void processResidency(ResidencyContainer *allocationsForResidency) {}
virtual void processEviction();
void makeResidentHostPtrAllocation(GraphicsAllocation *gfxAllocation);
virtual void addPipeControl(LinearStream &commandStream, bool dcFlush) = 0;
@ -122,6 +123,10 @@ class CommandStreamReceiver {
void setSamplerCacheFlushRequired(SamplerCacheFlushState value) { this->samplerCacheFlushRequired = value; }
protected:
void setDisableL3Cache(bool val) {
disableL3Cache = val;
}
// taskCount - # of tasks submitted
uint32_t taskCount = 0;
// current taskLevel. Used for determining if a PIPE_CONTROL is needed.
@ -159,7 +164,7 @@ class CommandStreamReceiver {
std::unique_ptr<SubmissionAggregator> submissionAggregator;
DispatchMode dispatchMode = ImmediateDispatch;
bool disableL3Cache = 0;
bool disableL3Cache = false;
uint32_t requiredScratchSize = 0;
uint64_t totalMemoryUsed = 0u;
SamplerCacheFlushState samplerCacheFlushRequired = SamplerCacheFlushState::samplerCacheFlushNotRequired;

2
runtime/device/device.cpp
View File

@ -80,7 +80,7 @@ Device::Device(const HardwareInfo &hwInfo,
memset(&deviceInfo, 0, sizeof(deviceInfo));
deviceExtensions.reserve(1000);
preemptionMode = PreemptionHelper::getDefaultPreemptionMode(hwInfo);
deviceEngineType = DebugManager.flags.NodeOrdinal.get() == -1
engineType = DebugManager.flags.NodeOrdinal.get() == -1
? hwInfo.capabilityTable.defaultEngineType
: static_cast<EngineType>(DebugManager.flags.NodeOrdinal.get());
}

4
runtime/device/device.h
View File

@ -82,7 +82,7 @@ class Device : public BaseObject<_cl_device_id> {
DeviceInfo *getMutableDeviceInfo();
MOCKABLE_VIRTUAL const WorkaroundTable *getWaTable() const;
EngineType getEngineType() const {
return deviceEngineType;
return engineType;
}
void *getSLMWindowStartAddress();
@ -166,7 +166,7 @@ class Device : public BaseObject<_cl_device_id> {
std::string exposedBuiltinKernels = "";
PreemptionMode preemptionMode;
EngineType deviceEngineType;
EngineType engineType;
};
template <cl_device_info Param>

24
runtime/helpers/dispatch_info.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -87,9 +87,6 @@ struct MultiDispatchInfo {
for (MemObj *redescribedSurface : redescribedSurfaces) {
redescribedSurface->release();
}
for (Surface *usedSurface : usedSurfaces) {
delete usedSurface;
}
}
MultiDispatchInfo() {
@ -152,25 +149,8 @@ struct MultiDispatchInfo {
redescribedSurfaces.push_back(memObj.release());
}
StackVec<Surface *, 2> &getUsedSurfaces() {
return usedSurfaces;
}
void pushUsedSurface(std::unique_ptr<Surface> surface) {
usedSurfaces.push_back(surface.release());
}
HostPtrSurface *getHostPtrSurface() {
HostPtrSurface *hpt = nullptr;
for (Surface *usedSurface : usedSurfaces) {
hpt = reinterpret_cast<HostPtrSurface *>(usedSurface);
}
return hpt;
}
protected:
StackVec<DispatchInfo, 9> dispatchInfos;
StackVec<MemObj *, 2> redescribedSurfaces;
StackVec<Surface *, 2> usedSurfaces;
};
}
} // namespace OCLRT

39
runtime/memory_manager/surface.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -49,34 +49,47 @@ class NullSurface : public Surface {
class HostPtrSurface : public Surface {
public:
HostPtrSurface(void *ptr, size_t size) : memory_pointer(ptr), surface_size(size) {
HostPtrSurface(void *ptr, size_t size) : memoryPointer(ptr), surfaceSize(size) {
DEBUG_BREAK_IF(!ptr);
gfxAllocation = nullptr;
}
HostPtrSurface(void *ptr, size_t size, GraphicsAllocation *allocation) : memoryPointer(ptr), surfaceSize(size), gfxAllocation(allocation) {
DEBUG_BREAK_IF(!ptr);
}
~HostPtrSurface() override = default;
void makeResident(CommandStreamReceiver &csr) override {
allocation = csr.createAllocationAndHandleResidency(memory_pointer, surface_size);
DEBUG_BREAK_IF(!allocation);
DEBUG_BREAK_IF(!gfxAllocation);
csr.makeResidentHostPtrAllocation(gfxAllocation);
}
void setCompletionStamp(CompletionStamp &cs, Device *pDevice, CommandQueue *pCmdQ) override {
DEBUG_BREAK_IF(!allocation);
allocation->taskCount = cs.taskCount;
DEBUG_BREAK_IF(!gfxAllocation);
gfxAllocation->taskCount = cs.taskCount;
}
Surface *duplicate() override {
return new HostPtrSurface(this->memory_pointer, this->surface_size);
return new HostPtrSurface(this->memoryPointer, this->surfaceSize, this->gfxAllocation);
};
void *getMemoryPointer() const {
return memory_pointer;
return memoryPointer;
}
size_t getSurfaceSize() const {
return surface_size;
return surfaceSize;
}
void setAllocation(GraphicsAllocation *allocation) {
this->gfxAllocation = allocation;
}
GraphicsAllocation *getAllocation() {
return gfxAllocation;
}
protected:
GraphicsAllocation *allocation;
void *memory_pointer;
size_t surface_size;
void *memoryPointer;
size_t surfaceSize;
GraphicsAllocation *gfxAllocation;
};
class MemObjSurface : public Surface {
@ -123,4 +136,4 @@ class GeneralSurface : public Surface {
protected:
GraphicsAllocation *gfxAllocation;
};
}
} // namespace OCLRT

2
runtime/os_interface/windows/windows_defs.h
View File

@ -24,6 +24,6 @@
namespace OCLRT {
constexpr uintptr_t windowsMinAddress = 0x4000;
constexpr uintptr_t windowsMinAddress = 0x200000;
} // namespace OCLRT

38
unit_tests/command_queue/command_enqueue_fixture.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -21,8 +21,10 @@
*/
#pragma once
#include "unit_tests/fixtures/buffer_fixture.h"
#include "unit_tests/fixtures/device_fixture.h"
#include "unit_tests/fixtures/built_in_fixture.h"
#include "unit_tests/fixtures/image_fixture.h"
#include "unit_tests/command_stream/command_stream_fixture.h"
#include "unit_tests/command_queue/command_queue_fixture.h"
#include "unit_tests/indirect_heap/indirect_heap_fixture.h"
@ -78,4 +80,36 @@ struct CommandEnqueueFixture : public CommandEnqueueBaseFixture,
CommandStreamFixture::TearDown();
}
};
}
struct NegativeFailAllocationCommandEnqueueBaseFixture : public CommandEnqueueBaseFixture {
void SetUp() override {
CommandEnqueueBaseFixture::SetUp();
failMemManager.reset(new FailMemoryManager());
BufferDefaults::context = context;
Image2dDefaults::context = context;
buffer.reset(BufferHelper<>::create());
image.reset(ImageHelper<Image2dDefaults>::create());
ptr = static_cast<void *>(array);
oldMemManager = pDevice->getMemoryManager();
pDevice->getCommandStreamReceiver().setMemoryManager(failMemManager.get());
}
void TearDown() override {
pDevice->getCommandStreamReceiver().setMemoryManager(oldMemManager);
buffer.reset(nullptr);
image.reset(nullptr);
BufferDefaults::context = nullptr;
Image2dDefaults::context = nullptr;
CommandEnqueueBaseFixture::TearDown();
}
std::unique_ptr<Buffer> buffer;
std::unique_ptr<Image> image;
std::unique_ptr<FailMemoryManager> failMemManager;
char array[MemoryConstants::cacheLineSize];
void *ptr;
MemoryManager *oldMemManager;
};
} // namespace OCLRT

29
unit_tests/command_queue/enqueue_read_buffer_rect_tests.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -609,3 +609,30 @@ HWTEST_F(EnqueueReadBufferRectTest, givenInOrderQueueAndDstPtrEqualSrcPtrAndNonZ
EXPECT_EQ(CL_SUCCESS, retVal);
EXPECT_EQ(pCmdQ->taskLevel, 1u);
}
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
HWTEST_F(NegativeFailAllocationTest, givenEnqueueReadBufferRectWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
cl_int retVal = CL_SUCCESS;
constexpr size_t rowPitch = 100;
constexpr size_t slicePitch = 100 * 100;
size_t bufferOrigin[] = {0, 0, 0};
size_t hostOrigin[] = {0, 0, 0};
size_t region[] = {50, 50, 1};
retVal = pCmdQ->enqueueReadBufferRect(
buffer.get(),
CL_FALSE,
bufferOrigin,
hostOrigin,
region,
rowPitch,
slicePitch,
rowPitch,
slicePitch,
ptr,
0,
nullptr,
nullptr);
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
}

16
unit_tests/command_queue/enqueue_read_buffer_tests.cpp
View File

@ -518,3 +518,19 @@ HWTEST_F(EnqueueReadBufferTypeTest, givenInOrderQueueAndEnabledSupportCpuCopiesA
EXPECT_EQ(CL_SUCCESS, retVal);
EXPECT_EQ(pCmdQ->taskLevel, 1u);
}
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
HWTEST_F(NegativeFailAllocationTest, givenEnqueueReadBufferWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
cl_int retVal = CL_SUCCESS;
retVal = pCmdQ->enqueueReadBuffer(buffer.get(),
CL_FALSE,
0,
MemoryConstants::cacheLineSize,
ptr,
0,
nullptr,
nullptr);
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
}

26
unit_tests/command_queue/enqueue_read_image_tests.cpp
View File

@ -588,3 +588,29 @@ HWTEST_F(EnqueueReadImageTest, GivenNonZeroCopyImage2DAndImageShareTheSameStorag
EXPECT_EQ(CL_SUCCESS, retVal);
EXPECT_EQ(pCmdQ->taskLevel, 0u);
}
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
HWTEST_F(NegativeFailAllocationTest, givenEnqueueWriteImageWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
cl_int retVal = CL_SUCCESS;
auto imageDesc = image->getImageDesc();
size_t origin[] = {0, 0, 0};
size_t region[] = {imageDesc.image_width, imageDesc.image_height, 1};
size_t rowPitch = image->getHostPtrRowPitch();
size_t slicePitch = image->getHostPtrSlicePitch();
retVal = pCmdQ->enqueueWriteImage(image.get(),
CL_FALSE,
origin,
region,
rowPitch,
slicePitch,
ptr,
0,
nullptr,
nullptr);
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
}

30
unit_tests/command_queue/enqueue_write_buffer_rect_tests.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -606,3 +606,31 @@ HWTEST_F(EnqueueWriteBufferRectTest, givenInOrderQueueAndDstPtrEqualSrcPtrAndNon
EXPECT_EQ(CL_SUCCESS, retVal);
EXPECT_EQ(pCmdQ->taskLevel, 1u);
}
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
HWTEST_F(NegativeFailAllocationTest, givenEnqueueWriteBufferRectWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
cl_int retVal = CL_SUCCESS;
size_t bufferOrigin[] = {0, 0, 0};
size_t hostOrigin[] = {0, 0, 0};
size_t region[] = {50, 50, 1};
constexpr size_t rowPitch = 100;
constexpr size_t slicePitch = 100 * 100;
retVal = pCmdQ->enqueueWriteBufferRect(
buffer.get(),
CL_FALSE,
bufferOrigin,
hostOrigin,
region,
rowPitch,
slicePitch,
rowPitch,
slicePitch,
ptr,
0,
nullptr,
nullptr);
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
}

18
unit_tests/command_queue/enqueue_write_buffer_tests.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -436,3 +436,19 @@ HWTEST_F(EnqueueWriteBufferTypeTest, givenInOrderQueueAndEnabledSupportCpuCopies
EXPECT_EQ(CL_SUCCESS, retVal);
EXPECT_EQ(pCmdQ->taskLevel, 1u);
}
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
HWTEST_F(NegativeFailAllocationTest, givenEnqueueWriteBufferWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
cl_int retVal = CL_SUCCESS;
retVal = pCmdQ->enqueueWriteBuffer(buffer.get(),
CL_FALSE,
0,
MemoryConstants::cacheLineSize,
ptr,
0,
nullptr,
nullptr);
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
}

28
unit_tests/command_queue/enqueue_write_image_tests.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -573,3 +573,29 @@ HWTEST_F(EnqueueWriteImageTest, GivenNonZeroCopyImage2DAndImageShareTheSameStora
EXPECT_EQ(CL_SUCCESS, retVal);
EXPECT_EQ(pCmdQ->taskLevel, 0u);
}
using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
HWTEST_F(NegativeFailAllocationTest, givenEnqueueReadImageWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
cl_int retVal = CL_SUCCESS;
auto imageDesc = image->getImageDesc();
size_t origin[] = {0, 0, 0};
size_t region[] = {imageDesc.image_width, imageDesc.image_height, 1};
size_t rowPitch = image->getHostPtrRowPitch();
size_t slicePitch = image->getHostPtrSlicePitch();
retVal = pCmdQ->enqueueReadImage(image.get(),
CL_FALSE,
origin,
region,
rowPitch,
slicePitch,
ptr,
0,
nullptr,
nullptr);
EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
}

37
unit_tests/command_stream/command_stream_receiver_tests.cpp
View File

@ -137,6 +137,43 @@ TEST_F(CommandStreamReceiverTest, createAllocationAndHandleResidency) {
EXPECT_EQ(size, graphicsAllocation->getUnderlyingBufferSize());
}
TEST_F(CommandStreamReceiverTest, givenCommandStreamerWhenAllocationIsNotAddedToListThenCallerMustFreeAllocation) {
void *hostPtr = reinterpret_cast<void *>(0x1212341);
auto size = 17262u;
GraphicsAllocation *graphicsAllocation = commandStreamReceiver->createAllocationAndHandleResidency(hostPtr, size, false);
ASSERT_NE(nullptr, graphicsAllocation);
EXPECT_EQ(hostPtr, graphicsAllocation->getUnderlyingBuffer());
EXPECT_EQ(size, graphicsAllocation->getUnderlyingBufferSize());
commandStreamReceiver->getMemoryManager()->freeGraphicsMemory(graphicsAllocation);
}
HWTEST_F(CommandStreamReceiverTest, givenCommandStreamerWhenPtrAndSizeMeetL3CriteriaThenCsrEnableL3) {
void *hostPtr = reinterpret_cast<void *>(0xF000);
auto size = 0x2000u;
GraphicsAllocation *graphicsAllocation = commandStreamReceiver->createAllocationAndHandleResidency(hostPtr, size);
ASSERT_NE(nullptr, graphicsAllocation);
auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
EXPECT_FALSE(csr.disableL3Cache);
}
HWTEST_F(CommandStreamReceiverTest, givenCommandStreamerWhenPtrAndSizeDoNotMeetL3CriteriaThenCsrDisableL3) {
void *hostPtr = reinterpret_cast<void *>(0xF001);
auto size = 0x2001u;
GraphicsAllocation *graphicsAllocation = commandStreamReceiver->createAllocationAndHandleResidency(hostPtr, size);
ASSERT_NE(nullptr, graphicsAllocation);
auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
EXPECT_TRUE(csr.disableL3Cache);
}
TEST_F(CommandStreamReceiverTest, memoryManagerHasAccessToCSR) {
auto *memoryManager = commandStreamReceiver->getMemoryManager();
EXPECT_EQ(commandStreamReceiver, memoryManager->csr);

33
unit_tests/helpers/dispatch_info_tests.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -174,24 +174,9 @@ TEST_F(DispatchInfoTest, MultiDispatchInfoEmpty) {
EXPECT_EQ(0u, multiDispatchInfo.getRequiredScratchSize());
EXPECT_FALSE(multiDispatchInfo.usesSlm());
EXPECT_FALSE(multiDispatchInfo.usesStatelessPrintfSurface());
EXPECT_EQ(nullptr, multiDispatchInfo.getHostPtrSurface());
EXPECT_EQ(0u, multiDispatchInfo.getRedescribedSurfaces().size());
}
TEST_F(DispatchInfoTest, MultiDispatchInfoWithHostPtrSurface) {
MultiDispatchInfo multiDispatchInfo;
auto ptr = new char[10];
HostPtrSurface *hps = new HostPtrSurface(ptr, 10);
multiDispatchInfo.pushUsedSurface(std::unique_ptr<HostPtrSurface>(hps));
EXPECT_NE(nullptr, multiDispatchInfo.getHostPtrSurface());
EXPECT_EQ(ptr, multiDispatchInfo.getHostPtrSurface()->getMemoryPointer());
EXPECT_EQ(10u, multiDispatchInfo.getHostPtrSurface()->getSurfaceSize());
delete[] ptr;
}
TEST_F(DispatchInfoTest, MultiDispatchInfoWithRedescribedSurfaces) {
MultiDispatchInfo multiDispatchInfo;
@ -204,22 +189,6 @@ TEST_F(DispatchInfoTest, MultiDispatchInfoWithRedescribedSurfaces) {
EXPECT_EQ(1u, multiDispatchInfo.getRedescribedSurfaces().size());
}
TEST_F(DispatchInfoTest, MultiDispatchInfoWithUsedSurfaces) {
MultiDispatchInfo multiDispatchInfo;
auto ptr = new char[10];
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new HostPtrSurface(ptr, 10)));
auto image = Image2dHelper<>::create(pContext);
ASSERT_NE(nullptr, image);
multiDispatchInfo.pushUsedSurface(std::unique_ptr<Surface>(new MemObjSurface(image)));
EXPECT_EQ(2u, multiDispatchInfo.getUsedSurfaces().size());
image->release();
delete[] ptr;
}
TEST_F(DispatchInfoTest, MultiDispatchInfoWithNoGeometry) {
DispatchInfo dispatchInfo;

10
unit_tests/memory_manager/surface_tests.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -44,7 +44,7 @@ Surface *Create<NullSurface>(char *data, MockBuffer *buffer, GraphicsAllocation
template <>
Surface *Create<HostPtrSurface>(char *data, MockBuffer *buffer, GraphicsAllocation *gfxAllocation) {
return new HostPtrSurface(data, 10);
return new HostPtrSurface(data, 10, gfxAllocation);
}
template <>
@ -56,7 +56,7 @@ template <>
Surface *Create<GeneralSurface>(char *data, MockBuffer *buffer, GraphicsAllocation *gfxAllocation) {
return new GeneralSurface(gfxAllocation);
}
}
} // namespace createSurface
template <typename T>
class SurfaceTest : public ::testing::Test {
@ -73,7 +73,7 @@ HWTEST_TYPED_TEST(SurfaceTest, GivenSurfaceWhenInterfaceIsUsedThenSurfaceBehaves
MockCsr<FamilyType> *csr = new MockCsr<FamilyType>(execStamp);
auto mm = csr->createMemoryManager(false);
auto memManager = csr->createMemoryManager(false);
Surface *surface = createSurface::Create<TypeParam>(this->data,
&this->buffer,
@ -94,7 +94,7 @@ HWTEST_TYPED_TEST(SurfaceTest, GivenSurfaceWhenInterfaceIsUsedThenSurfaceBehaves
delete duplicatedSurface;
delete surface;
delete csr;
delete mm;
delete memManager;
}
class CoherentMemObjSurface : public SurfaceTest<MemObjSurface> {

4
unit_tests/mocks/mock_device.cpp
View File

@ -80,12 +80,12 @@ void MockDevice::resetCommandStreamReceiver(CommandStreamReceiver *newCsr) {
memoryManager->csr = commandStreamReceiver;
}
OCLRT::FailMemoryManager::FailMemoryManager() : MemoryManager(false) {
OCLRT::FailMemoryManager::FailMemoryManager() : MockMemoryManager() {
agnostic = nullptr;
fail = 0;
}
OCLRT::FailMemoryManager::FailMemoryManager(int32_t fail) : MemoryManager(false) {
OCLRT::FailMemoryManager::FailMemoryManager(int32_t fail) : MockMemoryManager() {
allocations.reserve(fail);
agnostic = new OsAgnosticMemoryManager(false);
this->fail = fail;

4
unit_tests/mocks/mock_device.h
View File

@ -26,6 +26,7 @@
#include "runtime/helpers/hw_info.h"
#include "runtime/memory_manager/os_agnostic_memory_manager.h"
#include "unit_tests/libult/ult_command_stream_receiver.h"
#include "unit_tests/mocks/mock_memory_manager.h"
namespace OCLRT {
class OSTime;
@ -102,7 +103,7 @@ class MockDevice : public Device {
WorkaroundTable mockWaTable = {};
};
class FailMemoryManager : public MemoryManager {
class FailMemoryManager : public MockMemoryManager {
public:
FailMemoryManager();
FailMemoryManager(int32_t fail);
@ -113,7 +114,6 @@ class FailMemoryManager : public MemoryManager {
}
delete agnostic;
}
applyCommonCleanup();
};
GraphicsAllocation *allocateGraphicsMemory(size_t size, size_t alignment, bool forcePin, bool uncacheable) override {
if (fail <= 0) {

5
unit_tests/os_interface/windows/wddm_tests.cpp
View File

@ -38,15 +38,14 @@
using namespace OCLRT;
HWTEST_F(WddmTestSingle, givenMinWindowsAddressWhenWddmIsInitializedThenWddmUseThisAddress) {
uintptr_t expectedAddress = 0x4000;
uintptr_t expectedAddress = 0x200000;
EXPECT_EQ(expectedAddress, OCLRT::windowsMinAddress);
Wddm *wddm = Wddm::createWddm();
std::unique_ptr<Wddm> wddm(Wddm::createWddm());
bool status = wddm->init<FamilyType>();
EXPECT_TRUE(status);
EXPECT_TRUE(wddm->isInitialized());
EXPECT_EQ(expectedAddress, wddm->getWddmMinAddress());
delete wddm;
}
HWTEST_F(WddmTestSingle, creation) {