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refactor: adjust file names after pre-gen12 removal 1/3 

Related-To: NEO-12681
Signed-off-by: Michał Pryba <michal.pryba@intel.com>
This commit is contained in:
Michał Pryba 2025-01-22 13:10:44 +00:00 committed by Compute-Runtime-Automation
parent efa61ff069
commit 53831f61df
26 changed files with 266 additions and 307 deletions
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3
opencl/source/command_queue/CMakeLists.txt
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@ -1,5 +1,5 @@
#
# Copyright (C) 2018-2024 Intel Corporation
# Copyright (C) 2018-2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
@ -42,7 +42,6 @@ set(RUNTIME_SRCS_COMMAND_QUEUE
${CMAKE_CURRENT_SOURCE_DIR}/flush.h
${CMAKE_CURRENT_SOURCE_DIR}/gpgpu_walker.h
${CMAKE_CURRENT_SOURCE_DIR}/gpgpu_walker_base.inl
${CMAKE_CURRENT_SOURCE_DIR}/gpgpu_walker_bdw_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/hardware_interface.h
${CMAKE_CURRENT_SOURCE_DIR}/hardware_interface_base.inl
${CMAKE_CURRENT_SOURCE_DIR}/hardware_interface_bdw_and_later.inl

167
opencl/source/command_queue/gpgpu_walker_bdw_and_later.inl
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@ -1,167 +0,0 @@
/*
* Copyright (C) 2019-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/execution_environment/root_device_environment.h"
#include "shared/source/helpers/gfx_core_helper.h"
#include "shared/source/helpers/pipe_control_args.h"
#include "shared/source/helpers/simd_helper.h"
#include "shared/source/utilities/hw_timestamps.h"
#include "opencl/source/command_queue/gpgpu_walker_base.inl"
namespace NEO {
template <typename GfxFamily>
template <typename WalkerType>
inline size_t GpgpuWalkerHelper<GfxFamily>::setGpgpuWalkerThreadData(
WalkerType *walkerCmd,
const KernelDescriptor &kernelDescriptor,
const size_t startWorkGroups[3],
const size_t numWorkGroups[3],
const size_t localWorkSizesIn[3],
uint32_t simd,
uint32_t workDim,
bool localIdsGenerationByRuntime,
bool inlineDataProgrammingRequired,
uint32_t requiredWorkgroupOrder) {
auto localWorkSize = static_cast<uint32_t>(localWorkSizesIn[0] * localWorkSizesIn[1] * localWorkSizesIn[2]);
auto threadsPerWorkGroup = getThreadsPerWG(simd, localWorkSize);
walkerCmd->setThreadWidthCounterMaximum(threadsPerWorkGroup);
walkerCmd->setThreadGroupIdXDimension(static_cast<uint32_t>(numWorkGroups[0]));
walkerCmd->setThreadGroupIdYDimension(static_cast<uint32_t>(numWorkGroups[1]));
walkerCmd->setThreadGroupIdZDimension(static_cast<uint32_t>(numWorkGroups[2]));
// compute executionMask - to tell which SIMD lines are active within thread
auto remainderSimdLanes = localWorkSize & (simd - 1);
uint64_t executionMask = maxNBitValue(remainderSimdLanes);
if (!executionMask)
executionMask = ~executionMask;
walkerCmd->setRightExecutionMask(static_cast<uint32_t>(executionMask));
walkerCmd->setBottomExecutionMask(static_cast<uint32_t>(0xffffffff));
walkerCmd->setSimdSize(getSimdConfig<DefaultWalkerType>(simd));
walkerCmd->setThreadGroupIdStartingX(static_cast<uint32_t>(startWorkGroups[0]));
walkerCmd->setThreadGroupIdStartingY(static_cast<uint32_t>(startWorkGroups[1]));
walkerCmd->setThreadGroupIdStartingResumeZ(static_cast<uint32_t>(startWorkGroups[2]));
return localWorkSize;
}
template <typename GfxFamily>
template <typename WalkerType>
void GpgpuWalkerHelper<GfxFamily>::setupTimestampPacket(
LinearStream *cmdStream,
WalkerType *walkerCmd,
TagNodeBase *timestampPacketNode,
const RootDeviceEnvironment &rootDeviceEnvironment) {
uint64_t address = TimestampPacketHelper::getContextEndGpuAddress(*timestampPacketNode);
PipeControlArgs args;
MemorySynchronizationCommands<GfxFamily>::addBarrierWithPostSyncOperation(
*cmdStream,
PostSyncMode::immediateData,
address,
0,
rootDeviceEnvironment,
args);
}
template <typename GfxFamily>
template <typename WalkerType>
size_t EnqueueOperation<GfxFamily>::getSizeRequiredCSKernel(bool reserveProfilingCmdsSpace, bool reservePerfCounters, CommandQueue &commandQueue, const Kernel *pKernel, const DispatchInfo &dispatchInfo) {
size_t size = sizeof(typename GfxFamily::GPGPU_WALKER) + HardwareCommandsHelper<GfxFamily>::getSizeRequiredCS() +
sizeof(PIPE_CONTROL) * (MemorySynchronizationCommands<GfxFamily>::isBarrierWaRequired(commandQueue.getDevice().getRootDeviceEnvironment()) ? 2 : 1);
if (reserveProfilingCmdsSpace) {
size += 2 * sizeof(PIPE_CONTROL) + 2 * sizeof(typename GfxFamily::MI_STORE_REGISTER_MEM);
}
size += PerformanceCounters::getGpuCommandsSize(commandQueue.getPerfCounters(), commandQueue.getGpgpuEngine().osContext->getEngineType(), reservePerfCounters);
size += GpgpuWalkerHelper<GfxFamily>::getSizeForWaDisableRccRhwoOptimization(pKernel);
return size;
}
template <typename GfxFamily>
size_t EnqueueOperation<GfxFamily>::getSizeRequiredForTimestampPacketWrite() {
return sizeof(PIPE_CONTROL);
}
template <typename GfxFamily>
void GpgpuWalkerHelper<GfxFamily>::dispatchProfilingCommandsStart(
TagNodeBase &hwTimeStamps,
LinearStream *commandStream,
const RootDeviceEnvironment &rootDeviceEnvironment) {
using MI_STORE_REGISTER_MEM = typename GfxFamily::MI_STORE_REGISTER_MEM;
// PIPE_CONTROL for global timestamp
uint64_t timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, globalStartTS);
PipeControlArgs args;
MemorySynchronizationCommands<GfxFamily>::addBarrierWithPostSyncOperation(
*commandStream,
PostSyncMode::timestamp,
timeStampAddress,
0llu,
rootDeviceEnvironment,
args);
auto &gfxCoreHelper = rootDeviceEnvironment.getHelper<GfxCoreHelper>();
if (!gfxCoreHelper.useOnlyGlobalTimestamps()) {
// MI_STORE_REGISTER_MEM for context local timestamp
timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, contextStartTS);
// low part
auto pMICmdLow = commandStream->getSpaceForCmd<MI_STORE_REGISTER_MEM>();
MI_STORE_REGISTER_MEM cmd = GfxFamily::cmdInitStoreRegisterMem;
adjustMiStoreRegMemMode(&cmd);
cmd.setRegisterAddress(RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
cmd.setMemoryAddress(timeStampAddress);
*pMICmdLow = cmd;
}
}
template <typename GfxFamily>
void GpgpuWalkerHelper<GfxFamily>::dispatchProfilingCommandsEnd(
TagNodeBase &hwTimeStamps,
LinearStream *commandStream,
const RootDeviceEnvironment &rootDeviceEnvironment) {
using MI_STORE_REGISTER_MEM = typename GfxFamily::MI_STORE_REGISTER_MEM;
// PIPE_CONTROL for global timestamp
uint64_t timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, globalEndTS);
PipeControlArgs args;
MemorySynchronizationCommands<GfxFamily>::addBarrierWithPostSyncOperation(
*commandStream,
PostSyncMode::timestamp,
timeStampAddress,
0llu,
rootDeviceEnvironment,
args);
auto &gfxCoreHelper = rootDeviceEnvironment.getHelper<GfxCoreHelper>();
if (!gfxCoreHelper.useOnlyGlobalTimestamps()) {
// MI_STORE_REGISTER_MEM for context local timestamp
uint64_t timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, contextEndTS);
// low part
auto pMICmdLow = commandStream->getSpaceForCmd<MI_STORE_REGISTER_MEM>();
MI_STORE_REGISTER_MEM cmd = GfxFamily::cmdInitStoreRegisterMem;
adjustMiStoreRegMemMode(&cmd);
cmd.setRegisterAddress(RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
cmd.setMemoryAddress(timeStampAddress);
*pMICmdLow = cmd;
}
}
template <typename GfxFamily>
size_t EnqueueOperation<GfxFamily>::getSizeForCacheFlushAfterWalkerCommands(const Kernel &kernel, const CommandQueue &commandQueue) {
return 0;
}
} // namespace NEO

157
opencl/source/gen12lp/gpgpu_walker_gen12lp.cpp
View File

@ -1,19 +1,172 @@
/*
* Copyright (C) 2019-2024 Intel Corporation
* Copyright (C) 2019-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/execution_environment/root_device_environment.h"
#include "shared/source/gen12lp/hw_cmds.h"
#include "shared/source/helpers/gfx_core_helper.h"
#include "shared/source/helpers/pipe_control_args.h"
#include "shared/source/helpers/simd_helper.h"
#include "shared/source/utilities/hw_timestamps.h"
#include "opencl/source/command_queue/gpgpu_walker_bdw_and_later.inl"
#include "opencl/source/command_queue/gpgpu_walker_base.inl"
#include "opencl/source/command_queue/hardware_interface_bdw_and_later.inl"
namespace NEO {
using Family = Gen12LpFamily;
template <typename GfxFamily>
template <typename WalkerType>
inline size_t GpgpuWalkerHelper<GfxFamily>::setGpgpuWalkerThreadData(
WalkerType *walkerCmd,
const KernelDescriptor &kernelDescriptor,
const size_t startWorkGroups[3],
const size_t numWorkGroups[3],
const size_t localWorkSizesIn[3],
uint32_t simd,
uint32_t workDim,
bool localIdsGenerationByRuntime,
bool inlineDataProgrammingRequired,
uint32_t requiredWorkgroupOrder) {
auto localWorkSize = static_cast<uint32_t>(localWorkSizesIn[0] * localWorkSizesIn[1] * localWorkSizesIn[2]);
auto threadsPerWorkGroup = getThreadsPerWG(simd, localWorkSize);
walkerCmd->setThreadWidthCounterMaximum(threadsPerWorkGroup);
walkerCmd->setThreadGroupIdXDimension(static_cast<uint32_t>(numWorkGroups[0]));
walkerCmd->setThreadGroupIdYDimension(static_cast<uint32_t>(numWorkGroups[1]));
walkerCmd->setThreadGroupIdZDimension(static_cast<uint32_t>(numWorkGroups[2]));
// compute executionMask - to tell which SIMD lines are active within thread
auto remainderSimdLanes = localWorkSize & (simd - 1);
uint64_t executionMask = maxNBitValue(remainderSimdLanes);
if (!executionMask)
executionMask = ~executionMask;
walkerCmd->setRightExecutionMask(static_cast<uint32_t>(executionMask));
walkerCmd->setBottomExecutionMask(static_cast<uint32_t>(0xffffffff));
walkerCmd->setSimdSize(getSimdConfig<DefaultWalkerType>(simd));
walkerCmd->setThreadGroupIdStartingX(static_cast<uint32_t>(startWorkGroups[0]));
walkerCmd->setThreadGroupIdStartingY(static_cast<uint32_t>(startWorkGroups[1]));
walkerCmd->setThreadGroupIdStartingResumeZ(static_cast<uint32_t>(startWorkGroups[2]));
return localWorkSize;
}
template <typename GfxFamily>
template <typename WalkerType>
void GpgpuWalkerHelper<GfxFamily>::setupTimestampPacket(
LinearStream *cmdStream,
WalkerType *walkerCmd,
TagNodeBase *timestampPacketNode,
const RootDeviceEnvironment &rootDeviceEnvironment) {
uint64_t address = TimestampPacketHelper::getContextEndGpuAddress(*timestampPacketNode);
PipeControlArgs args;
MemorySynchronizationCommands<GfxFamily>::addBarrierWithPostSyncOperation(
*cmdStream,
PostSyncMode::immediateData,
address,
0,
rootDeviceEnvironment,
args);
}
template <typename GfxFamily>
template <typename WalkerType>
size_t EnqueueOperation<GfxFamily>::getSizeRequiredCSKernel(bool reserveProfilingCmdsSpace, bool reservePerfCounters, CommandQueue &commandQueue, const Kernel *pKernel, const DispatchInfo &dispatchInfo) {
size_t size = sizeof(typename GfxFamily::GPGPU_WALKER) + HardwareCommandsHelper<GfxFamily>::getSizeRequiredCS() +
sizeof(PIPE_CONTROL) * (MemorySynchronizationCommands<GfxFamily>::isBarrierWaRequired(commandQueue.getDevice().getRootDeviceEnvironment()) ? 2 : 1);
if (reserveProfilingCmdsSpace) {
size += 2 * sizeof(PIPE_CONTROL) + 2 * sizeof(typename GfxFamily::MI_STORE_REGISTER_MEM);
}
size += PerformanceCounters::getGpuCommandsSize(commandQueue.getPerfCounters(), commandQueue.getGpgpuEngine().osContext->getEngineType(), reservePerfCounters);
size += GpgpuWalkerHelper<GfxFamily>::getSizeForWaDisableRccRhwoOptimization(pKernel);
return size;
}
template <typename GfxFamily>
size_t EnqueueOperation<GfxFamily>::getSizeRequiredForTimestampPacketWrite() {
return sizeof(PIPE_CONTROL);
}
template <typename GfxFamily>
void GpgpuWalkerHelper<GfxFamily>::dispatchProfilingCommandsStart(
TagNodeBase &hwTimeStamps,
LinearStream *commandStream,
const RootDeviceEnvironment &rootDeviceEnvironment) {
using MI_STORE_REGISTER_MEM = typename GfxFamily::MI_STORE_REGISTER_MEM;
// PIPE_CONTROL for global timestamp
uint64_t timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, globalStartTS);
PipeControlArgs args;
MemorySynchronizationCommands<GfxFamily>::addBarrierWithPostSyncOperation(
*commandStream,
PostSyncMode::timestamp,
timeStampAddress,
0llu,
rootDeviceEnvironment,
args);
auto &gfxCoreHelper = rootDeviceEnvironment.getHelper<GfxCoreHelper>();
if (!gfxCoreHelper.useOnlyGlobalTimestamps()) {
// MI_STORE_REGISTER_MEM for context local timestamp
timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, contextStartTS);
// low part
auto pMICmdLow = commandStream->getSpaceForCmd<MI_STORE_REGISTER_MEM>();
MI_STORE_REGISTER_MEM cmd = GfxFamily::cmdInitStoreRegisterMem;
adjustMiStoreRegMemMode(&cmd);
cmd.setRegisterAddress(RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
cmd.setMemoryAddress(timeStampAddress);
*pMICmdLow = cmd;
}
}
template <typename GfxFamily>
void GpgpuWalkerHelper<GfxFamily>::dispatchProfilingCommandsEnd(
TagNodeBase &hwTimeStamps,
LinearStream *commandStream,
const RootDeviceEnvironment &rootDeviceEnvironment) {
using MI_STORE_REGISTER_MEM = typename GfxFamily::MI_STORE_REGISTER_MEM;
// PIPE_CONTROL for global timestamp
uint64_t timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, globalEndTS);
PipeControlArgs args;
MemorySynchronizationCommands<GfxFamily>::addBarrierWithPostSyncOperation(
*commandStream,
PostSyncMode::timestamp,
timeStampAddress,
0llu,
rootDeviceEnvironment,
args);
auto &gfxCoreHelper = rootDeviceEnvironment.getHelper<GfxCoreHelper>();
if (!gfxCoreHelper.useOnlyGlobalTimestamps()) {
// MI_STORE_REGISTER_MEM for context local timestamp
uint64_t timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, contextEndTS);
// low part
auto pMICmdLow = commandStream->getSpaceForCmd<MI_STORE_REGISTER_MEM>();
MI_STORE_REGISTER_MEM cmd = GfxFamily::cmdInitStoreRegisterMem;
adjustMiStoreRegMemMode(&cmd);
cmd.setRegisterAddress(RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
cmd.setMemoryAddress(timeStampAddress);
*pMICmdLow = cmd;
}
}
template <typename GfxFamily>
size_t EnqueueOperation<GfxFamily>::getSizeForCacheFlushAfterWalkerCommands(const Kernel &kernel, const CommandQueue &commandQueue) {
return 0;
}
template <>
void GpgpuWalkerHelper<Family>::adjustMiStoreRegMemMode(MI_STORE_REG_MEM<Family> *storeCmd) {
storeCmd->setMmioRemapEnable(true);

2
shared/offline_compiler/source/CMakeLists.txt
View File

@ -66,7 +66,7 @@ set(CLOC_LIB_SRCS_LIB
${NEO_SHARED_DIRECTORY}/helpers/compiler_options_parser.cpp
${NEO_SHARED_DIRECTORY}/helpers/compiler_options_parser.h
${NEO_SHARED_DIRECTORY}/helpers/cache_policy.h
${NEO_SHARED_DIRECTORY}/helpers/cache_policy_bdw_and_later.inl
${NEO_SHARED_DIRECTORY}/helpers/cache_policy_tgllp_and_later.inl
${NEO_SHARED_DIRECTORY}/helpers/cache_policy_dg2_and_later.inl
${NEO_SHARED_DIRECTORY}/helpers/debug_helpers.cpp
${NEO_SHARED_DIRECTORY}/helpers/hw_info.cpp

3
shared/source/aub/CMakeLists.txt
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@ -1,5 +1,5 @@
#
# Copyright (C) 2020-2021 Intel Corporation
# Copyright (C) 2020-2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
@ -12,7 +12,6 @@ set(NEO_CORE_AUB
${CMAKE_CURRENT_SOURCE_DIR}/aub_helper.h
${CMAKE_CURRENT_SOURCE_DIR}/aub_helper_add_mmio.cpp
${CMAKE_CURRENT_SOURCE_DIR}/aub_helper_base.inl
${CMAKE_CURRENT_SOURCE_DIR}/aub_helper_bdw_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}aub_helper_extra.cpp
${CMAKE_CURRENT_SOURCE_DIR}/aub_mapper_base.h
${CMAKE_CURRENT_SOURCE_DIR}/aub_stream_provider.h

32
shared/source/aub/aub_helper_bdw_and_later.inl
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@ -1,32 +0,0 @@
/*
* Copyright (C) 2019-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/aub/aub_helper_base.inl"
namespace NEO {
template <typename GfxFamily>
int AubHelperHw<GfxFamily>::getDataHintForPml4Entry() const {
return AubMemDump::DataTypeHintValues::TraceNotype;
}
template <typename GfxFamily>
int AubHelperHw<GfxFamily>::getDataHintForPdpEntry() const {
return AubMemDump::DataTypeHintValues::TraceNotype;
}
template <typename GfxFamily>
int AubHelperHw<GfxFamily>::getDataHintForPdEntry() const {
return AubMemDump::DataTypeHintValues::TraceNotype;
}
template <typename GfxFamily>
int AubHelperHw<GfxFamily>::getDataHintForPtEntry() const {
return AubMemDump::DataTypeHintValues::TraceNotype;
}
} // namespace NEO

24
shared/source/gen12lp/aub_mem_dump_gen12lp.cpp
View File

@ -1,11 +1,11 @@
/*
* Copyright (C) 2019-2024 Intel Corporation
* Copyright (C) 2019-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/aub/aub_helper_bdw_and_later.inl"
#include "shared/source/aub/aub_helper_base.inl"
#include "shared/source/aub_mem_dump/aub_alloc_dump.inl"
#include "shared/source/aub_mem_dump/aub_mem_dump.inl"
#include "shared/source/gen12lp/aub_mapper.h"
@ -33,6 +33,26 @@ template struct AubPageTableHelper64<Traits<device, 48>>;
namespace NEO {
using Family = Gen12LpFamily;
template <typename GfxFamily>
int AubHelperHw<GfxFamily>::getDataHintForPml4Entry() const {
return AubMemDump::DataTypeHintValues::TraceNotype;
}
template <typename GfxFamily>
int AubHelperHw<GfxFamily>::getDataHintForPdpEntry() const {
return AubMemDump::DataTypeHintValues::TraceNotype;
}
template <typename GfxFamily>
int AubHelperHw<GfxFamily>::getDataHintForPdEntry() const {
return AubMemDump::DataTypeHintValues::TraceNotype;
}
template <typename GfxFamily>
int AubHelperHw<GfxFamily>::getDataHintForPtEntry() const {
return AubMemDump::DataTypeHintValues::TraceNotype;
}
static const AubMemDump::LrcaHelperRcs rcs(0x002000);
static const AubMemDump::LrcaHelperBcs bcs(0x022000);
static const AubMemDump::LrcaHelperVcs vcs(0x1c0000);

4
shared/source/gen12lp/enable_gen12lp.cpp
View File

@ -1,12 +1,12 @@
/*
* Copyright (C) 2020-2023 Intel Corporation
* Copyright (C) 2020-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen12lp/hw_cmds.h"
#include "shared/source/helpers/cache_policy_bdw_and_later.inl"
#include "shared/source/helpers/cache_policy_tgllp_and_later.inl"
#include "shared/source/helpers/enable_product.inl"
#include "shared/source/os_interface/product_helper.h"

4
shared/source/gen12lp/linux/product_helper_adln.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2022-2023 Intel Corporation
* Copyright (C) 2022-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_ALDERLAKE_N;

4
shared/source/gen12lp/linux/product_helper_adlp.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2024 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -12,7 +12,7 @@
#include "shared/source/helpers/pipeline_select_helper.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_ALDERLAKE_P;

4
shared/source/gen12lp/linux/product_helper_adls.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_ALDERLAKE_S;

4
shared/source/gen12lp/linux/product_helper_dg1.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2024 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_DG1;

4
shared/source/gen12lp/linux/product_helper_rkl.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2024 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_ROCKETLAKE;

4
shared/source/gen12lp/linux/product_helper_tgllp.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2024 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_TIGERLAKE_LP;

58
shared/source/gen12lp/preamble_gen12lp.cpp
View File

@ -1,22 +1,76 @@
/*
* Copyright (C) 2019-2024 Intel Corporation
* Copyright (C) 2019-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/csr_definitions.h"
#include "shared/source/command_stream/stream_properties.h"
#include "shared/source/execution_environment/root_device_environment.h"
#include "shared/source/gen12lp/hw_cmds_base.h"
#include "shared/source/helpers/flat_batch_buffer_helper.h"
#include "shared/source/helpers/hw_info.h"
#include "shared/source/helpers/pipe_control_args.h"
#include "shared/source/helpers/pipeline_select_helper.h"
#include "shared/source/helpers/preamble_bdw_and_later.inl"
#include "shared/source/helpers/preamble_base.inl"
namespace NEO {
using Family = Gen12LpFamily;
template <typename GfxFamily>
void *PreambleHelper<GfxFamily>::getSpaceForVfeState(LinearStream *pCommandStream,
const HardwareInfo &hwInfo,
EngineGroupType engineGroupType) {
using MEDIA_VFE_STATE = typename GfxFamily::MEDIA_VFE_STATE;
addPipeControlBeforeVfeCmd(pCommandStream, &hwInfo, engineGroupType);
return pCommandStream->getSpaceForCmd<MEDIA_VFE_STATE>();
}
template <typename GfxFamily>
void PreambleHelper<GfxFamily>::programVfeState(void *pVfeState,
const RootDeviceEnvironment &rootDeviceEnvironment,
uint32_t scratchSize,
uint64_t scratchAddress,
uint32_t maxFrontEndThreads,
const StreamProperties &streamProperties) {
using MEDIA_VFE_STATE = typename GfxFamily::MEDIA_VFE_STATE;
auto pMediaVfeState = reinterpret_cast<MEDIA_VFE_STATE *>(pVfeState);
MEDIA_VFE_STATE cmd = GfxFamily::cmdInitMediaVfeState;
cmd.setMaximumNumberOfThreads(maxFrontEndThreads);
cmd.setNumberOfUrbEntries(1);
cmd.setUrbEntryAllocationSize(PreambleHelper<GfxFamily>::getUrbEntryAllocationSize());
cmd.setPerThreadScratchSpace(PreambleHelper<GfxFamily>::getScratchSizeValueToProgramMediaVfeState(scratchSize));
cmd.setStackSize(PreambleHelper<GfxFamily>::getScratchSizeValueToProgramMediaVfeState(scratchSize));
uint32_t lowAddress = static_cast<uint32_t>(0xFFFFFFFF & scratchAddress);
uint32_t highAddress = static_cast<uint32_t>(0xFFFFFFFF & (scratchAddress >> 32));
cmd.setScratchSpaceBasePointer(lowAddress);
cmd.setScratchSpaceBasePointerHigh(highAddress);
appendProgramVFEState(rootDeviceEnvironment, streamProperties, &cmd);
*pMediaVfeState = cmd;
}
template <typename GfxFamily>
uint64_t PreambleHelper<GfxFamily>::getScratchSpaceAddressOffsetForVfeState(LinearStream *pCommandStream, void *pVfeState) {
using MEDIA_VFE_STATE = typename GfxFamily::MEDIA_VFE_STATE;
return static_cast<uint64_t>(reinterpret_cast<uintptr_t>(pVfeState) -
reinterpret_cast<uintptr_t>(pCommandStream->getCpuBase()) +
MEDIA_VFE_STATE::PATCH_CONSTANTS::SCRATCHSPACEBASEPOINTER_BYTEOFFSET);
}
template <typename GfxFamily>
size_t PreambleHelper<GfxFamily>::getVFECommandsSize() {
using MEDIA_VFE_STATE = typename GfxFamily::MEDIA_VFE_STATE;
return sizeof(MEDIA_VFE_STATE) + sizeof(PIPE_CONTROL);
}
template <typename GfxFamily>
void PreambleHelper<GfxFamily>::setSingleSliceDispatchMode(void *cmd, bool enable) {
}
template <>
uint32_t PreambleHelper<Family>::getL3Config(const HardwareInfo &hwInfo, bool useSLM) {
uint32_t l3Config = 0;

4
shared/source/gen12lp/windows/product_helper_adln.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2022-2023 Intel Corporation
* Copyright (C) 2022-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_ALDERLAKE_N;

4
shared/source/gen12lp/windows/product_helper_adlp.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -12,7 +12,7 @@
#include "shared/source/helpers/pipeline_select_helper.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_ALDERLAKE_P;

4
shared/source/gen12lp/windows/product_helper_adls.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_ALDERLAKE_S;

4
shared/source/gen12lp/windows/product_helper_dg1.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2024 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_DG1;

4
shared/source/gen12lp/windows/product_helper_rkl.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_ROCKETLAKE;

4
shared/source/gen12lp/windows/product_helper_tgllp.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2024 Intel Corporation
* Copyright (C) 2021-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -10,7 +10,7 @@
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/product_helper.h"
#include "shared/source/os_interface/product_helper.inl"
#include "shared/source/os_interface/product_helper_bdw_and_later.inl"
#include "shared/source/os_interface/product_helper_tgllp_and_later.inl"
constexpr static auto gfxProduct = IGFX_TIGERLAKE_LP;

3
shared/source/helpers/CMakeLists.txt
View File

@ -36,7 +36,7 @@ set(NEO_CORE_HELPERS
${CMAKE_CURRENT_SOURCE_DIR}/cache_policy.cpp
${CMAKE_CURRENT_SOURCE_DIR}/cache_policy.h
${CMAKE_CURRENT_SOURCE_DIR}/cache_policy_base.inl
${CMAKE_CURRENT_SOURCE_DIR}/cache_policy_bdw_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/cache_policy_tgllp_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/casts.h
${CMAKE_CURRENT_SOURCE_DIR}/common_types.h
${CMAKE_CURRENT_SOURCE_DIR}/compiler_product_helper.h
@ -131,7 +131,6 @@ set(NEO_CORE_HELPERS
${CMAKE_CURRENT_SOURCE_DIR}/populate_factory.h
${CMAKE_CURRENT_SOURCE_DIR}/preamble.h
${CMAKE_CURRENT_SOURCE_DIR}/preamble_base.inl
${CMAKE_CURRENT_SOURCE_DIR}/preamble_bdw_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/preprocessor.h
${CMAKE_CURRENT_SOURCE_DIR}/product_config_helper.cpp
${CMAKE_CURRENT_SOURCE_DIR}/product_config_helper.h

2
shared/source/helpers/cache_policy_bdw_and_later.inl → shared/source/helpers/cache_policy_tgllp_and_later.inl
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2022 Intel Corporation
* Copyright (C) 2022-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*

66
shared/source/helpers/preamble_bdw_and_later.inl
View File

@ -1,66 +0,0 @@
/*
* Copyright (C) 2019-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/stream_properties.h"
#include "shared/source/helpers/flat_batch_buffer_helper.h"
#include "shared/source/helpers/preamble_base.inl"
namespace NEO {
template <typename GfxFamily>
void *PreambleHelper<GfxFamily>::getSpaceForVfeState(LinearStream *pCommandStream,
const HardwareInfo &hwInfo,
EngineGroupType engineGroupType) {
using MEDIA_VFE_STATE = typename GfxFamily::MEDIA_VFE_STATE;
addPipeControlBeforeVfeCmd(pCommandStream, &hwInfo, engineGroupType);
return pCommandStream->getSpaceForCmd<MEDIA_VFE_STATE>();
}
template <typename GfxFamily>
void PreambleHelper<GfxFamily>::programVfeState(void *pVfeState,
const RootDeviceEnvironment &rootDeviceEnvironment,
uint32_t scratchSize,
uint64_t scratchAddress,
uint32_t maxFrontEndThreads,
const StreamProperties &streamProperties) {
using MEDIA_VFE_STATE = typename GfxFamily::MEDIA_VFE_STATE;
auto pMediaVfeState = reinterpret_cast<MEDIA_VFE_STATE *>(pVfeState);
MEDIA_VFE_STATE cmd = GfxFamily::cmdInitMediaVfeState;
cmd.setMaximumNumberOfThreads(maxFrontEndThreads);
cmd.setNumberOfUrbEntries(1);
cmd.setUrbEntryAllocationSize(PreambleHelper<GfxFamily>::getUrbEntryAllocationSize());
cmd.setPerThreadScratchSpace(PreambleHelper<GfxFamily>::getScratchSizeValueToProgramMediaVfeState(scratchSize));
cmd.setStackSize(PreambleHelper<GfxFamily>::getScratchSizeValueToProgramMediaVfeState(scratchSize));
uint32_t lowAddress = static_cast<uint32_t>(0xFFFFFFFF & scratchAddress);
uint32_t highAddress = static_cast<uint32_t>(0xFFFFFFFF & (scratchAddress >> 32));
cmd.setScratchSpaceBasePointer(lowAddress);
cmd.setScratchSpaceBasePointerHigh(highAddress);
appendProgramVFEState(rootDeviceEnvironment, streamProperties, &cmd);
*pMediaVfeState = cmd;
}
template <typename GfxFamily>
uint64_t PreambleHelper<GfxFamily>::getScratchSpaceAddressOffsetForVfeState(LinearStream *pCommandStream, void *pVfeState) {
using MEDIA_VFE_STATE = typename GfxFamily::MEDIA_VFE_STATE;
return static_cast<uint64_t>(reinterpret_cast<uintptr_t>(pVfeState) -
reinterpret_cast<uintptr_t>(pCommandStream->getCpuBase()) +
MEDIA_VFE_STATE::PATCH_CONSTANTS::SCRATCHSPACEBASEPOINTER_BYTEOFFSET);
}
template <typename GfxFamily>
size_t PreambleHelper<GfxFamily>::getVFECommandsSize() {
using MEDIA_VFE_STATE = typename GfxFamily::MEDIA_VFE_STATE;
return sizeof(MEDIA_VFE_STATE) + sizeof(PIPE_CONTROL);
}
template <typename GfxFamily>
void PreambleHelper<GfxFamily>::setSingleSliceDispatchMode(void *cmd, bool enable) {
}
} // namespace NEO

2
shared/source/os_interface/CMakeLists.txt
View File

@ -26,7 +26,7 @@ set(NEO_CORE_OS_INTERFACE
${CMAKE_CURRENT_SOURCE_DIR}/product_helper.cpp
${CMAKE_CURRENT_SOURCE_DIR}/product_helper.h
${CMAKE_CURRENT_SOURCE_DIR}/product_helper.inl
${CMAKE_CURRENT_SOURCE_DIR}/product_helper_bdw_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/product_helper_tgllp_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/product_helper_xe_hpc_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/product_helper_xe2_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/metrics_library.cpp

2
shared/source/os_interface/product_helper_bdw_and_later.inl → shared/source/os_interface/product_helper_tgllp_and_later.inl
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2024 Intel Corporation
* Copyright (C) 2019-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*