Remove needless partition offset register reconfiguration
Related-To: NEO-6262 Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
This commit is contained in:
parent
c4f1b16239
commit
631933e374
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@ -108,12 +108,7 @@ void programEventL3Flush(ze_event_handle_t hEvent,
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auto &cmdListStream = *commandContainer.getCommandStream();
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NEO::PipeControlArgs args;
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args.dcFlushEnable = true;
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if (partitionCount > 1) {
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args.workloadPartitionOffset = true;
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NEO::ImplicitScalingDispatch<GfxFamily>::dispatchOffsetRegister(cmdListStream,
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static_cast<uint32_t>(event->getSinglePacketSize()));
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}
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args.workloadPartitionOffset = partitionCount > 1;
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NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControlAndProgramPostSyncOperation(
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cmdListStream,
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@ -122,11 +117,6 @@ void programEventL3Flush(ze_event_handle_t hEvent,
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Event::STATE_SIGNALED,
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commandContainer.getDevice()->getHardwareInfo(),
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args);
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if (partitionCount > 1) {
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NEO::ImplicitScalingDispatch<GfxFamily>::dispatchOffsetRegister(cmdListStream,
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NEO::ImplicitScalingDispatch<GfxFamily>::getPostSyncOffset());
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}
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}
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template <GFXCORE_FAMILY gfxCoreFamily>
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@ -252,9 +242,6 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendLaunchKernelWithParams(z
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}
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if (L3FlushEnable) {
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size_t estimatedSize = NEO::MemorySynchronizationCommands<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(neoDevice->getHardwareInfo());
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if (partitionCount > 1) {
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estimatedSize += 2 * NEO::ImplicitScalingDispatch<GfxFamily>::getOffsetRegisterSize();
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}
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increaseCommandStreamSpace(estimatedSize);
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programEventL3Flush<gfxCoreFamily>(hEvent, this->device, partitionCount, commandContainer);
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}
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@ -14,6 +14,7 @@
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#include "test.h"
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#include "level_zero/core/test/unit_tests/fixtures/cmdlist_fixture.h"
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#include "level_zero/core/test/unit_tests/fixtures/device_fixture.h"
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#include "level_zero/core/test/unit_tests/fixtures/module_fixture.h"
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#include "level_zero/core/test/unit_tests/mocks/mock_cmdlist.h"
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@ -143,8 +144,9 @@ HWTEST2_F(CommandListAppendLaunchKernelWithAtomics, givenKernelWithGlobalAtomics
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EXPECT_FALSE(pCommandList->commandContainer.lastSentUseGlobalAtomics);
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}
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using CommandListAppendLaunchKernelL3Flush = Test<ModuleFixture>;
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HWTEST2_F(CommandListAppendLaunchKernelL3Flush, givenKernelWithRegularEventAndWithWalkerPartitionThenProperCommandsEncoded, IsXeHpCore) {
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using MultTileCommandListAppendLaunchKernelL3Flush = Test<MultiTileCommandListFixture<false, false>>;
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HWTEST2_F(MultTileCommandListAppendLaunchKernelL3Flush, givenKernelWithRegularEventAndWithWalkerPartitionThenProperCommandsEncoded, IsXeHpCore) {
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using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
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using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
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using POST_SYNC_OPERATION = typename PIPE_CONTROL::POST_SYNC_OPERATION;
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@ -181,9 +183,9 @@ HWTEST2_F(CommandListAppendLaunchKernelL3Flush, givenKernelWithRegularEventAndWi
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ASSERT_TRUE(FamilyType::PARSE::parseCommandBuffer(
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cmdList, ptrOffset(pCommandList->commandContainer.getCommandStream()->getCpuBase(), 0), pCommandList->commandContainer.getCommandStream()->getUsed()));
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EXPECT_LT(1u, pCommandList->partitionCount);
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EXPECT_EQ(2u, pCommandList->partitionCount);
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auto itorLri = find<MI_LOAD_REGISTER_IMM *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorLri);
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EXPECT_EQ(cmdList.end(), itorLri);
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auto itorPC = findAll<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(0u, itorPC.size());
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uint32_t postSyncCount = 0u;
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@ -196,13 +198,11 @@ HWTEST2_F(CommandListAppendLaunchKernelL3Flush, givenKernelWithRegularEventAndWi
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ASSERT_LE(1u, postSyncCount);
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}
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HWTEST2_F(CommandListAppendLaunchKernelL3Flush, givenKernelWithTimestampEventAndWithWalkerPartitionThenProperCommandsEncoded, IsXeHpCore) {
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HWTEST2_F(MultTileCommandListAppendLaunchKernelL3Flush, givenKernelWithTimestampEventAndWithWalkerPartitionThenProperCommandsEncoded, IsXeHpCore) {
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using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
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using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
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using POST_SYNC_OPERATION = typename PIPE_CONTROL::POST_SYNC_OPERATION;
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DebugManagerStateRestore restorer;
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DebugManager.flags.EnableWalkerPartition.set(1);
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Mock<::L0::Kernel> kernel;
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auto pMockModule = std::unique_ptr<Module>(new Mock<Module>(device, nullptr));
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kernel.module = pMockModule.get();
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@ -233,9 +233,9 @@ HWTEST2_F(CommandListAppendLaunchKernelL3Flush, givenKernelWithTimestampEventAnd
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ASSERT_TRUE(FamilyType::PARSE::parseCommandBuffer(
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cmdList, ptrOffset(pCommandList->commandContainer.getCommandStream()->getCpuBase(), 0), pCommandList->commandContainer.getCommandStream()->getUsed()));
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EXPECT_LT(1u, pCommandList->partitionCount);
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EXPECT_EQ(2u, pCommandList->partitionCount);
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auto itorLri = findAll<MI_LOAD_REGISTER_IMM *>(cmdList.begin(), cmdList.end());
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ASSERT_LE(2u, itorLri.size());
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EXPECT_EQ(0u, itorLri.size());
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auto itorPC = findAll<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(0u, itorPC.size());
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uint32_t postSyncCount = 0u;
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@ -248,11 +248,10 @@ HWTEST2_F(CommandListAppendLaunchKernelL3Flush, givenKernelWithTimestampEventAnd
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ASSERT_LE(1u, postSyncCount);
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}
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using CommandListAppendLaunchKernelL3Flush = Test<ModuleFixture>;
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HWTEST2_F(CommandListAppendLaunchKernelL3Flush, givenKernelWithEventAndWithoutWalkerPartitionThenProperCommandsEncoded, IsXeHpCore) {
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using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
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DebugManagerStateRestore restorer;
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DebugManager.flags.EnableWalkerPartition.set(0);
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Mock<::L0::Kernel> kernel;
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auto pMockModule = std::unique_ptr<Module>(new Mock<Module>(device, nullptr));
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kernel.module = pMockModule.get();
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