mirror of
https://github.com/intel/compute-runtime.git
synced 2025-09-15 13:01:45 +08:00
Explicitly set dcFlushEnable value
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
This commit is contained in:

committed by
Compute-Runtime-Automation

parent
2efcf1f62b
commit
6d439f88bb
@ -81,7 +81,8 @@ class BuiltInOp<EBuiltInOps::AuxTranslation> : public BuiltinDispatchInfoBuilder
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DispatchInfo::EstimateCommandsMethodT>;
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template <typename GfxFamily, bool dcFlush>
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static void dispatchPipeControl(LinearStream &linearStream, TimestampPacketDependencies *, const HardwareInfo &) {
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PipeControlArgs args(dcFlush);
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PipeControlArgs args;
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args.dcFlushEnable = MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(dcFlush);
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MemorySynchronizationCommands<GfxFamily>::addPipeControl(linearStream, args);
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}
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@ -530,7 +530,8 @@ BlitProperties CommandQueueHw<GfxFamily>::processDispatchForBlitEnqueue(CommandS
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if (commandStream) {
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if (timestampPacketDependencies.cacheFlushNodes.peekNodes().size() > 0) {
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auto cacheFlushTimestampPacketGpuAddress = TimestampPacketHelper::getContextEndGpuAddress(*timestampPacketDependencies.cacheFlushNodes.peekNodes()[0]);
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PipeControlArgs args(true);
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PipeControlArgs args;
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args.dcFlushEnable = MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
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MemorySynchronizationCommands<GfxFamily>::addPipeControlAndProgramPostSyncOperation(
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*commandStream,
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GfxFamily::PIPE_CONTROL::POST_SYNC_OPERATION::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
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@ -100,7 +100,7 @@ void GpgpuWalkerHelper<GfxFamily>::dispatchScheduler(
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// Do not put BB_START only when returning in first Scheduler run
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if (devQueueHw.getSchedulerReturnInstance() != 1) {
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args.dcFlushEnable = true;
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args.dcFlushEnable = MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
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MemorySynchronizationCommands<GfxFamily>::addPipeControl(commandStream, args);
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// Add BB Start Cmd to the SLB in the Primary Batch Buffer
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@ -102,7 +102,7 @@ void GpgpuWalkerHelper<GfxFamily>::setupTimestampPacket(LinearStream *cmdStream,
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auto gmmHelper = rootDeviceEnvironment.getGmmHelper();
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if (MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
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if (MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true)) {
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postSyncData.setMocs(gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED));
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} else {
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postSyncData.setMocs(gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER));
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@ -307,7 +307,8 @@ inline void HardwareInterface<GfxFamily>::dispatchDebugPauseCommands(
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using PIPE_CONTROL = typename GfxFamily::PIPE_CONTROL;
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using POST_SYNC_OPERATION = typename PIPE_CONTROL::POST_SYNC_OPERATION;
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PipeControlArgs args(true);
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PipeControlArgs args;
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args.dcFlushEnable = MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
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MemorySynchronizationCommands<GfxFamily>::addPipeControlAndProgramPostSyncOperation(
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*commandStream,
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POST_SYNC_OPERATION::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
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@ -164,7 +164,8 @@ void HardwareCommandsHelper<GfxFamily>::setInterfaceDescriptorOffset(
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template <typename GfxFamily>
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void HardwareCommandsHelper<GfxFamily>::programCacheFlushAfterWalkerCommand(LinearStream *commandStream, const CommandQueue &commandQueue, const Kernel *kernel, uint64_t postSyncAddress) {
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PipeControlArgs args(true);
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PipeControlArgs args;
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args.dcFlushEnable = MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
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MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandStream, args);
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}
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@ -1367,7 +1367,7 @@ HWTEST_P(DispatchWalkerTestForAuxTranslation, givenKernelWhenAuxToNonAuxWhenTran
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ASSERT_EQ(2u, pipeControls.size());
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auto beginPipeControl = genCmdCast<typename FamilyType::PIPE_CONTROL *>(*(pipeControls[0]));
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), beginPipeControl->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), beginPipeControl->getDcFlushEnable());
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EXPECT_TRUE(beginPipeControl->getCommandStreamerStallEnable());
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auto endPipeControl = genCmdCast<typename FamilyType::PIPE_CONTROL *>(*(pipeControls[1]));
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@ -1423,7 +1423,7 @@ HWTEST_P(DispatchWalkerTestForAuxTranslation, givenKernelWhenNonAuxToAuxWhenTran
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bool dcFlushRequired = (pClDevice->getHardwareInfo().platform.eRenderCoreFamily == IGFX_GEN8_CORE);
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auto beginPipeControl = genCmdCast<typename FamilyType::PIPE_CONTROL *>(*(pipeControls[0]));
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), beginPipeControl->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), beginPipeControl->getDcFlushEnable());
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EXPECT_TRUE(beginPipeControl->getCommandStreamerStallEnable());
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auto endPipeControl = genCmdCast<typename FamilyType::PIPE_CONTROL *>(*(pipeControls[1]));
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@ -147,7 +147,7 @@ HWTEST2_F(Dg2AndLaterDispatchWalkerBasicTest, givenTimestampPacketWhenDispatchin
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auto gmmHelper = device->getGmmHelper();
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auto expectedMocs = MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed() ? gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED) : gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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auto expectedMocs = MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true) ? gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED) : gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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auto walker = genCmdCast<COMPUTE_WALKER *>(*hwParser.itorWalker);
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EXPECT_EQ(FamilyType::POSTSYNC_DATA::OPERATION::OPERATION_WRITE_TIMESTAMP, walker->getPostSync().getOperation());
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@ -190,7 +190,7 @@ HWTEST2_F(Dg2AndLaterDispatchWalkerBasicTest, givenDebugVariableEnabledWhenEnque
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auto walker = genCmdCast<COMPUTE_WALKER *>(*hwParser.itorWalker);
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auto gmmHelper = device->getGmmHelper();
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auto expectedMocs = MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed() ? gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED) : gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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auto expectedMocs = MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true) ? gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED) : gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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auto &postSyncData = walker->getPostSync();
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EXPECT_EQ(FamilyType::POSTSYNC_DATA::OPERATION::OPERATION_WRITE_TIMESTAMP,
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@ -451,7 +451,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHPAndLaterDispatchWalkerBasicTest, givenTimestamp
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EXPECT_NE(hwParser.itorWalker, hwParser.cmdList.end());
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auto gmmHelper = device->getGmmHelper();
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auto expectedMocs = MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed() ? gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED) : gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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auto expectedMocs = MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true) ? gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED) : gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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auto walker = genCmdCast<COMPUTE_WALKER *>(*hwParser.itorWalker);
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EXPECT_EQ(FamilyType::POSTSYNC_DATA::OPERATION::OPERATION_WRITE_TIMESTAMP, walker->getPostSync().getOperation());
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@ -491,7 +491,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHPAndLaterDispatchWalkerBasicTest, givenDebugVari
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auto walker = genCmdCast<COMPUTE_WALKER *>(*hwParser.itorWalker);
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auto gmmHelper = device->getGmmHelper();
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auto expectedMocs = MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed() ? gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED) : gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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auto expectedMocs = MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true) ? gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED) : gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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auto &postSyncData = walker->getPostSync();
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EXPECT_EQ(FamilyType::POSTSYNC_DATA::OPERATION::OPERATION_WRITE_TIMESTAMP,
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@ -1540,7 +1540,7 @@ struct PauseOnGpuTests : public EnqueueKernelTest {
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EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControlCmd->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pipeControlCmd->getDcFlushEnable());
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EXPECT_EQ(PIPE_CONTROL::POST_SYNC_OPERATION::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA, pipeControlCmd->getPostSyncOperation());
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@ -579,7 +579,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenStateBaseAddressWhenItIsRequi
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EXPECT_NE(stateBaseAddressItor, pipeControlItor);
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auto pipeControlCmd = (typename FamilyType::PIPE_CONTROL *)*pipeControlItor;
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EXPECT_TRUE(pipeControlCmd->getTextureCacheInvalidationEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControlCmd->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pipeControlCmd->getDcFlushEnable());
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, givenNotApplicableL3ConfigWhenFlushingTaskThenDontReloadSba) {
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@ -1242,11 +1242,11 @@ HWCMDTEST_F(IGFX_GEN8_CORE, CommandStreamReceiverFlushTaskTests, GivenBlockingWh
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// Verify that the dcFlushEnabled bit is not set in PC
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auto pCmd = reinterpret_cast<PIPE_CONTROL *>(pipeControlTask);
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pCmd->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pCmd->getDcFlushEnable());
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}
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} else {
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auto pCmd = reinterpret_cast<PIPE_CONTROL *>(*itorPC);
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pCmd->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pCmd->getDcFlushEnable());
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}
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}
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@ -1290,7 +1290,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenBlockedKernelRequiringDCFlush
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// Verify that the dcFlushEnabled bit is set in PC
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auto pCmdWA = reinterpret_cast<PIPE_CONTROL *>(*itorPC);
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pCmdWA->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pCmdWA->getDcFlushEnable());
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buffer->release();
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}
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@ -75,7 +75,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenBlockedKernelNotRequiringDCFl
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// Verify that the dcFlushEnabled bit is set in PC
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auto pCmdWA = reinterpret_cast<PIPE_CONTROL *>(*itorPC);
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pCmdWA->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pCmdWA->getDcFlushEnable());
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buffer->release();
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}
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@ -366,10 +366,10 @@ HWCMDTEST_F(IGFX_GEN8_CORE, CommandStreamReceiverFlushTaskTests,
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EXPECT_NE(cmdList.end(), itorCmdP);
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auto itorCmd2 = find<PIPE_CONTROL *>(itorCmdP, cmdList.end());
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cmdPC = (PIPE_CONTROL *)*itorCmd2;
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), cmdPC->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), cmdPC->getDcFlushEnable());
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} else {
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// single PIPE_CONTROL following GPGPU_WALKER has DcFlush and Write HwTag
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), cmdPC->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), cmdPC->getDcFlushEnable());
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}
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retVal = clReleaseEvent(event);
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@ -971,7 +971,8 @@ HWTEST_F(UltCommandStreamReceiverTest, givenDebugDisablingCacheFlushWhenAddingPi
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char buff[sizeof(PIPE_CONTROL) * 3];
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LinearStream stream(buff, sizeof(PIPE_CONTROL) * 3);
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PipeControlArgs args(true);
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PipeControlArgs args;
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args.dcFlushEnable = true;
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args.constantCacheInvalidationEnable = true;
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args.instructionCacheInvalidateEnable = true;
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args.pipeControlFlushEnable = true;
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@ -983,7 +983,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInBatchingModeWhenCommandA
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auto pipeControl = genCmdCast<typename FamilyType::PIPE_CONTROL *>(*itorPipeControl);
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mockCsr->flushBatchedSubmissions();
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControl->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pipeControl->getDcFlushEnable());
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInBatchingModeWithOutOfOrderModeFisabledWhenCommandAreSubmittedThenDcFlushIsAdded) {
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@ -1015,7 +1015,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInBatchingModeWithOutOfOrd
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auto pipeControl = genCmdCast<typename FamilyType::PIPE_CONTROL *>(*itorPipeControl);
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mockCsr->flushBatchedSubmissions();
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControl->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pipeControl->getDcFlushEnable());
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, givenUpdateTaskCountFromWaitSetWhenFlushTaskThenThereIsNoPipeControlForUpdateTaskCount) {
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@ -1173,7 +1173,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenEpiloguePipeControlThenDcFlus
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auto pipeControl = genCmdCast<PIPE_CONTROL *>(cmdBuffer->epiloguePipeControlLocation);
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ASSERT_NE(nullptr, pipeControl);
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mockCsr->flushBatchedSubmissions();
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControl->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pipeControl->getDcFlushEnable());
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, givenEpiloguePipeControlWhendDcFlushDisabledByDebugFlagThenDcFlushIsDisabled) {
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@ -1774,12 +1774,13 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenDcFlushArgumentIsTrueWhenCall
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std::unique_ptr<uint8_t> buffer(new uint8_t[128]);
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LinearStream commandStream(buffer.get(), 128);
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PipeControlArgs args(true);
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PipeControlArgs args;
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args.dcFlushEnable = true;
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MemorySynchronizationCommands<FamilyType>::addPipeControl(commandStream, args);
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PIPE_CONTROL *pipeControl = genCmdCast<PIPE_CONTROL *>(buffer.get());
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ASSERT_NE(nullptr, pipeControl);
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControl->getDcFlushEnable());
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EXPECT_TRUE(pipeControl->getDcFlushEnable());
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EXPECT_TRUE(pipeControl->getCommandStreamerStallEnable());
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}
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@ -91,7 +91,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi
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EXPECT_NE(stateBaseAddressItor, pipeControlItor);
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auto pipeControlCmd = reinterpret_cast<typename FamilyType::PIPE_CONTROL *>(*pipeControlItor);
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EXPECT_TRUE(pipeControlCmd->getTextureCacheInvalidationEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControlCmd->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pipeControlCmd->getDcFlushEnable());
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EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
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}
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@ -108,7 +108,8 @@ GEN12LPTEST_F(UltCommandStreamReceiverTestGen12Lp, givenDebugDisablingCacheFlush
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char buff[sizeof(PIPE_CONTROL) * 3];
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LinearStream stream(buff, sizeof(PIPE_CONTROL) * 3);
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PipeControlArgs args(true);
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PipeControlArgs args;
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args.dcFlushEnable = true;
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args.hdcPipelineFlush = true;
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MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
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@ -289,7 +289,7 @@ HWTEST_F(PipeControlHelperTests, givenPostSyncWriteTimestampModeWhenHelperIsUsed
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}
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HWTEST_F(PipeControlHelperTests, givenHwHelperwhenAskingForDcFlushThenReturnTrue) {
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EXPECT_TRUE(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed());
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EXPECT_TRUE(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true));
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}
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HWTEST_F(PipeControlHelperTests, givenDcFlushNotAllowedWhenProgrammingPipeControlThenDontSetDcFlush) {
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@ -306,7 +306,7 @@ HWTEST_F(PipeControlHelperTests, givenDcFlushNotAllowedWhenProgrammingPipeContro
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auto pipeControl = genCmdCast<PIPE_CONTROL *>(stream.getCpuBase());
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ASSERT_NE(nullptr, pipeControl);
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControl->getDcFlushEnable());
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EXPECT_TRUE(pipeControl->getDcFlushEnable());
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}
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HWTEST_F(PipeControlHelperTests, givenPostSyncWriteImmediateDataModeWhenHelperIsUsedThenProperFieldsAreProgrammed) {
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@ -1074,7 +1074,7 @@ HWTEST_F(PipeControlHelperTests, WhenProgrammingCacheFlushThenExpectBasicFieldsS
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ASSERT_NE(nullptr, pipeControl);
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EXPECT_TRUE(pipeControl->getCommandStreamerStallEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControl->getDcFlushEnable());
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EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pipeControl->getDcFlushEnable());
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EXPECT_TRUE(pipeControl->getRenderTargetCacheFlushEnable());
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EXPECT_TRUE(pipeControl->getInstructionCacheInvalidateEnable());
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@ -74,7 +74,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, WhenSettingExtraPipeControlProperti
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HardwareInfo hardwareInfo = *defaultHwInfo;
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hardwareInfo.featureTable.flags.ftrLocalMemory = ftrLocalMemory;
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PipeControlArgs args{};
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PipeControlArgs args;
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MemorySynchronizationCommands<FamilyType>::setPostSyncExtraProperties(args, hardwareInfo);
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if (ftrLocalMemory) {
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@ -282,7 +282,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, WhenSettingExtr
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HardwareInfo hardwareInfo = *defaultHwInfo;
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hardwareInfo.featureTable.flags.ftrLocalMemory = ftrLocalMemory;
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PipeControlArgs args{};
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PipeControlArgs args;
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MemorySynchronizationCommands<FamilyType>::setPostSyncExtraProperties(args, hardwareInfo);
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if (ftrLocalMemory) {
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@ -579,7 +579,7 @@ void BcsBufferTests::waitForCacheFlushFromBcsTest(MockCommandQueueHw<FamilyType>
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auto pipeControlCmd = genCmdCast<PIPE_CONTROL *>(*pipeControl);
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cacheFlushWriteAddress = NEO::UnitTestHelper<FamilyType>::getPipeControlPostSyncAddress(*pipeControlCmd);
|
||||
if (cacheFlushWriteAddress != 0) {
|
||||
EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControlCmd->getDcFlushEnable());
|
||||
EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pipeControlCmd->getDcFlushEnable());
|
||||
EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable());
|
||||
EXPECT_EQ(isCacheFlushForBcsRequired, 0u == pipeControlCmd->getImmediateData());
|
||||
break;
|
||||
@ -693,7 +693,7 @@ HWTEST_TEMPLATED_F(BcsBufferTests, givenBarrierWhenReleasingMultipleBlockedEnque
|
||||
|
||||
stallingPipeControlFound = true;
|
||||
EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable());
|
||||
EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(), pipeControlCmd->getDcFlushEnable());
|
||||
EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true), pipeControlCmd->getDcFlushEnable());
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -32,7 +32,7 @@ XE_HPC_CORETEST_F(HwHelperTestsXeHpcCore, givenPvcThenAuxTranslationIsNotRequire
|
||||
}
|
||||
|
||||
XE_HPC_CORETEST_F(HwHelperTestsXeHpcCore, givenHwHelperwhenAskingForDcFlushThenReturnFalse) {
|
||||
EXPECT_FALSE(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed());
|
||||
EXPECT_FALSE(MemorySynchronizationCommands<FamilyType>::isDcFlushAllowed(true));
|
||||
}
|
||||
|
||||
XE_HPC_CORETEST_F(HwHelperTestsXeHpcCore, givenCommandBufferAllocationTypeWhenGetAllocationDataIsCalledThenSystemMemoryIsRequested) {
|
||||
|
Reference in New Issue
Block a user