Update GEN12LP commands 2/n
- MI_ARB_CHECK - MI_ATOMIC - MI_BATCH_BUFFER_END - MI_BATCH_BUFFER_START Related-To: NEO-3861 Change-Id: I6ce9788302f0c79bea3314703f33086c443757f7 Signed-off-by: Gibala Krzysztof <krzysztof.gibala@intel.com>
This commit is contained in:
parent
4a74bda894
commit
7df55ba061
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@ -811,7 +811,8 @@ STATIC_ASSERT(36 == sizeof(MEDIA_VFE_STATE));
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typedef struct tagMI_ARB_CHECK {
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union tagTheStructure {
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struct tagCommon {
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uint32_t Pre_FetchDisable : BITFIELD_RANGE(0, 0);
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// DWORD 0
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uint32_t PreParserDisable : BITFIELD_RANGE(0, 0);
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uint32_t Reserved_1 : BITFIELD_RANGE(1, 7);
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uint32_t MaskBits : BITFIELD_RANGE(8, 15);
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uint32_t Reserved_16 : BITFIELD_RANGE(16, 22);
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@ -837,17 +838,17 @@ typedef struct tagMI_ARB_CHECK {
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return state;
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}
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inline uint32_t &getRawData(const uint32_t index) {
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DEBUG_BREAK_IF(index >= 1);
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UNRECOVERABLE_IF(index >= 1);
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return TheStructure.RawData[index];
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}
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inline void setPreFetchDisable(const uint32_t value) {
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TheStructure.Common.Pre_FetchDisable = value;
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inline void setPreParserDisable(const bool value) {
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TheStructure.Common.PreParserDisable = value;
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}
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inline uint32_t getPreFetchDisable(void) const {
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return TheStructure.Common.Pre_FetchDisable;
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inline bool getPreParserDisable(void) const {
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return TheStructure.Common.PreParserDisable;
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}
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inline void setMaskBits(const uint32_t value) {
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DEBUG_BREAK_IF(value > 0xff00);
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UNRECOVERABLE_IF(value > 0xff);
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TheStructure.Common.MaskBits = value;
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}
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inline uint32_t getMaskBits(void) const {
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@ -859,27 +860,38 @@ STATIC_ASSERT(4 == sizeof(MI_ARB_CHECK));
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typedef struct tagMI_ATOMIC {
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union tagTheStructure {
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struct tagCommon {
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// DWORD 0
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uint32_t DwordLength : BITFIELD_RANGE(0, 7);
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uint32_t AtomicOpcode : BITFIELD_RANGE(8, 15);
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uint32_t ReturnDataControl : BITFIELD_RANGE(16, 16);
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uint32_t CsStall : BITFIELD_RANGE(17, 17);
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uint32_t InlineData : BITFIELD_RANGE(18, 18);
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uint32_t DataSize : BITFIELD_RANGE(19, 20);
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uint32_t Post_SyncOperation : BITFIELD_RANGE(21, 21);
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uint32_t PostSyncOperation : BITFIELD_RANGE(21, 21);
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uint32_t MemoryType : BITFIELD_RANGE(22, 22);
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uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28);
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uint32_t CommandType : BITFIELD_RANGE(29, 31);
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// DWORD 1
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uint32_t Reserved_32 : BITFIELD_RANGE(0, 1);
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uint32_t MemoryAddress : BITFIELD_RANGE(2, 31);
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// DWORD 2
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uint32_t MemoryAddressHigh : BITFIELD_RANGE(0, 15);
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uint32_t Reserved_80 : BITFIELD_RANGE(16, 31);
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// DWORD 3
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uint32_t Operand1DataDword0;
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// DWORD 4
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uint32_t Operand2DataDword0;
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// DWORD 5
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uint32_t Operand1DataDword1;
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// DWORD 6
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uint32_t Operand2DataDword1;
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// DWORD 7
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uint32_t Operand1DataDword2;
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// DWORD 8
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uint32_t Operand2DataDword2;
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// DWORD 9
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uint32_t Operand1DataDword3;
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// DWORD 10
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uint32_t Operand2DataDword3;
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} Common;
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uint32_t RawData[11];
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@ -916,8 +928,7 @@ typedef struct tagMI_ATOMIC {
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memset(&TheStructure, 0, sizeof(TheStructure));
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TheStructure.Common.DwordLength = DWORD_LENGTH_INLINE_DATA_0;
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TheStructure.Common.DataSize = DATA_SIZE_DWORD;
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TheStructure.Common.Post_SyncOperation =
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POST_SYNC_OPERATION_NO_POST_SYNC_OPERATION;
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TheStructure.Common.PostSyncOperation = POST_SYNC_OPERATION_NO_POST_SYNC_OPERATION;
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TheStructure.Common.MemoryType = MEMORY_TYPE_PER_PROCESS_GRAPHICS_ADDRESS;
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TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_ATOMIC;
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TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND;
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@ -928,7 +939,7 @@ typedef struct tagMI_ATOMIC {
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return state;
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}
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inline uint32_t &getRawData(const uint32_t index) {
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DEBUG_BREAK_IF(index >= 11);
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UNRECOVERABLE_IF(index >= 11);
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return TheStructure.RawData[index];
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}
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inline void setDwordLength(const DWORD_LENGTH value) {
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@ -938,26 +949,28 @@ typedef struct tagMI_ATOMIC {
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return static_cast<DWORD_LENGTH>(TheStructure.Common.DwordLength);
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}
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inline void setAtomicOpcode(const uint32_t value) {
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DEBUG_BREAK_IF(value > 0xff00);
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UNRECOVERABLE_IF(value > 0xff);
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TheStructure.Common.AtomicOpcode = value;
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}
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inline uint32_t getAtomicOpcode(void) const {
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return TheStructure.Common.AtomicOpcode;
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}
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inline void setReturnDataControl(const uint32_t value) {
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inline void setReturnDataControl(const bool value) {
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TheStructure.Common.ReturnDataControl = value;
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}
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inline uint32_t getReturnDataControl(void) const {
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inline bool getReturnDataControl(void) const {
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return TheStructure.Common.ReturnDataControl;
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}
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inline void setCsStall(const uint32_t value) {
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inline void setCsStall(const bool value) {
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TheStructure.Common.CsStall = value;
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}
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inline uint32_t getCsStall(void) const { return TheStructure.Common.CsStall; }
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inline void setInlineData(const uint32_t value) {
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inline bool getCsStall(void) const {
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return TheStructure.Common.CsStall;
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}
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inline void setInlineData(const bool value) {
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TheStructure.Common.InlineData = value;
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}
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inline uint32_t getInlineData(void) const {
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inline bool getInlineData(void) const {
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return TheStructure.Common.InlineData;
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}
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inline void setDataSize(const DATA_SIZE value) {
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@ -967,11 +980,10 @@ typedef struct tagMI_ATOMIC {
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return static_cast<DATA_SIZE>(TheStructure.Common.DataSize);
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}
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inline void setPostSyncOperation(const POST_SYNC_OPERATION value) {
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TheStructure.Common.Post_SyncOperation = value;
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TheStructure.Common.PostSyncOperation = value;
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}
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inline POST_SYNC_OPERATION getPostSyncOperation(void) const {
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return static_cast<POST_SYNC_OPERATION>(
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TheStructure.Common.Post_SyncOperation);
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return static_cast<POST_SYNC_OPERATION>(TheStructure.Common.PostSyncOperation);
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}
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inline void setMemoryType(const MEMORY_TYPE value) {
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TheStructure.Common.MemoryType = value;
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@ -984,13 +996,14 @@ typedef struct tagMI_ATOMIC {
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MEMORYADDRESS_ALIGN_SIZE = 0x4,
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} MEMORYADDRESS;
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inline void setMemoryAddress(const uint32_t value) {
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DEBUG_BREAK_IF(value > 0xfffffffcL);
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UNRECOVERABLE_IF(value > 0xffffffff);
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TheStructure.Common.MemoryAddress = value >> MEMORYADDRESS_BIT_SHIFT;
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}
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inline uint32_t getMemoryAddress(void) const {
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return TheStructure.Common.MemoryAddress << MEMORYADDRESS_BIT_SHIFT;
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}
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inline void setMemoryAddressHigh(const uint32_t value) {
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UNRECOVERABLE_IF(value > 0xffff);
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TheStructure.Common.MemoryAddressHigh = value;
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}
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inline uint32_t getMemoryAddressHigh(void) const {
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@ -1050,6 +1063,7 @@ STATIC_ASSERT(44 == sizeof(MI_ATOMIC));
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typedef struct tagMI_BATCH_BUFFER_END {
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union tagTheStructure {
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struct tagCommon {
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// DWORD 0
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uint32_t EndContext : BITFIELD_RANGE(0, 0);
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uint32_t Reserved_1 : BITFIELD_RANGE(1, 22);
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uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28);
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@ -1074,14 +1088,14 @@ typedef struct tagMI_BATCH_BUFFER_END {
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return state;
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}
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inline uint32_t &getRawData(const uint32_t index) {
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DEBUG_BREAK_IF(index >= 1);
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UNRECOVERABLE_IF(index >= 1);
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return TheStructure.RawData[index];
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}
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inline void setEndContext(const bool value) {
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TheStructure.Common.EndContext = value;
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}
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inline bool getEndContext(void) const {
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return (TheStructure.Common.EndContext);
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return TheStructure.Common.EndContext;
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}
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} MI_BATCH_BUFFER_END;
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STATIC_ASSERT(4 == sizeof(MI_BATCH_BUFFER_END));
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@ -1089,37 +1103,37 @@ STATIC_ASSERT(4 == sizeof(MI_BATCH_BUFFER_END));
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typedef struct tagMI_BATCH_BUFFER_START {
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union tagTheStructure {
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struct tagCommon {
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// DWORD 0
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uint32_t DwordLength : BITFIELD_RANGE(0, 7);
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uint32_t AddressSpaceIndicator : BITFIELD_RANGE(8, 8);
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uint32_t Reserved_9 : BITFIELD_RANGE(9, 9);
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uint32_t ResourceStreamerEnable : BITFIELD_RANGE(10, 10);
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uint32_t Reserved_11 : BITFIELD_RANGE(11, 14);
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uint32_t Reserved_9 : BITFIELD_RANGE(9, 14);
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uint32_t PredicationEnable : BITFIELD_RANGE(15, 15);
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uint32_t AddOffsetEnable : BITFIELD_RANGE(16, 16);
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uint32_t Reserved_17 : BITFIELD_RANGE(17, 18);
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uint32_t Reserved_16 : BITFIELD_RANGE(16, 18);
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uint32_t EnableCommandCache : BITFIELD_RANGE(19, 19);
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uint32_t PoshEnable : BITFIELD_RANGE(20, 20);
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uint32_t PoshStart : BITFIELD_RANGE(21, 21);
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uint32_t SecondLevelBatchBuffer : BITFIELD_RANGE(22, 22);
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uint32_t Reserved_22 : BITFIELD_RANGE(22, 22);
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uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28);
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uint32_t CommandType : BITFIELD_RANGE(29, 31);
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// DWORD 1
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uint64_t Reserved_32 : BITFIELD_RANGE(0, 1);
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uint64_t BatchBufferStartAddress : BITFIELD_RANGE(2, 47);
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uint64_t BatchBufferStartAddress_Reserved_80 : BITFIELD_RANGE(48, 63);
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uint64_t BatchBufferStartAddress : BITFIELD_RANGE(2, 63);
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} Common;
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struct tagMi_Mode_Nestedbatchbufferenableis0 {
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// DWORD 0
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uint32_t Reserved_0 : BITFIELD_RANGE(0, 21);
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uint32_t SecondLevelBatchBuffer : BITFIELD_RANGE(22, 22);
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uint32_t Reserved_23 : BITFIELD_RANGE(23, 31);
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uint64_t Reserved_32 : BITFIELD_RANGE(0, 47);
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uint64_t Reserved_80 : BITFIELD_RANGE(48, 63);
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// DWORD 1
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uint64_t Reserved_32;
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} Mi_Mode_Nestedbatchbufferenableis0;
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struct tagMi_Mode_Nestedbatchbufferenableis1 {
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// DWORD 0
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uint32_t Reserved_0 : BITFIELD_RANGE(0, 21);
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uint32_t NestedLevelBatchBuffer : BITFIELD_RANGE(22, 22);
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uint32_t Reserved_23 : BITFIELD_RANGE(23, 31);
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uint64_t Reserved_32 : BITFIELD_RANGE(0, 47);
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uint64_t Reserved_80 : BITFIELD_RANGE(48, 63);
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// DWORD 1
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uint64_t Reserved_32;
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} Mi_Mode_Nestedbatchbufferenableis1;
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uint32_t RawData[3];
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} TheStructure;
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@ -1148,9 +1162,9 @@ typedef struct tagMI_BATCH_BUFFER_START {
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memset(&TheStructure, 0, sizeof(TheStructure));
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TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1;
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TheStructure.Common.AddressSpaceIndicator = ADDRESS_SPACE_INDICATOR_GGTT;
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TheStructure.Common.SecondLevelBatchBuffer = SECOND_LEVEL_BATCH_BUFFER_FIRST_LEVEL_BATCH;
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TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_BATCH_BUFFER_START;
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TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND;
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TheStructure.Mi_Mode_Nestedbatchbufferenableis0.SecondLevelBatchBuffer = SECOND_LEVEL_BATCH_BUFFER_FIRST_LEVEL_BATCH;
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TheStructure.Mi_Mode_Nestedbatchbufferenableis1.NestedLevelBatchBuffer = NESTED_LEVEL_BATCH_BUFFER_CHAIN;
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}
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static tagMI_BATCH_BUFFER_START sInit(void) {
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@ -1159,7 +1173,7 @@ typedef struct tagMI_BATCH_BUFFER_START {
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return state;
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}
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inline uint32_t &getRawData(const uint32_t index) {
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DEBUG_BREAK_IF(index >= 3);
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UNRECOVERABLE_IF(index >= 3);
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return TheStructure.RawData[index];
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}
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inline void setAddressSpaceIndicator(const ADDRESS_SPACE_INDICATOR value) {
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@ -1168,48 +1182,30 @@ typedef struct tagMI_BATCH_BUFFER_START {
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inline ADDRESS_SPACE_INDICATOR getAddressSpaceIndicator(void) const {
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return static_cast<ADDRESS_SPACE_INDICATOR>(TheStructure.Common.AddressSpaceIndicator);
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}
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inline void setResourceStreamerEnable(const bool value) {
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TheStructure.Common.ResourceStreamerEnable = value;
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}
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inline bool getResourceStreamerEnable(void) const {
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return TheStructure.Common.ResourceStreamerEnable;
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}
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inline void setPredicationEnable(const uint32_t value) {
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inline void setPredicationEnable(const bool value) {
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TheStructure.Common.PredicationEnable = value;
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}
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inline uint32_t getPredicationEnable(void) const {
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inline bool getPredicationEnable(void) const {
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return TheStructure.Common.PredicationEnable;
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}
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inline void setAddOffsetEnable(const bool value) {
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TheStructure.Common.AddOffsetEnable = value;
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}
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inline bool getAddOffsetEnable(void) const {
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return TheStructure.Common.AddOffsetEnable;
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}
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inline void setEnableCommandCache(const uint32_t value) {
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inline void setEnableCommandCache(const bool value) {
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TheStructure.Common.EnableCommandCache = value;
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}
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inline uint32_t getEnableCommandCache(void) const {
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inline bool getEnableCommandCache(void) const {
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return TheStructure.Common.EnableCommandCache;
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}
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inline void setPoshEnable(const uint32_t value) {
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inline void setPoshEnable(const bool value) {
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TheStructure.Common.PoshEnable = value;
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}
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inline uint32_t getPoshEnable(void) const {
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inline bool getPoshEnable(void) const {
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return TheStructure.Common.PoshEnable;
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}
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inline void setPoshStart(const uint32_t value) {
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inline void setPoshStart(const bool value) {
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TheStructure.Common.PoshStart = value;
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}
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inline uint32_t getPoshStart(void) const {
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inline bool getPoshStart(void) const {
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return TheStructure.Common.PoshStart;
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}
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inline void setSecondLevelBatchBuffer(const SECOND_LEVEL_BATCH_BUFFER value) {
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TheStructure.Common.SecondLevelBatchBuffer = value;
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}
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inline SECOND_LEVEL_BATCH_BUFFER getSecondLevelBatchBuffer(void) const {
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return static_cast<SECOND_LEVEL_BATCH_BUFFER>(TheStructure.Common.SecondLevelBatchBuffer);
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}
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typedef enum tagBATCHBUFFERSTARTADDRESS {
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BATCHBUFFERSTARTADDRESS_BIT_SHIFT = 0x2,
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BATCHBUFFERSTARTADDRESS_ALIGN_SIZE = 0x4,
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inline void setBatchBufferStartAddress(const uint64_t value) {
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TheStructure.Common.BatchBufferStartAddress = value >> BATCHBUFFERSTARTADDRESS_BIT_SHIFT;
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}
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inline void setBatchBufferStartAddressGraphicsaddress472(const uint64_t value) {
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TheStructure.Common.BatchBufferStartAddress = value >> BATCHBUFFERSTARTADDRESS_BIT_SHIFT;
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}
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inline uint64_t getBatchBufferStartAddress(void) const {
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return TheStructure.Common.BatchBufferStartAddress << BATCHBUFFERSTARTADDRESS_BIT_SHIFT;
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}
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inline void setBatchBufferStartAddressGraphicsaddress472(const uint64_t value) {
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TheStructure.Common.BatchBufferStartAddress = value >> BATCHBUFFERSTARTADDRESS_BIT_SHIFT;
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}
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inline uint64_t getBatchBufferStartAddressGraphicsaddress472(void) const {
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return TheStructure.Common.BatchBufferStartAddress << BATCHBUFFERSTARTADDRESS_BIT_SHIFT;
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}
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inline void setSecondLevelBatchBuffer(const SECOND_LEVEL_BATCH_BUFFER value) {
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TheStructure.Mi_Mode_Nestedbatchbufferenableis0.SecondLevelBatchBuffer = value;
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}
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inline SECOND_LEVEL_BATCH_BUFFER getSecondLevelBatchBuffer(void) const {
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return static_cast<SECOND_LEVEL_BATCH_BUFFER>(TheStructure.Mi_Mode_Nestedbatchbufferenableis0.SecondLevelBatchBuffer);
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}
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inline void setNestedLevelBatchBuffer(const NESTED_LEVEL_BATCH_BUFFER value) {
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TheStructure.Mi_Mode_Nestedbatchbufferenableis1.NestedLevelBatchBuffer = value;
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}
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}
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} MI_BATCH_BUFFER_START;
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STATIC_ASSERT(12 == sizeof(MI_BATCH_BUFFER_START));
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typedef struct tagMI_LOAD_REGISTER_IMM {
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union tagTheStructure {
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struct tagCommon {
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