Unify programming of partition registers

Related-To: NEO-6262


Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>

level_zero/core/source/cmdlist/cmdlist_hw_xehp_and_later.inl

@@ -105,26 +105,27 @@ void programEventL3Flush(ze_event_handle_t hEvent,
         event->setPacketsInUse(event->getPacketsInUse() + 1);
     }
 
+    auto &cmdListStream = *commandContainer.getCommandStream();
     NEO::PipeControlArgs args;
     args.dcFlushEnable = true;
+
     if (partitionCount > 1) {
         args.workloadPartitionOffset = true;
-        NEO::EncodeSetMMIO<GfxFamily>::encodeIMM(*commandContainer.getCommandStream(),
+        NEO::ImplicitScalingDispatch<GfxFamily>::dispatchOffsetRegister(cmdListStream,
-                                                 NEO::PartitionRegisters<GfxFamily>::addressOffsetCCSOffset,
+                                                                        static_cast<uint32_t>(event->getSinglePacketSize()));
-                                                 static_cast<uint32_t>(event->getSinglePacketSize()),
-                                                 true);
     }
+
     NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControlAndProgramPostSyncOperation(
-        *commandContainer.getCommandStream(), POST_SYNC_OPERATION::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
+        cmdListStream,
-        eventAddress, Event::STATE_SIGNALED,
+        POST_SYNC_OPERATION::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
+        eventAddress,
+        Event::STATE_SIGNALED,
         commandContainer.getDevice()->getHardwareInfo(),
         args);
 
     if (partitionCount > 1) {
-        NEO::EncodeSetMMIO<GfxFamily>::encodeIMM(*commandContainer.getCommandStream(),
+        NEO::ImplicitScalingDispatch<GfxFamily>::dispatchOffsetRegister(cmdListStream,
-                                                 NEO::PartitionRegisters<GfxFamily>::addressOffsetCCSOffset,
+                                                                        CommonConstants::partitionAddressOffset);
-                                                 CommonConstants::partitionAddressOffset,
-                                                 true);
     }
 }
 
@@ -219,7 +220,7 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendLaunchKernelWithParams(z
         }
     }
 
-    auto isMultiOsContextCapable = NEO::ImplicitScalingHelper::isImplicitScalingEnabled(device->getNEODevice()->getDeviceBitfield(),
+    auto isMultiOsContextCapable = NEO::ImplicitScalingHelper::isImplicitScalingEnabled(neoDevice->getDeviceBitfield(),
                                                                                         !isCooperative);
     updateStreamProperties(*kernel, isMultiOsContextCapable, isCooperative);
 
@@ -251,6 +252,11 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendLaunchKernelWithParams(z
             event->setPacketsInUse(partitionCount);
         }
         if (L3FlushEnable) {
+            size_t estimatedSize = NEO::MemorySynchronizationCommands<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(neoDevice->getHardwareInfo());
+            if (partitionCount > 1) {
+                estimatedSize += 2 * NEO::ImplicitScalingDispatch<GfxFamily>::getOffsetRegisterSize();
+            }
+            increaseCommandStreamSpace(estimatedSize);
             programEventL3Flush<gfxCoreFamily>(hEvent, this->device, partitionCount, commandContainer);
         }
     }
@@ -307,27 +313,21 @@ template <GFXCORE_FAMILY gfxCoreFamily>
 void CommandListCoreFamily<gfxCoreFamily>::appendMultiPartitionPrologue(uint32_t partitionDataSize) {
 
     const uint64_t workPartitionAllocationGpuVa = device->getNEODevice()->getDefaultEngine().commandStreamReceiver->getWorkPartitionAllocationGpuAddress();
-    size_t estimatedSizeRequired = sizeof(typename GfxFamily::MI_LOAD_REGISTER_MEM) + sizeof(typename GfxFamily::MI_LOAD_REGISTER_IMM);
+    size_t estimatedSizeRequired = NEO::ImplicitScalingDispatch<GfxFamily>::getRegisterConfigurationSize();
     increaseCommandStreamSpace(estimatedSizeRequired);
 
-    NEO::EncodeSetMMIO<GfxFamily>::encodeMEM(commandContainer,
+    NEO::ImplicitScalingDispatch<GfxFamily>::dispatchRegisterConfiguration(*commandContainer.getCommandStream(),
-                                             NEO::PartitionRegisters<GfxFamily>::wparidCCSOffset,
+                                                                           workPartitionAllocationGpuVa,
-                                             workPartitionAllocationGpuVa);
+                                                                           partitionDataSize);
-    NEO::EncodeSetMMIO<GfxFamily>::encodeIMM(commandContainer,
-                                             NEO::PartitionRegisters<GfxFamily>::addressOffsetCCSOffset,
-                                             partitionDataSize,
-                                             true);
 }
 
 template <GFXCORE_FAMILY gfxCoreFamily>
 void CommandListCoreFamily<gfxCoreFamily>::appendMultiPartitionEpilogue() {
 
-    const size_t estimatedSizeRequired = sizeof(typename GfxFamily::MI_LOAD_REGISTER_IMM);
+    const size_t estimatedSizeRequired = NEO::ImplicitScalingDispatch<GfxFamily>::getOffsetRegisterSize();
     increaseCommandStreamSpace(estimatedSizeRequired);
-    NEO::EncodeSetMMIO<GfxFamily>::encodeIMM(commandContainer,
+    NEO::ImplicitScalingDispatch<GfxFamily>::dispatchOffsetRegister(*commandContainer.getCommandStream(),
-                                             NEO::PartitionRegisters<GfxFamily>::addressOffsetCCSOffset,
+                                                                    CommonConstants::partitionAddressOffset);
-                                             CommonConstants::partitionAddressOffset,
-                                             true);
 }
 
 template <GFXCORE_FAMILY gfxCoreFamily>

level_zero/core/source/cmdqueue/cmdqueue_hw.h

@@ -52,6 +52,9 @@ struct CommandQueueHw : public CommandQueueImp {
 
     bool getPreemptionCmdProgramming() override;
     void patchCommands(CommandList &commandList, uint64_t scratchAddress);
+
+    size_t getPartitionProgrammingSize();
+    void programPartitionConfiguration(NEO::LinearStream &stream);
 };
 
 } // namespace L0

level_zero/core/source/cmdqueue/cmdqueue_hw.inl

@@ -270,7 +270,7 @@ ze_result_t CommandQueueHw<gfxCoreFamily>::executeCommandLists(
 
     linearStreamSizeEstimate += isCopyOnlyCommandQueue ? NEO::EncodeMiFlushDW<GfxFamily>::getMiFlushDwCmdSizeForDataWrite() : NEO::MemorySynchronizationCommands<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(hwInfo);
     if (partitionCount > 1) {
-        linearStreamSizeEstimate += sizeof(MI_LOAD_REGISTER_MEM) + sizeof(MI_LOAD_REGISTER_IMM);
+        linearStreamSizeEstimate += getPartitionProgrammingSize();
     }
 
     size_t alignedSize = alignUp<size_t>(linearStreamSizeEstimate, minCmdBufferPtrAlign);
@@ -420,14 +420,7 @@ ze_result_t CommandQueueHw<gfxCoreFamily>::executeCommandLists(
     commandQueuePreemptionMode = statePreemption;
 
     if (partitionCount > 1) {
-        uint64_t workPartitionAddress = csr->getWorkPartitionAllocationGpuAddress();
+        programPartitionConfiguration(child);
-        NEO::EncodeSetMMIO<GfxFamily>::encodeMEM(child,
-                                                 NEO::PartitionRegisters<GfxFamily>::wparidCCSOffset,
-                                                 workPartitionAddress);
-        NEO::EncodeSetMMIO<GfxFamily>::encodeIMM(child,
-                                                 NEO::PartitionRegisters<GfxFamily>::addressOffsetCCSOffset,
-                                                 CommonConstants::partitionAddressOffset,
-                                                 true);
     }
 
     if (hFence) {

level_zero/core/source/cmdqueue/cmdqueue_hw_base.inl

@@ -123,4 +123,13 @@ void CommandQueueHw<gfxCoreFamily>::patchCommands(CommandList &commandList, uint
     UNRECOVERABLE_IF(!commandsToPatch.empty());
 }
 
+template <GFXCORE_FAMILY gfxCoreFamily>
+size_t CommandQueueHw<gfxCoreFamily>::getPartitionProgrammingSize() {
+    return 0;
+}
+
+template <GFXCORE_FAMILY gfxCoreFamily>
+void CommandQueueHw<gfxCoreFamily>::programPartitionConfiguration(NEO::LinearStream &stream) {
+}
+
 } // namespace L0

level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl

@@ -153,4 +153,20 @@ void CommandQueueHw<gfxCoreFamily>::patchCommands(CommandList &commandList, uint
     }
 }
 
+template <GFXCORE_FAMILY gfxCoreFamily>
+size_t CommandQueueHw<gfxCoreFamily>::getPartitionProgrammingSize() {
+    using GfxFamily = typename NEO::GfxFamilyMapper<gfxCoreFamily>::GfxFamily;
+    return NEO::ImplicitScalingDispatch<GfxFamily>::getRegisterConfigurationSize();
+}
+
+template <GFXCORE_FAMILY gfxCoreFamily>
+void CommandQueueHw<gfxCoreFamily>::programPartitionConfiguration(NEO::LinearStream &stream) {
+    using GfxFamily = typename NEO::GfxFamilyMapper<gfxCoreFamily>::GfxFamily;
+
+    uint64_t workPartitionAddress = csr->getWorkPartitionAllocationGpuAddress();
+    NEO::ImplicitScalingDispatch<GfxFamily>::dispatchRegisterConfiguration(stream,
+                                                                           workPartitionAddress,
+                                                                           CommonConstants::partitionAddressOffset);
+}
+
 } // namespace L0

level_zero/core/test/unit_tests/sources/cmdqueue/test_cmdqueue.cpp

@@ -2108,5 +2108,27 @@ HWTEST2_F(DeviceWithDualStorage, givenCmdListWithAppendedKernelAndUsmTransferAnd
     ASSERT_EQ(ZE_RESULT_SUCCESS, res);
     commandQueue->destroy();
 }
+
+HWTEST2_F(CommandQueueSynchronizeTest, givenBasePlatformsWhenProgrammingPartitionRegistersThenExpectNoAction, CommandQueueSBASupport) {
+    ze_result_t returnValue;
+    ze_command_queue_desc_t desc = {};
+    auto csr = neoDevice->getDefaultEngine().commandStreamReceiver;
+
+    auto commandQueue = new MockCommandQueueHw<gfxCoreFamily>(device, csr, &desc);
+    returnValue = commandQueue->initialize(false, false);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, returnValue);
+
+    constexpr size_t expectedSize = 0;
+    EXPECT_EQ(expectedSize, commandQueue->getPartitionProgrammingSize());
+
+    size_t usedBefore = commandQueue->commandStream->getUsed();
+    commandQueue->programPartitionConfiguration(*commandQueue->commandStream);
+    size_t usedAfter = commandQueue->commandStream->getUsed();
+
+    EXPECT_EQ(expectedSize, usedAfter - usedBefore);
+
+    commandQueue->destroy();
+}
+
 } // namespace ult
 } // namespace L0

opencl/test/unit_test/command_stream/command_stream_receiver_hw_1_tests.cpp

@@ -1420,7 +1420,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, UltCommandStreamReceiverTest, WhenProgrammingActiveP
     size_t expectedCmdSize = 0;
     EXPECT_EQ(expectedCmdSize, commandStreamReceiver.getCmdSizeForActivePartitionConfig());
     size_t usedBefore = commandStreamReceiver.commandStream.getUsed();
-    commandStreamReceiver.programActivePartitionConfig();
+    commandStreamReceiver.programActivePartitionConfig(commandStreamReceiver.commandStream);
     size_t usedAfter = commandStreamReceiver.commandStream.getUsed();
     EXPECT_EQ(usedBefore, usedAfter);
 }

shared/source/command_container/implicit_scaling.h

@@ -67,6 +67,15 @@ struct ImplicitScalingDispatch {
                                         bool apiSelfCleanup,
                                         bool useSecondaryBatchBuffer);
 
+    static size_t getRegisterConfigurationSize();
+    static void dispatchRegisterConfiguration(LinearStream &commandStream,
+                                              uint64_t workPartitionSurfaceAddress,
+                                              uint32_t addressOffset);
+
+    static size_t getOffsetRegisterSize();
+    static void dispatchOffsetRegister(LinearStream &commandStream,
+                                       uint32_t addressOffset);
+
   private:
     static bool pipeControlStallRequired;
 };

shared/source/command_container/implicit_scaling_xehp_and_later.inl

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/command_container/command_encoder.h"
 #include "shared/source/command_container/implicit_scaling.h"
 #include "shared/source/command_container/walker_partition_xehp_and_later.h"
 #include "shared/source/command_stream/linear_stream.h"
@@ -172,4 +173,34 @@ void ImplicitScalingDispatch<GfxFamily>::dispatchBarrierCommands(LinearStream &c
     commandStream.getSpace(totalProgrammedSize);
 }
 
+template <typename GfxFamily>
+inline size_t ImplicitScalingDispatch<GfxFamily>::getRegisterConfigurationSize() {
+    return EncodeSetMMIO<GfxFamily>::sizeMEM +
+           getOffsetRegisterSize();
+}
+
+template <typename GfxFamily>
+inline void ImplicitScalingDispatch<GfxFamily>::dispatchRegisterConfiguration(LinearStream &commandStream,
+                                                                              uint64_t workPartitionSurfaceAddress,
+                                                                              uint32_t addressOffset) {
+    EncodeSetMMIO<GfxFamily>::encodeMEM(commandStream,
+                                        PartitionRegisters<GfxFamily>::wparidCCSOffset,
+                                        workPartitionSurfaceAddress);
+    dispatchOffsetRegister(commandStream, addressOffset);
+}
+
+template <typename GfxFamily>
+inline size_t ImplicitScalingDispatch<GfxFamily>::getOffsetRegisterSize() {
+    return EncodeSetMMIO<GfxFamily>::sizeIMM;
+}
+
+template <typename GfxFamily>
+inline void ImplicitScalingDispatch<GfxFamily>::dispatchOffsetRegister(LinearStream &commandStream,
+                                                                       uint32_t addressOffset) {
+    EncodeSetMMIO<GfxFamily>::encodeIMM(commandStream,
+                                        PartitionRegisters<GfxFamily>::addressOffsetCCSOffset,
+                                        addressOffset,
+                                        true);
+}
+
 } // namespace NEO

shared/source/command_stream/command_stream_receiver_hw.h

@@ -132,6 +132,7 @@ class CommandStreamReceiverHw : public CommandStreamReceiver {
     TagAllocatorBase *getTimestampPacketAllocator() override;
 
     void postInitFlagsSetup() override;
+    void programActivePartitionConfig(LinearStream &csr);
 
   protected:
     void programPreemption(LinearStream &csr, DispatchFlags &dispatchFlags);
@@ -150,7 +151,7 @@ class CommandStreamReceiverHw : public CommandStreamReceiver {
     void programStallingNoPostSyncCommandsForBarrier(LinearStream &cmdStream);
     void programEngineModeCommands(LinearStream &csr, const DispatchFlags &dispatchFlags);
     void programEngineModeEpliogue(LinearStream &csr, const DispatchFlags &dispatchFlags);
-    void programActivePartitionConfig();
+    void programActivePartitionConfigFlushTask(LinearStream &csr);
 
     void programEnginePrologue(LinearStream &csr);
     size_t getCmdSizeForPrologue() const;

shared/source/command_stream/command_stream_receiver_hw_base.inl

@@ -319,8 +319,7 @@ CompletionStamp CommandStreamReceiverHw<GfxFamily>::flushTask(
     TimestampPacketHelper::programCsrDependenciesForTimestampPacketContainer<GfxFamily>(commandStreamCSR, dispatchFlags.csrDependencies);
     TimestampPacketHelper::programCsrDependenciesForForTaskCountContainer<GfxFamily>(commandStreamCSR, dispatchFlags.csrDependencies);
 
-    programActivePartitionConfig();
+    programActivePartitionConfigFlushTask(commandStreamCSR);
-
     if (stallingCommandsOnNextFlushRequired) {
         programStallingCommandsForBarrier(commandStreamCSR, dispatchFlags);
     }
@@ -1458,4 +1457,11 @@ size_t CommandStreamReceiverHw<GfxFamily>::getCmdSizeForStallingCommands(const D
     }
 }
 
+template <typename GfxFamily>
+inline void CommandStreamReceiverHw<GfxFamily>::programActivePartitionConfigFlushTask(LinearStream &csr) {
+    if (csrSizeRequestFlags.activePartitionsChanged) {
+        programActivePartitionConfig(csr);
+    }
+}
+
 } // namespace NEO

shared/source/command_stream/command_stream_receiver_hw_bdw_and_later.inl

@@ -151,7 +151,7 @@ size_t CommandStreamReceiverHw<GfxFamily>::getCmdSizeForActivePartitionConfig()
 }
 
 template <typename GfxFamily>
-void CommandStreamReceiverHw<GfxFamily>::programActivePartitionConfig() {
+inline void CommandStreamReceiverHw<GfxFamily>::programActivePartitionConfig(LinearStream &csr) {
 }
 
 template <typename GfxFamily>

shared/source/command_stream/command_stream_receiver_hw_xehp_and_later.inl

@@ -144,25 +144,18 @@ void CommandStreamReceiverHw<GfxFamily>::collectStateBaseAddresIohPatchInfo(uint
 }
 
 template <typename GfxFamily>
-size_t CommandStreamReceiverHw<GfxFamily>::getCmdSizeForActivePartitionConfig() const {
+inline size_t CommandStreamReceiverHw<GfxFamily>::getCmdSizeForActivePartitionConfig() const {
-    if (this->staticWorkPartitioningEnabled && csrSizeRequestFlags.activePartitionsChanged) {
+    if (this->staticWorkPartitioningEnabled) {
-        return EncodeSetMMIO<GfxFamily>::sizeMEM +
+        return ImplicitScalingDispatch<GfxFamily>::getRegisterConfigurationSize();
-               EncodeSetMMIO<GfxFamily>::sizeIMM;
     }
     return 0;
 }
 
 template <typename GfxFamily>
-void CommandStreamReceiverHw<GfxFamily>::programActivePartitionConfig() {
+inline void CommandStreamReceiverHw<GfxFamily>::programActivePartitionConfig(LinearStream &csr) {
-    if (this->staticWorkPartitioningEnabled && csrSizeRequestFlags.activePartitionsChanged) {
+    if (this->staticWorkPartitioningEnabled) {
         uint64_t workPartitionAddress = getWorkPartitionAllocationGpuAddress();
-        EncodeSetMMIO<GfxFamily>::encodeMEM(commandStream,
+        ImplicitScalingDispatch<GfxFamily>::dispatchRegisterConfiguration(csr, workPartitionAddress, CommonConstants::partitionAddressOffset);
-                                            PartitionRegisters<GfxFamily>::wparidCCSOffset,
-                                            workPartitionAddress);
-        EncodeSetMMIO<GfxFamily>::encodeIMM(commandStream,
-                                            PartitionRegisters<GfxFamily>::addressOffsetCCSOffset,
-                                            CommonConstants::partitionAddressOffset,
-                                            true);
     }
 }
 

shared/source/direct_submission/CMakeLists.txt

@@ -12,6 +12,7 @@ set(NEO_CORE_DIRECT_SUBMISSION
     ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_controller.h
     ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_hw.h
     ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_hw.inl
+    ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_bdw_and_later.inl
     ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_hw_diagnostic_mode.cpp
     ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_hw_diagnostic_mode.h
     ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_properties.h
@@ -19,6 +20,7 @@ set(NEO_CORE_DIRECT_SUBMISSION
 
 if(SUPPORT_XEHP_AND_LATER)
   list(APPEND NEO_CORE_DIRECT_SUBMISSION
+       ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_xe_hp_core_and_later.inl
        ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_prefetcher_xe_hp_core_and_later.inl
        ${CMAKE_CURRENT_SOURCE_DIR}/direct_submission_prefetch_mitigation_xe_hp_core_and_later.inl
   )

shared/source/direct_submission/direct_submission_bdw_and_later.inl

@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/direct_submission/direct_submission_hw.h"
+
+namespace NEO {
+
+template <typename GfxFamily, typename Dispatcher>
+inline void DirectSubmissionHw<GfxFamily, Dispatcher>::dispatchPartitionRegisterConfiguration() {
+}
+
+template <typename GfxFamily, typename Dispatcher>
+inline size_t DirectSubmissionHw<GfxFamily, Dispatcher>::getSizePartitionRegisterConfigurationSection() {
+    return 0;
+}
+
+} // namespace NEO

shared/source/direct_submission/direct_submission_hw.h

@@ -113,6 +113,9 @@ class DirectSubmissionHw {
 
     uint64_t getCommandBufferPositionGpuAddress(void *position);
 
+    void dispatchPartitionRegisterConfiguration();
+    size_t getSizePartitionRegisterConfigurationSection();
+
     void createDiagnostic();
     void initDiagnostic(bool &submitOnInit);
     MOCKABLE_VIRTUAL void performDiagnosticMode();

shared/source/direct_submission/direct_submission_hw.inl

@@ -6,7 +6,6 @@
  */
 
 #include "shared/source/command_container/command_encoder.h"
-#include "shared/source/command_container/implicit_scaling.h"
 #include "shared/source/command_stream/submissions_aggregator.h"
 #include "shared/source/debug_settings/debug_settings_manager.h"
 #include "shared/source/device/device.h"
@@ -148,16 +147,9 @@ bool DirectSubmissionHw<GfxFamily, Dispatcher>::initialize(bool submitOnInit) {
 
         Dispatcher::dispatchPreemption(ringCommandStream);
         if (this->partitionedMode) {
-            startBufferSize += (EncodeSetMMIO<GfxFamily>::sizeMEM +
+            startBufferSize += getSizePartitionRegisterConfigurationSection();
-                                EncodeSetMMIO<GfxFamily>::sizeIMM);
+            dispatchPartitionRegisterConfiguration();
 
-            EncodeSetMMIO<GfxFamily>::encodeMEM(ringCommandStream,
-                                                PartitionRegisters<GfxFamily>::wparidCCSOffset,
-                                                this->workPartitionAllocation->getGpuAddress());
-            EncodeSetMMIO<GfxFamily>::encodeIMM(ringCommandStream,
-                                                PartitionRegisters<GfxFamily>::addressOffsetCCSOffset,
-                                                CommonConstants::partitionAddressOffset,
-                                                true);
             this->partitionConfigSet = true;
         }
         if (workloadMode == 1) {
@@ -181,8 +173,7 @@ bool DirectSubmissionHw<GfxFamily, Dispatcher>::startRingBuffer() {
 
     size_t startSize = getSizeSemaphoreSection();
     if (!this->partitionConfigSet) {
-        startSize += (EncodeSetMMIO<GfxFamily>::sizeMEM +
+        startSize += getSizePartitionRegisterConfigurationSection();
-                      EncodeSetMMIO<GfxFamily>::sizeIMM);
     }
     size_t requiredSize = startSize + getSizeDispatch() + getSizeEnd();
     if (ringCommandStream.getAvailableSpace() < requiredSize) {
@@ -191,13 +182,7 @@ bool DirectSubmissionHw<GfxFamily, Dispatcher>::startRingBuffer() {
     uint64_t gpuStartVa = getCommandBufferPositionGpuAddress(ringCommandStream.getSpace(0));
 
     if (!this->partitionConfigSet) {
-        EncodeSetMMIO<GfxFamily>::encodeMEM(ringCommandStream,
+        dispatchPartitionRegisterConfiguration();
-                                            PartitionRegisters<GfxFamily>::wparidCCSOffset,
-                                            this->workPartitionAllocation->getGpuAddress());
-        EncodeSetMMIO<GfxFamily>::encodeIMM(ringCommandStream,
-                                            PartitionRegisters<GfxFamily>::addressOffsetCCSOffset,
-                                            CommonConstants::partitionAddressOffset,
-                                            true);
         this->partitionConfigSet = true;
     }
 

shared/source/direct_submission/direct_submission_xe_hp_core_and_later.inl

@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/command_container/implicit_scaling.h"
+#include "shared/source/direct_submission/direct_submission_hw.h"
+
+namespace NEO {
+
+template <typename GfxFamily, typename Dispatcher>
+inline void DirectSubmissionHw<GfxFamily, Dispatcher>::dispatchPartitionRegisterConfiguration() {
+    ImplicitScalingDispatch<GfxFamily>::dispatchRegisterConfiguration(ringCommandStream,
+                                                                      this->workPartitionAllocation->getGpuAddress(),
+                                                                      CommonConstants::partitionAddressOffset);
+}
+
+template <typename GfxFamily, typename Dispatcher>
+inline size_t DirectSubmissionHw<GfxFamily, Dispatcher>::getSizePartitionRegisterConfigurationSection() {
+    return ImplicitScalingDispatch<GfxFamily>::getRegisterConfigurationSize();
+}
+
+} // namespace NEO

shared/source/gen11/linux/direct_submission_gen11.cpp

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/direct_submission/direct_submission_bdw_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_base.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_base.inl"

shared/source/gen11/windows/direct_submission_gen11.cpp

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/direct_submission/direct_submission_bdw_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_base.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_base.inl"

shared/source/gen12lp/linux/direct_submission_gen12lp.cpp

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/direct_submission/direct_submission_bdw_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_base.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_base.inl"

shared/source/gen12lp/windows/direct_submission_gen12lp.cpp

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/direct_submission/direct_submission_bdw_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_base.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_base.inl"

shared/source/gen8/linux/direct_submission_gen8.cpp

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/direct_submission/direct_submission_bdw_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_base.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_base.inl"

shared/source/gen8/windows/direct_submission_gen8.cpp

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/direct_submission/direct_submission_bdw_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_base.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_base.inl"

shared/source/gen9/linux/direct_submission_gen9.cpp

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/direct_submission/direct_submission_bdw_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_base.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_base.inl"

shared/source/gen9/windows/direct_submission_gen9.cpp

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/direct_submission/direct_submission_bdw_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_base.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_base.inl"

shared/source/xe_hp_core/linux/direct_submission_xe_hp_core.cpp

@@ -8,6 +8,7 @@
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_xe_hp_core_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_xe_hp_core_and_later.inl"
+#include "shared/source/direct_submission/direct_submission_xe_hp_core_and_later.inl"
 #include "shared/source/direct_submission/dispatchers/blitter_dispatcher.inl"
 #include "shared/source/direct_submission/dispatchers/dispatcher.inl"
 #include "shared/source/direct_submission/dispatchers/render_dispatcher.inl"

shared/source/xe_hp_core/windows/direct_submission_xe_hp_core.cpp

@@ -8,6 +8,7 @@
 #include "shared/source/direct_submission/direct_submission_hw.inl"
 #include "shared/source/direct_submission/direct_submission_prefetch_mitigation_xe_hp_core_and_later.inl"
 #include "shared/source/direct_submission/direct_submission_prefetcher_xe_hp_core_and_later.inl"
+#include "shared/source/direct_submission/direct_submission_xe_hp_core_and_later.inl"
 #include "shared/source/direct_submission/dispatchers/blitter_dispatcher.inl"
 #include "shared/source/direct_submission/dispatchers/dispatcher.inl"
 #include "shared/source/direct_submission/dispatchers/render_dispatcher.inl"

shared/test/common/mocks/mock_direct_submission_hw.h

@@ -29,6 +29,7 @@ struct MockDirectSubmissionHw : public DirectSubmissionHw<GfxFamily, Dispatcher>
     using BaseClass::disableCpuCacheFlush;
     using BaseClass::disableMonitorFence;
     using BaseClass::dispatchDisablePrefetcher;
+    using BaseClass::dispatchPartitionRegisterConfiguration;
     using BaseClass::dispatchPrefetchMitigation;
     using BaseClass::dispatchSemaphoreSection;
     using BaseClass::dispatchStartSection;
@@ -39,6 +40,7 @@ struct MockDirectSubmissionHw : public DirectSubmissionHw<GfxFamily, Dispatcher>
     using BaseClass::getSizeDisablePrefetcher;
     using BaseClass::getSizeDispatch;
     using BaseClass::getSizeEnd;
+    using BaseClass::getSizePartitionRegisterConfigurationSection;
     using BaseClass::getSizePrefetchMitigation;
     using BaseClass::getSizeSemaphoreSection;
     using BaseClass::getSizeStartSection;

shared/test/unit_test/direct_submission/direct_submission_tests_1.cpp

@@ -1265,3 +1265,23 @@ HWTEST_F(DirectSubmissionTest,
     EXPECT_EQ(expectedVfprintfCall, NEO::IoFunctions::mockVfptrinfCalled);
     EXPECT_EQ(2u, NEO::IoFunctions::mockFcloseCalled);
 }
+
+HWCMDTEST_F(IGFX_GEN8_CORE, DirectSubmissionTest,
+            givenLegacyPlatformsWhenProgrammingPartitionRegisterThenExpectNoAction) {
+    using Dispatcher = RenderDispatcher<FamilyType>;
+
+    MockDirectSubmissionHw<FamilyType, Dispatcher> directSubmission(*pDevice,
+                                                                    *osContext.get());
+
+    bool ret = directSubmission.initialize(true);
+    EXPECT_TRUE(ret);
+    size_t usedSize = directSubmission.ringCommandStream.getUsed();
+
+    constexpr size_t expectedSize = 0;
+    size_t estimatedSize = directSubmission.getSizePartitionRegisterConfigurationSection();
+    EXPECT_EQ(expectedSize, estimatedSize);
+
+    directSubmission.dispatchPartitionRegisterConfiguration();
+    size_t usedSizeAfter = directSubmission.ringCommandStream.getUsed();
+    EXPECT_EQ(expectedSize, usedSizeAfter - usedSize);
+}

shared/test/unit_test/direct_submission/direct_submission_tests_2.cpp

@@ -104,8 +104,8 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, DirectSubmissionDispatchBufferTest,
     EXPECT_TRUE(foundFenceUpdate);
 }
 
-HWTEST_F(DirectSubmissionDispatchBufferTest,
+HWCMDTEST_F(IGFX_XE_HP_CORE, DirectSubmissionDispatchBufferTest,
-         givenDirectSubmissionRingStartWhenMultiTileSupportedThenExpectMultiTileConfigSetAndWorkPartitionResident) {
+            givenDirectSubmissionRingStartWhenMultiTileSupportedThenExpectMultiTileConfigSetAndWorkPartitionResident) {
     using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
     using MI_LOAD_REGISTER_MEM = typename FamilyType::MI_LOAD_REGISTER_MEM;
 
@@ -163,8 +163,8 @@ HWTEST_F(DirectSubmissionDispatchBufferTest,
     EXPECT_EQ(gpuAddress, loadRegisterMem->getMemoryAddress());
 }
 
-HWTEST_F(DirectSubmissionDispatchBufferTest,
+HWCMDTEST_F(IGFX_XE_HP_CORE, DirectSubmissionDispatchBufferTest,
-         givenDirectSubmissionRingNotStartOnInitWhenMultiTileSupportedThenExpectMultiTileConfigSetDuringExplicitRingStart) {
+            givenDirectSubmissionRingNotStartOnInitWhenMultiTileSupportedThenExpectMultiTileConfigSetDuringExplicitRingStart) {
     using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
     using MI_LOAD_REGISTER_MEM = typename FamilyType::MI_LOAD_REGISTER_MEM;