diff --git a/manifests/infra.yml b/manifests/infra.yml index 0ce410f563..1dd13aa30c 100644 --- a/manifests/infra.yml +++ b/manifests/infra.yml @@ -3,7 +3,7 @@ components: branch: master dest_dir: infra fetch_tags: true - revision: v6939 + revision: v6941 type: git converter: M-3107 version: '1' diff --git a/opencl/test/unit_test/aub_tests/command_stream/aub_mi_atomic_tests.cpp b/opencl/test/unit_test/aub_tests/command_stream/aub_mi_atomic_tests.cpp index faa175b5be..00f61ddfa5 100644 --- a/opencl/test/unit_test/aub_tests/command_stream/aub_mi_atomic_tests.cpp +++ b/opencl/test/unit_test/aub_tests/command_stream/aub_mi_atomic_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021-2024 Intel Corporation + * Copyright (C) 2021-2025 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -8,6 +8,7 @@ #include "shared/source/command_container/command_encoder.h" #include "shared/source/command_stream/aub_command_stream_receiver_hw.h" #include "shared/source/command_stream/command_stream_receiver_hw.h" +#include "shared/source/helpers/compiler_product_helper.h" #include "shared/source/memory_manager/allocation_properties.h" #include "shared/source/memory_manager/memory_manager.h" #include "shared/test/common/helpers/dispatch_flags_helper.h" @@ -54,6 +55,11 @@ struct MiAtomicAubFixture : public AUBFixture { taskStream.replaceGraphicsAllocation(streamAllocation); taskStream.replaceBuffer(streamAllocation->getUnderlyingBuffer(), streamAllocation->getUnderlyingBufferSize()); + + auto &compilerProductHelper = device->getCompilerProductHelper(); + + auto heaplessEnabled = compilerProductHelper.isHeaplessModeEnabled(device->getHardwareInfo()); + this->heaplessStateInitEnabled = compilerProductHelper.isHeaplessStateInitEnabled(heaplessEnabled); } void tearDown() { @@ -71,11 +77,20 @@ struct MiAtomicAubFixture : public AUBFixture { csr->makeResident(*deviceSurface); csr->makeResident(*systemSurface); - csr->flushTask(taskStream, 0, - &csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u), - &csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u), - &csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u), - 0u, dispatchFlags, device->getDevice()); + + if (this->heaplessStateInitEnabled) { + csr->flushTaskStateless(taskStream, 0, + &csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u), + &csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u), + &csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u), + 0u, dispatchFlags, device->getDevice()); + } else { + csr->flushTask(taskStream, 0, + &csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u), + &csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u), + &csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u), + 0u, dispatchFlags, device->getDevice()); + } csr->flushBatchedSubmissions(); } @@ -84,6 +99,7 @@ struct MiAtomicAubFixture : public AUBFixture { GraphicsAllocation *streamAllocation = nullptr; GraphicsAllocation *deviceSurface = nullptr; GraphicsAllocation *systemSurface = nullptr; + bool heaplessStateInitEnabled = false; }; using MiAtomicAubTest = Test; diff --git a/opencl/test/unit_test/aub_tests/command_stream/aub_walker_partition_tests_xehp_and_later.cpp b/opencl/test/unit_test/aub_tests/command_stream/aub_walker_partition_tests_xehp_and_later.cpp index ab2cb550e1..608e40c9a2 100644 --- a/opencl/test/unit_test/aub_tests/command_stream/aub_walker_partition_tests_xehp_and_later.cpp +++ b/opencl/test/unit_test/aub_tests/command_stream/aub_walker_partition_tests_xehp_and_later.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2022-2024 Intel Corporation + * Copyright (C) 2022-2025 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -7,6 +7,7 @@ #include "shared/source/helpers/array_count.h" #include "shared/source/helpers/basic_math.h" +#include "shared/source/helpers/compiler_product_helper.h" #include "shared/source/utilities/io_functions.h" #include "shared/source/utilities/tag_allocator.h" #include "shared/test/common/mocks/mock_execution_environment.h" @@ -391,7 +392,12 @@ struct MultiLevelBatchAubFixture : public AUBFixture { thirdLevelBatch = memoryManager->allocateGraphicsMemoryWithProperties(*commandBufferProperties); secondLevelBatchStream = std::make_unique(secondLevelBatch); thirdLevelBatchStream = std::make_unique(thirdLevelBatch); - }; + + auto &compilerProductHelper = device->getCompilerProductHelper(); + auto heaplessEnabled = compilerProductHelper.isHeaplessModeEnabled(device->getHardwareInfo()); + this->heaplessStateInitEnabled = compilerProductHelper.isHeaplessStateInitEnabled(heaplessEnabled); + } + void tearDown() { debugManager.flags.AubDumpAddMmioRegistersList.getRef() = "unk"; debugManager.flags.AubDumpAddMmioRegistersList.getRef().shrink_to_fit(); @@ -403,18 +409,27 @@ struct MultiLevelBatchAubFixture : public AUBFixture { memoryManager->freeGraphicsMemory(helperSurface); AUBFixture::tearDown(); - }; + } void flushStream() { DispatchFlags dispatchFlags = DispatchFlagsHelper::createDefaultDispatchFlags(); dispatchFlags.guardCommandBufferWithPipeControl = true; csr->makeResident(*helperSurface); - csr->flushTask(*taskStream, 0, - &csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u), - &csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u), - &csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u), - 0u, dispatchFlags, device->getDevice()); + + if (this->heaplessStateInitEnabled) { + csr->flushTaskStateless(*taskStream, 0, + &csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u), + &csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u), + &csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u), + 0u, dispatchFlags, device->getDevice()); + } else { + csr->flushTask(*taskStream, 0, + &csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u), + &csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u), + &csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u), + 0u, dispatchFlags, device->getDevice()); + } csr->flushBatchedSubmissions(); } @@ -431,6 +446,7 @@ struct MultiLevelBatchAubFixture : public AUBFixture { GraphicsAllocation *secondLevelBatch = nullptr; GraphicsAllocation *thirdLevelBatch = nullptr; + bool heaplessStateInitEnabled = false; }; using MultiLevelBatchTestsWithNesting = Test>; diff --git a/opencl/test/unit_test/aub_tests/command_stream/mi_math_aub_tests_dg2_and_later.cpp b/opencl/test/unit_test/aub_tests/command_stream/mi_math_aub_tests_dg2_and_later.cpp index 06ca8501d9..5ae200489e 100644 --- a/opencl/test/unit_test/aub_tests/command_stream/mi_math_aub_tests_dg2_and_later.cpp +++ b/opencl/test/unit_test/aub_tests/command_stream/mi_math_aub_tests_dg2_and_later.cpp @@ -1,11 +1,12 @@ /* - * Copyright (C) 2022-2024 Intel Corporation + * Copyright (C) 2022-2025 Intel Corporation * * SPDX-License-Identifier: MIT * */ #include "shared/source/command_container/command_encoder.h" +#include "shared/source/helpers/compiler_product_helper.h" #include "shared/source/helpers/register_offsets.h" #include "shared/source/memory_manager/allocation_properties.h" #include "shared/source/memory_manager/memory_manager.h" @@ -35,6 +36,10 @@ struct MiMath : public AUBFixture, public ::testing::Test { streamAllocation = this->device->getMemoryManager()->allocateGraphicsMemoryWithProperties({device->getRootDeviceIndex(), MemoryConstants::pageSize, AllocationType::commandBuffer, device->getDeviceBitfield()}); taskStream = std::make_unique(streamAllocation); + + auto &compilerProductHelper = device->getCompilerProductHelper(); + auto heaplessEnabled = compilerProductHelper.isHeaplessModeEnabled(device->getHardwareInfo()); + this->heaplessStateInitEnabled = compilerProductHelper.isHeaplessStateInitEnabled(heaplessEnabled); } void TearDown() override { this->device->getMemoryManager()->freeGraphicsMemory(streamAllocation); @@ -45,11 +50,19 @@ struct MiMath : public AUBFixture, public ::testing::Test { DispatchFlags dispatchFlags = DispatchFlagsHelper::createDefaultDispatchFlags(); dispatchFlags.guardCommandBufferWithPipeControl = true; - csr->flushTask(*taskStream, 0, - &csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u), - &csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u), - &csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u), - 0u, dispatchFlags, device->getDevice()); + if (this->heaplessStateInitEnabled) { + csr->flushTaskStateless(*taskStream, 0, + &csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u), + &csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u), + &csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u), + 0u, dispatchFlags, device->getDevice()); + } else { + csr->flushTask(*taskStream, 0, + &csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u), + &csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u), + &csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u), + 0u, dispatchFlags, device->getDevice()); + } csr->flushBatchedSubmissions(); } @@ -125,6 +138,7 @@ struct MiMath : public AUBFixture, public ::testing::Test { const uint32_t numberOfOperationToLoadAddressToMiMathAccu = 7; std::unique_ptr taskStream; GraphicsAllocation *streamAllocation = nullptr; + bool heaplessStateInitEnabled = false; }; using MatcherIsDg2OrPvc = IsWithinProducts; diff --git a/opencl/test/unit_test/aub_tests/fixtures/aub_walker_partition_fixture.cpp b/opencl/test/unit_test/aub_tests/fixtures/aub_walker_partition_fixture.cpp index 1b4ff54af2..39232355bc 100644 --- a/opencl/test/unit_test/aub_tests/fixtures/aub_walker_partition_fixture.cpp +++ b/opencl/test/unit_test/aub_tests/fixtures/aub_walker_partition_fixture.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2022-2024 Intel Corporation + * Copyright (C) 2022-2025 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -10,6 +10,7 @@ #include "shared/source/command_container/walker_partition_xehp_and_later.h" #include "shared/source/helpers/array_count.h" #include "shared/source/helpers/basic_math.h" +#include "shared/source/helpers/compiler_product_helper.h" #include "shared/source/helpers/timestamp_packet.h" #include "shared/source/utilities/io_functions.h" #include "shared/source/utilities/tag_allocator.h" @@ -120,6 +121,11 @@ void AubWalkerPartitionZeroFixture::setUp() { helperSurface = memoryManager->allocateGraphicsMemoryWithProperties(*commandBufferProperties); memset(helperSurface->getUnderlyingBuffer(), 0, MemoryConstants::pageSize); taskStream = std::make_unique(streamAllocation); + + auto &compilerProductHelper = device->getCompilerProductHelper(); + + auto heaplessEnabled = compilerProductHelper.isHeaplessModeEnabled(device->getHardwareInfo()); + this->heaplessStateInitEnabled = compilerProductHelper.isHeaplessStateInitEnabled(heaplessEnabled); } void AubWalkerPartitionZeroFixture::tearDown() { auto memoryManager = this->device->getMemoryManager(); @@ -133,11 +139,20 @@ void AubWalkerPartitionZeroFixture::flushStream() { dispatchFlags.guardCommandBufferWithPipeControl = true; csr->makeResident(*helperSurface); - csr->flushTask(*taskStream, 0, - &csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u), - &csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u), - &csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u), - 0u, dispatchFlags, device->getDevice()); + + if (this->heaplessStateInitEnabled) { + csr->flushTaskStateless(*taskStream, 0, + &csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u), + &csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u), + &csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u), + 0u, dispatchFlags, device->getDevice()); + } else { + csr->flushTask(*taskStream, 0, + &csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u), + &csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u), + &csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u), + 0u, dispatchFlags, device->getDevice()); + } csr->flushBatchedSubmissions(); } diff --git a/opencl/test/unit_test/aub_tests/fixtures/aub_walker_partition_fixture.h b/opencl/test/unit_test/aub_tests/fixtures/aub_walker_partition_fixture.h index 589fd9fe20..df7c839d8d 100644 --- a/opencl/test/unit_test/aub_tests/fixtures/aub_walker_partition_fixture.h +++ b/opencl/test/unit_test/aub_tests/fixtures/aub_walker_partition_fixture.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2022-2024 Intel Corporation + * Copyright (C) 2022-2025 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -120,6 +120,7 @@ struct AubWalkerPartitionFixture : public KernelAUBFixture HardwareParse hwParser; DispatchParameters dispatchParamters; + bool heaplessStateInitEnabled = false; }; struct AubWalkerPartitionTest : public AubWalkerPartitionFixture, diff --git a/opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_1_tests.cpp b/opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_1_tests.cpp index 782b358380..a07ea7c76a 100644 --- a/opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_1_tests.cpp +++ b/opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_1_tests.cpp @@ -29,6 +29,8 @@ using namespace NEO; +#include "shared/test/common/test_macros/header/heapless_matchers.h" + typedef UltCommandStreamReceiverTest CommandStreamReceiverFlushTaskTests; HWTEST_F(CommandStreamReceiverFlushTaskTests, WhenFlushingTaskThenCommandStreamReceiverGetsUpdated) { @@ -760,7 +762,7 @@ HWTEST2_F(CommandStreamReceiverFlushTaskTests, GivenPreambleSentAndMediaSamplerR EXPECT_NE(nullptr, getCommand()); } -HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotSentWhenFlushingTaskThenStateBaseAddressIsSent) { +HWTEST2_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotSentWhenFlushingTaskThenStateBaseAddressIsSent, IsHeapfulSupported) { auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); commandStreamReceiver.isPreambleSent = true; commandStreamReceiver.setMediaVFEStateDirty(false); @@ -774,7 +776,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotSentWhenFl EXPECT_NE(cmdList.end(), stateBaseAddressItor); } -HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenSizeChangedWhenFlushingTaskThenStateBaseAddressIsSent) { +HWTEST2_F(CommandStreamReceiverFlushTaskTests, GivenSizeChangedWhenFlushingTaskThenStateBaseAddressIsSent, IsHeapfulSupported) { auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); auto dshSize = dsh.getMaxAvailableSpace(); auto iohSize = ioh.getMaxAvailableSpace(); @@ -803,7 +805,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenSizeChangedWhenFlushingTaskTh EXPECT_NE(cmdList.end(), stateBaseAddressItor); } -HWTEST_F(CommandStreamReceiverFlushTaskTests, givenDshHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded) { +HWTEST2_F(CommandStreamReceiverFlushTaskTests, givenDshHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded, IsHeapfulSupported) { bool deviceUsesDsh = pDevice->getHardwareInfo().capabilityTable.supportsImages; if (!deviceUsesDsh) { GTEST_SKIP(); @@ -819,7 +821,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenDshHeapChangeWhenFlushTaskIsC EXPECT_NE(cmdList.end(), stateBaseAddressItor); } -HWTEST_F(CommandStreamReceiverFlushTaskTests, givenSshHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded) { +HWTEST2_F(CommandStreamReceiverFlushTaskTests, givenSshHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded, IsHeapfulSupported) { auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); configureCSRtoNonDirtyState(false); @@ -831,7 +833,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenSshHeapChangeWhenFlushTaskIsC EXPECT_NE(cmdList.end(), stateBaseAddressItor); } -HWTEST_F(CommandStreamReceiverFlushTaskTests, givenIohHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded) { +HWTEST2_F(CommandStreamReceiverFlushTaskTests, givenIohHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded, IsHeapfulSupported) { auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); configureCSRtoNonDirtyState(false); @@ -843,7 +845,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenIohHeapChangeWhenFlushTaskIsC EXPECT_NE(cmdList.end(), stateBaseAddressItor); } -HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotChangedWhenFlushingTaskThenStateBaseAddressIsNotSent) { +HWTEST2_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotChangedWhenFlushingTaskThenStateBaseAddressIsNotSent, IsHeapfulSupported) { auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); commandStreamReceiver.isPreambleSent = true; configureCSRHeapStatesToNonDirty(); @@ -1269,14 +1271,14 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenBlockedKernelRequiringDCFlush cmdList.clear(); // Parse command list - parseCommands(commandStreamTask, usedBefore); + parseCommands(commandStreamTask, usedAfter - usedBefore); auto itorPC = find(cmdList.begin(), cmdList.end()); - EXPECT_NE(cmdList.end(), itorPC); + ASSERT_NE(cmdList.end(), itorPC); if (UnitTestHelper::isPipeControlWArequired(pDevice->getHardwareInfo())) { itorPC++; itorPC = find(itorPC, cmdList.end()); - EXPECT_NE(cmdList.end(), itorPC); + ASSERT_NE(cmdList.end(), itorPC); } // Verify that the dcFlushEnabled bit is set in PC diff --git a/opencl/test/unit_test/helpers/test_preamble_xehp_and_later.cpp b/opencl/test/unit_test/helpers/test_preamble_xehp_and_later.cpp index 25bc97e51c..1a37f9be69 100644 --- a/opencl/test/unit_test/helpers/test_preamble_xehp_and_later.cpp +++ b/opencl/test/unit_test/helpers/test_preamble_xehp_and_later.cpp @@ -216,7 +216,7 @@ HWTEST2_F(PreambleCfeStateXeHPAndLater, givenSetDebugFlagWhenPreambleCfeStateIsP } using XeHpCommandStreamReceiverFlushTaskTests = UltCommandStreamReceiverTest; -HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenExpectStateBaseAddressEqualsIndirectObjectBaseAddress) { +HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenExpectStateBaseAddressEqualsIndirectObjectBaseAddress, IsHeapfulSupportedAndAtLeastXeHpCore) { using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS; auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); if (commandStreamReceiver.heaplessModeEnabled) { @@ -236,7 +236,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushi } } -HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushCalledThenStateBaseAddressHasAllCachesOn) { +HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushCalledThenStateBaseAddressHasAllCachesOn, IsHeapfulSupportedAndAtLeastXeHpCore) { using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS; auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); auto gmmHelper = pDevice->getRootDeviceEnvironment().getGmmHelper(); @@ -261,7 +261,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushC EXPECT_EQ(expectedMocsForStateless, stateBaseAddress->getStatelessDataPortAccessMemoryObjectControlState()); } -HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushCalledThenStateBaseAddressHasAllCachesOffWhenDebugFlagIsPresent) { +HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushCalledThenStateBaseAddressHasAllCachesOffWhenDebugFlagIsPresent, IsHeapfulSupportedAndAtLeastXeHpCore) { DebugManagerStateRestore restorer; debugManager.flags.DisableCachingForHeaps.set(1); using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS; @@ -287,7 +287,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushC EXPECT_EQ(expectedMocsForHeap, stateBaseAddress->getBindlessSamplerStateMemoryObjectControlState()); } -HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenL3ToL1DebugFlagWhenStatelessMocsIsProgrammedThenItHasL1CachingOn) { +HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, givenL3ToL1DebugFlagWhenStatelessMocsIsProgrammedThenItHasL1CachingOn, IsHeapfulSupportedAndAtLeastXeHpCore) { DebugManagerStateRestore restore; debugManager.flags.ForceL1Caching.set(1u); using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS; @@ -303,7 +303,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenL3ToL EXPECT_EQ(expectedMocs, stateBaseAddress->getStatelessDataPortAccessMemoryObjectControlState()); } -HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenForceL1CachingDebugFlagDisabledWhenStatelessMocsIsProgrammedThenItHasL3CachingOn) { +HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, givenForceL1CachingDebugFlagDisabledWhenStatelessMocsIsProgrammedThenItHasL3CachingOn, IsHeapfulSupportedAndAtLeastXeHpCore) { DebugManagerStateRestore restore; debugManager.flags.ForceL1Caching.set(0u); using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS; @@ -322,7 +322,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenForce EXPECT_EQ(expectedMocs, stateBaseAddress->getStatelessDataPortAccessMemoryObjectControlState()); } -HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenExpectBindlessBaseAddressEqualSurfaceStateBaseAddress) { +HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenExpectBindlessBaseAddressEqualSurfaceStateBaseAddress, IsHeapfulSupportedAndAtLeastXeHpCore) { using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS; using RENDER_SURFACE_STATE = typename FamilyType::RENDER_SURFACE_STATE; @@ -343,7 +343,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushi EXPECT_EQ(bindlessSurfaceSize, stateBaseAddress->getBindlessSurfaceStateSize()); } -HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenSetBindlessSamplerStateBaseAddressModifyEnable) { +HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenSetBindlessSamplerStateBaseAddressModifyEnable, IsHeapfulSupportedAndAtLeastXeHpCore) { using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS; auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); if (commandStreamReceiver.heaplessModeEnabled) { @@ -361,7 +361,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushi EXPECT_EQ(dsh.getHeapSizeInPages(), stateBaseAddress->getBindlessSamplerStateBufferSize()); } -HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenDebugKeysThatOverrideMultiGpuSettingWhenStateBaseAddressIsProgrammedThenValuesMatch) { +HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, givenDebugKeysThatOverrideMultiGpuSettingWhenStateBaseAddressIsProgrammedThenValuesMatch, IsHeapfulSupportedAndAtLeastXeHpCore) { DebugManagerStateRestore restorer; auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); diff --git a/shared/source/command_stream/command_stream_receiver_hw_base.inl b/shared/source/command_stream/command_stream_receiver_hw_base.inl index 054011c84f..48f5796324 100644 --- a/shared/source/command_stream/command_stream_receiver_hw_base.inl +++ b/shared/source/command_stream/command_stream_receiver_hw_base.inl @@ -2322,6 +2322,10 @@ inline void CommandStreamReceiverHw::handleBatchedDispatchImplicitFlu } } +template +void CommandStreamReceiverHw::programStateBaseAddressHeapless(Device &device, LinearStream &commandStream) { +} + template inline BatchBuffer CommandStreamReceiverHw::prepareBatchBufferForSubmission(LinearStream &commandStreamTask, size_t commandStreamStartTask, diff --git a/shared/source/command_stream/command_stream_receiver_hw_heap_addressing.inl b/shared/source/command_stream/command_stream_receiver_hw_heap_addressing.inl index a585d92825..ba05f4f433 100644 --- a/shared/source/command_stream/command_stream_receiver_hw_heap_addressing.inl +++ b/shared/source/command_stream/command_stream_receiver_hw_heap_addressing.inl @@ -54,11 +54,6 @@ SubmissionStatus CommandStreamReceiverHw::programHeaplessProlog(Devic return SubmissionStatus::unsupported; } -template -void CommandStreamReceiverHw::programStateBaseAddressHeapless(Device &device, LinearStream &commandStream) { - UNRECOVERABLE_IF(true); -} - template void CommandStreamReceiverHw::programComputeModeHeapless(Device &device, LinearStream &commandStream) { UNRECOVERABLE_IF(true); diff --git a/shared/test/unit_test/command_stream/command_stream_receiver_tests.cpp b/shared/test/unit_test/command_stream/command_stream_receiver_tests.cpp index 52bc815449..ec1abf1157 100644 --- a/shared/test/unit_test/command_stream/command_stream_receiver_tests.cpp +++ b/shared/test/unit_test/command_stream/command_stream_receiver_tests.cpp @@ -5962,7 +5962,6 @@ HWTEST_F(CommandStreamReceiverHwHeaplessTest, whenHeaplessCommandStreamReceiverF EXPECT_ANY_THROW(csr->flushTaskStateless(commandStream, 0, nullptr, nullptr, nullptr, 0, csr->recordedDispatchFlags, *pDevice)); EXPECT_ANY_THROW(csr->programHeaplessProlog(*pDevice)); - EXPECT_ANY_THROW(csr->programStateBaseAddressHeapless(*pDevice, commandStream)); EXPECT_ANY_THROW(csr->programComputeModeHeapless(*pDevice, commandStream)); EXPECT_ANY_THROW(csr->getCmdSizeForHeaplessPrologue(*pDevice)); EXPECT_ANY_THROW(csr->handleAllocationsResidencyForHeaplessProlog(commandStream, *pDevice)); @@ -6369,12 +6368,20 @@ HWTEST_F(CommandStreamReceiverHwTest, givenEpilogueStreamAvailableWhenFlushBcsTa HWTEST_F(CommandStreamReceiverHwTest, givenEpilogueStreamAvailableWhenFlushImmediateTaskCalledThenDispachEpilogueCommandsIntoEpilogueStream) { auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); - + auto heaplessStateInit = commandStreamReceiver.heaplessStateInitialized; // first flush can carry preamble, no interest in flags here - commandStreamReceiver.flushImmediateTask(commandStream, - commandStream.getUsed(), - immediateFlushTaskFlags, - *pDevice); + if (heaplessStateInit) { + commandStreamReceiver.flushImmediateTaskStateless(commandStream, + commandStream.getUsed(), + immediateFlushTaskFlags, + *pDevice); + + } else { + commandStreamReceiver.flushImmediateTask(commandStream, + commandStream.getUsed(), + immediateFlushTaskFlags, + *pDevice); + } // regular dispatch here GraphicsAllocation *commandBuffer = commandStreamReceiver.getMemoryManager()->allocateGraphicsMemoryWithProperties(MockAllocationProperties{commandStreamReceiver.getRootDeviceIndex(), MemoryConstants::pageSize}); @@ -6387,10 +6394,18 @@ HWTEST_F(CommandStreamReceiverHwTest, givenEpilogueStreamAvailableWhenFlushImmed immediateFlushTaskFlags.requireTaskCountUpdate = true; immediateFlushTaskFlags.optionalEpilogueCmdStream = &epilogueStream; - commandStreamReceiver.flushImmediateTask(commandStream, - commandStream.getUsed(), - immediateFlushTaskFlags, - *pDevice); + if (heaplessStateInit) { + commandStreamReceiver.flushImmediateTaskStateless(commandStream, + commandStream.getUsed(), + immediateFlushTaskFlags, + *pDevice); + + } else { + commandStreamReceiver.flushImmediateTask(commandStream, + commandStream.getUsed(), + immediateFlushTaskFlags, + *pDevice); + } EXPECT_TRUE(commandStreamReceiver.isMadeResident(commandBuffer)); EXPECT_TRUE(commandStreamReceiver.latestFlushedBatchBuffer.dispatchMonitorFence);