Add xe_hpg shared unit tests
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
This commit is contained in:
parent
182b476c67
commit
8a84170e72
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@ -9,4 +9,11 @@ target_sources(${TARGET_NAME} PRIVATE
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${CMAKE_CURRENT_SOURCE_DIR}/command_container_tests.cpp
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${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_tests.cpp
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)
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if(TESTS_DG2_AND_LATER)
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target_sources(${TARGET_NAME} PRIVATE
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${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_tests_xe_hpg_core_and_later.cpp
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)
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endif()
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add_subdirectories()
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@ -0,0 +1,50 @@
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/*
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* Copyright (C) 2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/command_container/command_encoder.h"
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#include "shared/source/gmm_helper/gmm_helper.h"
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#include "shared/test/common/fixtures/device_fixture.h"
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#include "shared/test/common/helpers/debug_manager_state_restore.h"
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#include "test.h"
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using namespace NEO;
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using CommandEncoderXeHpgCorePlusTests = Test<DeviceFixture>;
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HWTEST2_F(CommandEncoderXeHpgCorePlusTests, givenSpecifiedL1CacheControlWhenAppendingRssThenProgramProvidedL1CachePolicy, IsAtLeastXeHpgCore) {
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DebugManagerStateRestore restorer;
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auto memoryManager = pDevice->getExecutionEnvironment()->memoryManager.get();
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size_t allocationSize = MemoryConstants::pageSize;
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AllocationProperties properties(pDevice->getRootDeviceIndex(), allocationSize, GraphicsAllocation::AllocationType::BUFFER, pDevice->getDeviceBitfield());
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auto allocation = memoryManager->allocateGraphicsMemoryWithProperties(properties);
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auto rssCmd = FamilyType::cmdInitRenderSurfaceState;
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auto l1CacheControl = FamilyType::RENDER_SURFACE_STATE::L1_CACHE_POLICY_WBP;
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DebugManager.flags.OverrideL1CacheControlInSurfaceState.set(l1CacheControl);
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NEO::EncodeSurfaceStateArgs args;
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args.outMemory = &rssCmd;
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args.graphicsAddress = allocation->getGpuAddress();
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args.size = allocation->getUnderlyingBufferSize();
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args.mocs = pDevice->getGmmHelper()->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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args.numAvailableDevices = pDevice->getNumGenericSubDevices();
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args.allocation = allocation;
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args.gmmHelper = pDevice->getGmmHelper();
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args.areMultipleSubDevicesInContext = true;
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EncodeSurfaceState<FamilyType>::encodeBuffer(args);
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EXPECT_EQ(static_cast<uint32_t>(l1CacheControl), rssCmd.getL1CachePolicyL1CacheControl());
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l1CacheControl = FamilyType::RENDER_SURFACE_STATE::L1_CACHE_POLICY_WB;
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DebugManager.flags.OverrideL1CacheControlInSurfaceState.set(l1CacheControl);
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EncodeSurfaceState<FamilyType>::encodeBuffer(args);
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EXPECT_EQ(static_cast<uint32_t>(l1CacheControl), rssCmd.getL1CachePolicyL1CacheControl());
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memoryManager->freeGraphicsMemory(allocation);
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}
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@ -38,4 +38,23 @@ if(TESTS_XE_HP_CORE)
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)
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endif()
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if(TESTS_DG2_AND_LATER)
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target_sources(${TARGET_NAME} PRIVATE
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${CMAKE_CURRENT_SOURCE_DIR}/test_encode_dispatch_kernel_dg2_and_later.cpp
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${CMAKE_CURRENT_SOURCE_DIR}/test_encode_dispatch_kernel_dg2_and_later.h
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)
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endif()
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if(TESTS_DG2)
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target_sources(${TARGET_NAME} PRIVATE
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${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_tests_dg2.cpp
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)
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endif()
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if(TESTS_XE_HPG_CORE)
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target_sources(${TARGET_NAME} PRIVATE
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${CMAKE_CURRENT_SOURCE_DIR}/test_implicit_scaling_xe_hpg.cpp
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)
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endif()
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add_subdirectories()
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@ -0,0 +1,76 @@
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/*
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* Copyright (C) 2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/command_container/cmdcontainer.h"
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#include "shared/source/os_interface/hw_info_config.h"
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#include "shared/test/common/fixtures/device_fixture.h"
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#include "shared/test/common/helpers/debug_manager_state_restore.h"
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#include "test.h"
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using namespace NEO;
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using DG2CommandEncoderTest = Test<DeviceFixture>;
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HWTEST_EXCLUDE_PRODUCT(XeHPAndLaterCommandEncoderTest, whenGettingRequiredSizeForStateBaseAddressCommandThenCorrectSizeIsReturned_IsAtLeastXeHpCore, IGFX_DG2);
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HWTEST_EXCLUDE_PRODUCT(CommandEncoderTest, whenGettingRequiredSizeForStateBaseAddressCommandThenCorrectSizeIsReturned_Platforms, IGFX_DG2);
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HWTEST_EXCLUDE_PRODUCT(XeHPAndLaterCommandEncoderTest, givenCommandContainerWithDirtyHeapWhenGettingRequiredSizeForStateBaseAddressCommandThenCorrectSizeIsReturned_IsAtLeastXeHpCore, IGFX_DG2);
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HWTEST2_F(DG2CommandEncoderTest, givenDG2WhenGettingRequiredSizeForStateBaseAddressCommandThenCorrectSizeIsReturned, IsDG2) {
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class MockCommandContainer : public CommandContainer {
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public:
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MockCommandContainer() : CommandContainer() {}
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void clearHeaps() {
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dirtyHeaps = 0;
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}
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};
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auto container = MockCommandContainer();
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container.clearHeaps();
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size_t size = EncodeStateBaseAddress<FamilyType>::getRequiredSizeForStateBaseAddress(*pDevice, container);
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EXPECT_EQ(size, 176ul);
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}
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HWTEST2_F(DG2CommandEncoderTest, givenDG2AndCommandContainerWithDirtyHeapWhenGettingRequiredSizeForStateBaseAddressCommandThenCorrectSizeIsReturned, IsDG2) {
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auto container = CommandContainer();
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container.setHeapDirty(HeapType::SURFACE_STATE);
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size_t size = EncodeStateBaseAddress<FamilyType>::getRequiredSizeForStateBaseAddress(*pDevice, container);
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EXPECT_EQ(size, 192ul);
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}
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HWTEST2_F(DG2CommandEncoderTest, givenInterfaceDescriptorDataWhenForceThreadGroupDispatchSizeVariableIsDefaultThenThreadGroupDispatchSizeIsNotChanged, IsDG2) {
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using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
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INTERFACE_DESCRIPTOR_DATA iddArg;
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iddArg = FamilyType::cmdInitInterfaceDescriptorData;
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const uint32_t forceThreadGroupDispatchSize = -1;
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auto hwInfo = pDevice->getHardwareInfo();
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const auto &hwInfoConfig = *HwInfoConfig::get(productFamily);
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DebugManagerStateRestore restorer;
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DebugManager.flags.ForceThreadGroupDispatchSize.set(forceThreadGroupDispatchSize);
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uint32_t revisions[] = {REVISION_A0, REVISION_B};
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for (auto revision : revisions) {
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hwInfo.platform.usRevId = hwInfoConfig.getHwRevIdFromStepping(revision, hwInfo);
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for (auto numberOfThreadsInGroup : {1u, 4u, 16u}) {
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iddArg.setNumberOfThreadsInGpgpuThreadGroup(numberOfThreadsInGroup);
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EncodeDispatchKernel<FamilyType>::adjustInterfaceDescriptorData(iddArg, hwInfo);
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if (hwInfoConfig.isDisableOverdispatchAvailable(hwInfo)) {
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if (numberOfThreadsInGroup == 1) {
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EXPECT_EQ(2u, iddArg.getThreadGroupDispatchSize());
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} else {
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EXPECT_EQ(3u, iddArg.getThreadGroupDispatchSize());
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}
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} else {
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EXPECT_EQ(0u, iddArg.getThreadGroupDispatchSize());
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}
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}
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}
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}
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@ -0,0 +1,166 @@
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/*
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* Copyright (C) 2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/test/unit_test/encoders/test_encode_dispatch_kernel_dg2_and_later.h"
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#include "shared/source/gmm_helper/gmm_helper.h"
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#include "shared/source/os_interface/hw_info_config.h"
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#include "shared/test/common/cmd_parse/gen_cmd_parse.h"
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#include "shared/test/common/fixtures/command_container_fixture.h"
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#include "shared/test/common/helpers/debug_manager_state_restore.h"
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#include "shared/test/common/mocks/mock_dispatch_kernel_encoder_interface.h"
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#include "test.h"
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#include "hw_cmds.h"
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#include "test_traits_common.h"
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using namespace NEO;
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using CommandEncodeStatesTestDg2AndLater = Test<CommandEncodeStatesFixture>;
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HWTEST2_F(CommandEncodeStatesTestDg2AndLater, givenEventAddressWhenEncodeAndPVCAndDG2ThenSetDataportSubsliceCacheFlushIstSet, IsAtLeastXeHpgCore) {
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using POSTSYNC_DATA = typename FamilyType::POSTSYNC_DATA;
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using WALKER_TYPE = typename FamilyType::WALKER_TYPE;
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uint32_t dims[] = {2, 1, 1};
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std::unique_ptr<MockDispatchKernelEncoder> dispatchInterface(new MockDispatchKernelEncoder());
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uint64_t eventAddress = MemoryConstants::cacheLineSize * 123;
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bool requiresUncachedMocs = false;
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uint32_t partitionCount = 0;
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EncodeDispatchKernel<FamilyType>::encode(*cmdContainer.get(), dims, false, false, dispatchInterface.get(), eventAddress, true, true,
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pDevice, NEO::PreemptionMode::Disabled, requiresUncachedMocs, false, partitionCount,
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false, false);
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GenCmdList commands;
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CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer->getCommandStream()->getCpuBase(), 0), cmdContainer->getCommandStream()->getUsed());
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using WALKER_TYPE = typename FamilyType::WALKER_TYPE;
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auto itor = find<WALKER_TYPE *>(commands.begin(), commands.end());
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ASSERT_NE(itor, commands.end());
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auto cmd = genCmdCast<WALKER_TYPE *>(*itor);
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EXPECT_EQ(true, cmd->getPostSync().getDataportSubsliceCacheFlush());
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}
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HWTEST2_F(CommandEncodeStatesTestDg2AndLater, givenEventAddressWhenEncodeAndDG2ThenMocsIndex2IsSet, IsDG2) {
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using POSTSYNC_DATA = typename FamilyType::POSTSYNC_DATA;
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using WALKER_TYPE = typename FamilyType::WALKER_TYPE;
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uint32_t dims[] = {2, 1, 1};
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std::unique_ptr<MockDispatchKernelEncoder> dispatchInterface(new MockDispatchKernelEncoder());
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uint64_t eventAddress = MemoryConstants::cacheLineSize * 123;
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bool requiresUncachedMocs = false;
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uint32_t partitionCount = 0;
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EncodeDispatchKernel<FamilyType>::encode(*cmdContainer.get(), dims, false, false, dispatchInterface.get(), eventAddress, true, true,
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pDevice, NEO::PreemptionMode::Disabled, requiresUncachedMocs, false, partitionCount,
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false, false);
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GenCmdList commands;
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CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer->getCommandStream()->getCpuBase(), 0), cmdContainer->getCommandStream()->getUsed());
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using WALKER_TYPE = typename FamilyType::WALKER_TYPE;
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auto itor = find<WALKER_TYPE *>(commands.begin(), commands.end());
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ASSERT_NE(itor, commands.end());
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auto cmd = genCmdCast<WALKER_TYPE *>(*itor);
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auto gmmHelper = pDevice->getGmmHelper();
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EXPECT_EQ(gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED), cmd->getPostSync().getMocs());
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}
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HWTEST2_F(CommandEncodeStatesTestDg2AndLater, GivenVariousSlmTotalSizesAndSettingRevIDToDifferentValuesWhenSetAdditionalInfoIsCalledThenCorrectValuesAreSet, IsXeHpgCore) {
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using PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS = typename FamilyType::INTERFACE_DESCRIPTOR_DATA::PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS;
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const std::vector<PreferredSlmTestValues<FamilyType>> valuesToTest = {
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{0, PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_0K},
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{16 * KB, PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_16K},
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{32 * KB, PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_32K},
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//since we can't set 48KB as SLM size for workgroup, we need to ask for 64KB here.
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{64 * KB, PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_64K},
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};
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const std::vector<PreferredSlmTestValues<FamilyType>> valuesToTestForDg2AStep = {
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{0, PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_128K},
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{16 * KB, PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_128K},
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{32 * KB, PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_128K},
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{64 * KB, PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_128K},
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};
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const std::array<REVID, 5> revs{REVISION_A0, REVISION_B, REVISION_C, REVISION_D, REVISION_K};
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auto &hwInfo = *pDevice->getRootDeviceEnvironment().getMutableHardwareInfo();
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for (auto rev : revs) {
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hwInfo.platform.usRevId = HwInfoConfig::get(productFamily)->getHwRevIdFromStepping(rev, hwInfo);
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if ((hwInfo.platform.eProductFamily == IGFX_DG2) && (rev == REVISION_A0)) {
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verifyPreferredSlmValues<FamilyType>(valuesToTestForDg2AStep, hwInfo);
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} else {
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verifyPreferredSlmValues<FamilyType>(valuesToTest, hwInfo);
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}
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}
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}
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HWTEST2_F(CommandEncodeStatesTestDg2AndLater, GivenDebugOverrideWhenSetAdditionalInfoIsCalledThenDebugValuesAreSet, IsAtLeastXeHpgCore) {
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using PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS = typename FamilyType::INTERFACE_DESCRIPTOR_DATA::PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS;
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DebugManagerStateRestore stateRestore;
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PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS debugOverrideValues[] = {PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_0K,
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PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_32K,
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PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_128K};
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for (auto debugOverrideValue : debugOverrideValues) {
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DebugManager.flags.OverridePreferredSlmAllocationSizePerDss.set(debugOverrideValue);
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const std::vector<PreferredSlmTestValues<FamilyType>> valuesToTest = {
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{0, debugOverrideValue},
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{32 * KB, debugOverrideValue},
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{64 * KB, debugOverrideValue},
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};
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verifyPreferredSlmValues<FamilyType>(valuesToTest, hardwareInfo);
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}
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}
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HWTEST2_F(CommandEncodeStatesTestDg2AndLater, givenVariousValuesWhenCallingSetBarrierEnableThenCorrectValuesAreSet, IsAtLeastXeHpgCore) {
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using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
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INTERFACE_DESCRIPTOR_DATA idd = FamilyType::cmdInitInterfaceDescriptorData;
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MockDevice device;
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auto hwInfo = device.getHardwareInfo();
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uint32_t barrierCounts[] = {0, 1, 2, 7};
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for (auto barrierCount : barrierCounts) {
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EncodeDispatchKernel<FamilyType>::programBarrierEnable(idd, barrierCount, hwInfo);
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EXPECT_EQ(barrierCount, idd.getNumberOfBarriers());
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}
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}
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HWTEST2_F(CommandEncodeStatesTestDg2AndLater, givenOverridePreferredSlmAllocationSizePerDssWhenDispatchingKernelThenCorrectValueIsSet, IsAtLeastXeHpgCore) {
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using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
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using WALKER_TYPE = typename FamilyType::WALKER_TYPE;
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using PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS = typename INTERFACE_DESCRIPTOR_DATA::PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS;
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DebugManagerStateRestore restorer;
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DebugManager.flags.OverridePreferredSlmAllocationSizePerDss.set(5);
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uint32_t dims[] = {2, 1, 1};
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std::unique_ptr<MockDispatchKernelEncoder> dispatchInterface(new MockDispatchKernelEncoder());
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uint32_t slmTotalSize = 1;
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EXPECT_CALL(*dispatchInterface.get(), getSlmTotalSize()).WillRepeatedly(::testing::Return(slmTotalSize));
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bool requiresUncachedMocs = false;
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uint32_t partitionCount = 0;
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EncodeDispatchKernel<FamilyType>::encode(*cmdContainer.get(), dims, false, false, dispatchInterface.get(), 0, false, false,
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pDevice, NEO::PreemptionMode::Disabled, requiresUncachedMocs, false, partitionCount,
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false, false);
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GenCmdList commands;
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CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer->getCommandStream()->getCpuBase(), 0), cmdContainer->getCommandStream()->getUsed());
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auto itor = find<WALKER_TYPE *>(commands.begin(), commands.end());
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ASSERT_NE(itor, commands.end());
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auto cmd = genCmdCast<WALKER_TYPE *>(*itor);
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auto &idd = cmd->getInterfaceDescriptor();
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EXPECT_EQ(PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS::PREFERRED_SLM_SIZE_IS_128K, idd.getPreferredSlmAllocationSizePerDss());
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}
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@ -0,0 +1,59 @@
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/*
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* Copyright (C) 2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/command_container/command_encoder.h"
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#include "shared/source/helpers/hw_info.h"
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#include "shared/source/kernel/dispatch_kernel_encoder_interface.h"
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#include "test.h"
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#include "hw_cmds.h"
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template <typename FamilyType>
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struct PreferredSlmTestValues {
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uint32_t preferredSlmAllocationSizePerDss;
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typename FamilyType::INTERFACE_DESCRIPTOR_DATA::PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS expectedValueInIdd;
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};
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template <typename FamilyType>
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void verifyPreferredSlmValues(std::vector<PreferredSlmTestValues<FamilyType>> valuesToTest, NEO::HardwareInfo &hwInfo) {
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using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
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using PREFERRED_SLM_SIZE_OVERRIDE = typename INTERFACE_DESCRIPTOR_DATA::PREFERRED_SLM_SIZE_OVERRIDE;
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using PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS = typename INTERFACE_DESCRIPTOR_DATA::PREFERRED_SLM_ALLOCATION_SIZE_PER_DSS;
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auto threadsPerDssCount = hwInfo.gtSystemInfo.ThreadCount / hwInfo.gtSystemInfo.SubSliceCount;
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uint32_t localWorkGroupsPerDssCounts[] = {1, 2, 4};
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INTERFACE_DESCRIPTOR_DATA idd = FamilyType::cmdInitInterfaceDescriptorData;
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EXPECT_EQ(0u, idd.getPreferredSlmAllocationSizePerDss());
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EXPECT_EQ(PREFERRED_SLM_SIZE_OVERRIDE::PREFERRED_SLM_SIZE_OVERRIDE_IS_DISABLED, idd.getPreferredSlmSizeOverride());
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const std::array<NEO::SlmPolicy, 3> slmPolicies = {
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NEO::SlmPolicy::SlmPolicyNone,
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NEO::SlmPolicy::SlmPolicyLargeSlm,
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NEO::SlmPolicy::SlmPolicyLargeData};
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|
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for (auto localWorkGroupsPerDssCount : localWorkGroupsPerDssCounts) {
|
||||
for (auto &valueToTest : valuesToTest) {
|
||||
for (auto slmPolicy : slmPolicies) {
|
||||
auto threadsPerThreadGroup = threadsPerDssCount / localWorkGroupsPerDssCount;
|
||||
auto slmTotalSize = (slmPolicy == NEO::SlmPolicy::SlmPolicyLargeData)
|
||||
? valueToTest.preferredSlmAllocationSizePerDss
|
||||
: valueToTest.preferredSlmAllocationSizePerDss / localWorkGroupsPerDssCount;
|
||||
|
||||
NEO::EncodeDispatchKernel<FamilyType>::appendAdditionalIDDFields(&idd,
|
||||
hwInfo,
|
||||
threadsPerThreadGroup,
|
||||
slmTotalSize,
|
||||
slmPolicy);
|
||||
|
||||
EXPECT_EQ(valueToTest.expectedValueInIdd, idd.getPreferredSlmAllocationSizePerDss());
|
||||
EXPECT_EQ(PREFERRED_SLM_SIZE_OVERRIDE::PREFERRED_SLM_SIZE_OVERRIDE_IS_ENABLED, idd.getPreferredSlmSizeOverride());
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
|
@ -0,0 +1,12 @@
|
|||
/*
|
||||
* Copyright (C) 2021 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
*/
|
||||
|
||||
#include "shared/test/common/fixtures/implicit_scaling_fixture.h"
|
||||
|
||||
HWTEST2_F(ImplicitScalingTests, GivenXeHpgWhenCheckingPipeControlStallRequiredThenExpectTrue, IsXeHpgCore) {
|
||||
EXPECT_TRUE(ImplicitScalingDispatch<FamilyType>::getPipeControlStallRequired());
|
||||
}
|
|
@ -9,5 +9,12 @@ set(NEO_CORE_PREAMBLE_TESTS
|
|||
${CMAKE_CURRENT_SOURCE_DIR}/preamble_fixture.h
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/preamble_tests.cpp
|
||||
)
|
||||
|
||||
if(TESTS_XE_HPG_CORE)
|
||||
list(APPEND NEO_CORE_PREAMBLE_TESTS
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/test_preamble_xe_hpg_core.cpp
|
||||
)
|
||||
endif()
|
||||
|
||||
target_sources(${TARGET_NAME} PRIVATE ${NEO_CORE_PREAMBLE_TESTS})
|
||||
add_subdirectories()
|
||||
|
|
|
@ -0,0 +1,47 @@
|
|||
/*
|
||||
* Copyright (C) 2021 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
*/
|
||||
|
||||
#include "shared/source/command_stream/preemption.h"
|
||||
#include "shared/source/command_stream/stream_properties.h"
|
||||
#include "shared/source/debug_settings/debug_settings_manager.h"
|
||||
#include "shared/source/gen_common/reg_configs_common.h"
|
||||
#include "shared/source/helpers/preamble.h"
|
||||
#include "shared/source/utilities/stackvec.h"
|
||||
#include "shared/test/common/cmd_parse/hw_parse.h"
|
||||
|
||||
#include "test.h"
|
||||
|
||||
using PreambleTest = ::testing::Test;
|
||||
|
||||
using namespace NEO;
|
||||
|
||||
HWTEST2_F(PreambleTest, whenKernelDebuggingCommandsAreProgrammedThenCorrectCommandsArePlacedIntoStream, IsXeHpgCore) {
|
||||
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
|
||||
|
||||
auto bufferSize = PreambleHelper<FamilyType>::getKernelDebuggingCommandsSize(true);
|
||||
auto buffer = std::unique_ptr<char[]>(new char[bufferSize]);
|
||||
|
||||
LinearStream stream(buffer.get(), bufferSize);
|
||||
PreambleHelper<FamilyType>::programKernelDebugging(&stream);
|
||||
|
||||
HardwareParse hwParser;
|
||||
hwParser.parseCommands<FamilyType>(stream);
|
||||
auto cmdList = hwParser.getCommandsList<MI_LOAD_REGISTER_IMM>();
|
||||
|
||||
ASSERT_EQ(2u, cmdList.size());
|
||||
|
||||
auto it = cmdList.begin();
|
||||
|
||||
MI_LOAD_REGISTER_IMM *pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
|
||||
EXPECT_EQ(0x20d8u, pCmd->getRegisterOffset());
|
||||
EXPECT_EQ((1u << 5) | (1u << 21), pCmd->getDataDword());
|
||||
it++;
|
||||
|
||||
pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
|
||||
EXPECT_EQ(0xe400u, pCmd->getRegisterOffset());
|
||||
EXPECT_EQ((1u << 7) | (1u << 4) | (1u << 2) | (1u << 0), pCmd->getDataDword());
|
||||
}
|
Loading…
Reference in New Issue