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https://github.com/intel/compute-runtime.git
synced 2025-09-15 13:01:45 +08:00
Change DG2 l1 cache policy to WB
With compiler LSC WAs this gives better performance. If debugger is active, policy will not be changed ie. will be WBP. Related-To: NEO-7003 Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
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Compute-Runtime-Automation

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6118e41741
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8cc0177f1c
@ -46,7 +46,7 @@ HWTEST2_F(CacheFlushTestsDg2AndLater, WhenProgrammingCacheFlushAfterWalkerThenEx
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if constexpr (FamilyType::isUsingL3Control) {
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using L3_CONTROL = typename FamilyType::L3_CONTROL;
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expectedCommands.push_back(new MatchHwCmd<FamilyType, L3_CONTROL>(
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1, Expects{EXPECT_MEMBER(L3_CONTROL, getUnTypedDataPortCacheFlush, false)}));
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1, Expects{EXPECT_MEMBER(L3_CONTROL, getUnTypedDataPortCacheFlush, true)}));
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}
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bool cmdBuffOk = expectCmdBuff<FamilyType>(cmdQ.getCS(0), 0, std::move(expectedCommands), &err);
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@ -1743,7 +1743,7 @@ TEST_F(ProgramTests, whenGetInternalOptionsThenLSCPolicyIsSet) {
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MockProgram program(pContext, false, toClDeviceVector(*pClDevice));
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auto internalOptions = program.getInternalOptions();
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const auto &compilerHwInfoConfig = *CompilerHwInfoConfig::get(defaultHwInfo->platform.eProductFamily);
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auto expectedPolicy = compilerHwInfoConfig.getCachingPolicyOptions();
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auto expectedPolicy = compilerHwInfoConfig.getCachingPolicyOptions(false);
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if (expectedPolicy != nullptr) {
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EXPECT_TRUE(CompilerOptions::contains(internalOptions, expectedPolicy));
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} else {
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@ -12,3 +12,7 @@ HWTEST_EXCLUDE_PRODUCT(HwInfoConfigTestXeHpAndLater, givenXeHPAndLaterPlatformWh
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HWTEST_EXCLUDE_PRODUCT(WddmMemoryManagerSimpleTest, givenLinearStreamWhenItIsAllocatedThenItIsInLocalMemoryHasCpuPointerAndHasStandardHeap64kbAsGpuAddress, IGFX_DG2);
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HWTEST_EXCLUDE_PRODUCT(HwHelperTestXeHPAndLater, GiveCcsNodeThenDefaultEngineTypeIsCcs, IGFX_DG2);
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HWTEST_EXCLUDE_PRODUCT(XeHPAndLaterDeviceCapsTests, givenHwInfoWhenRequestedComputeUnitsUsedForScratchThenReturnValidValue, IGFX_DG2);
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HWTEST_EXCLUDE_PRODUCT(ProgramTests, givenAtLeastXeHpgCoreWhenGetInternalOptionsThenCorrectBuildOptionIsSet_IsAtLeastXeHpgCore, IGFX_DG2);
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HWTEST_EXCLUDE_PRODUCT(CmdsProgrammingTestsXeHpgCore, givenL3ToL1DebugFlagWhenStatelessMocsIsProgrammedThenItHasL1CachingOn, IGFX_DG2);
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HWTEST_EXCLUDE_PRODUCT(CmdsProgrammingTestsXeHpgCore, givenAlignedCacheableReadOnlyBufferThenChoseOclBufferConstPolicy, IGFX_DG2);
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HWTEST_EXCLUDE_PRODUCT(CmdsProgrammingTestsXeHpgCore, whenAppendingRssThenProgramWBPL1CachePolicy, IGFX_DG2);
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@ -37,10 +37,27 @@ DG2TEST_F(CmdsProgrammingTestsDg2, givenL3ToL1DebugFlagWhenStatelessMocsIsProgra
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auto stateBaseAddress = static_cast<STATE_BASE_ADDRESS *>(hwParserCsr.cmdStateBaseAddress);
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auto actualL1CachePolocy = static_cast<uint8_t>(stateBaseAddress->getL1CachePolicyL1CacheControl());
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EXPECT_EQ(stateBaseAddress->getL1CachePolicyL1CacheControl(), STATE_BASE_ADDRESS::L1_CACHE_POLICY_WB);
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}
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const uint8_t expectedL1CachePolicy = FamilyType::STATE_BASE_ADDRESS::L1_CACHE_POLICY_WBP;
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EXPECT_EQ(expectedL1CachePolicy, actualL1CachePolocy);
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DG2TEST_F(CmdsProgrammingTestsDg2, givenL3ToL1DebugFlagAndDebuggerActiveWhenStatelessMocsIsProgrammedThenItHasCorrectL1CachingOn) {
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using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
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DebugManagerStateRestore restore;
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DebugManager.flags.ForceL1Caching.set(1u);
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pDevice->setDebuggerActive(true);
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auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
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flushTask(commandStreamReceiver);
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HardwareParse hwParserCsr;
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hwParserCsr.parseCommands<FamilyType>(commandStreamReceiver.commandStream, 0);
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hwParserCsr.findHardwareCommands<FamilyType>();
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ASSERT_NE(nullptr, hwParserCsr.cmdStateBaseAddress);
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auto stateBaseAddress = static_cast<STATE_BASE_ADDRESS *>(hwParserCsr.cmdStateBaseAddress);
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EXPECT_EQ(stateBaseAddress->getL1CachePolicyL1CacheControl(), STATE_BASE_ADDRESS::L1_CACHE_POLICY_WBP);
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}
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DG2TEST_F(CmdsProgrammingTestsDg2, whenAppendingRssThenProgramWBPL1CachePolicy) {
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@ -69,7 +86,10 @@ DG2TEST_F(CmdsProgrammingTestsDg2, whenAppendingRssThenProgramWBPL1CachePolicy)
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args.areMultipleSubDevicesInContext = true;
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EncodeSurfaceState<FamilyType>::encodeBuffer(args);
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EXPECT_EQ(FamilyType::RENDER_SURFACE_STATE::L1_CACHE_POLICY_WB, rssCmd.getL1CachePolicyL1CacheControl());
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args.isDebuggerActive = true;
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EncodeSurfaceState<FamilyType>::encodeBuffer(args);
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EXPECT_EQ(FamilyType::RENDER_SURFACE_STATE::L1_CACHE_POLICY_WBP, rssCmd.getL1CachePolicyL1CacheControl());
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}
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@ -95,10 +115,35 @@ DG2TEST_F(CmdsProgrammingTestsDg2, givenAlignedCacheableReadOnlyBufferThenChoseO
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const auto actualMocs = surfaceState.getMemoryObjectControlState();
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EXPECT_EQ(expectedMocs, actualMocs);
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auto actualL1CachePolocy = static_cast<uint8_t>(surfaceState.getL1CachePolicyL1CacheControl());
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EXPECT_EQ(surfaceState.getL1CachePolicyL1CacheControl(), FamilyType::RENDER_SURFACE_STATE::L1_CACHE_POLICY_WB);
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const uint8_t expectedL1CachePolicy = FamilyType::STATE_BASE_ADDRESS::L1_CACHE_POLICY_WBP;
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EXPECT_EQ(expectedL1CachePolicy, actualL1CachePolocy);
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alignedFree(ptr);
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}
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DG2TEST_F(CmdsProgrammingTestsDg2, givenAlignedCacheableReadOnlyBufferAndDebuggerActiveWhenBufferCreateThenChoseOclBufferConstPolicy) {
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MockContext context;
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const_cast<DeviceInfo &>(context.getDevice(0)->getDevice().getDeviceInfo()).debuggerActive = true;
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const auto size = MemoryConstants::pageSize;
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const auto ptr = (void *)alignedMalloc(size * 2, MemoryConstants::pageSize);
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const auto flags = CL_MEM_USE_HOST_PTR | CL_MEM_READ_ONLY;
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auto retVal = CL_SUCCESS;
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auto buffer = std::unique_ptr<Buffer>(Buffer::create(
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&context,
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flags,
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size,
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ptr,
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retVal));
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EXPECT_EQ(CL_SUCCESS, retVal);
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typename FamilyType::RENDER_SURFACE_STATE surfaceState = {};
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buffer->setArgStateful(&surfaceState, false, false, false, false, context.getDevice(0)->getDevice(), false, false);
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const auto expectedMocs = context.getDevice(0)->getGmmHelper()->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST);
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const auto actualMocs = surfaceState.getMemoryObjectControlState();
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EXPECT_EQ(expectedMocs, actualMocs);
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EXPECT_EQ(surfaceState.getL1CachePolicyL1CacheControl(), FamilyType::RENDER_SURFACE_STATE::L1_CACHE_POLICY_WBP);
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alignedFree(ptr);
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}
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