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Add flush prior to blit operation 

Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
This commit is contained in:
Kamil Diedrich 2021-01-28 11:01:51 +01:00 committed by Compute-Runtime-Automation
parent afffedebb2
commit 93f15c05f6
9 changed files with 143 additions and 11 deletions
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29
opencl/test/unit_test/command_stream/command_stream_receiver_hw_1_tests.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2020 Intel Corporation
* Copyright (C) 2018-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -601,6 +601,10 @@ HWTEST_F(BcsTests, givenBlitPropertiesContainerWhenEstimatingCommandsSizeThenCal
auto expectedBlitInstructionsSize = cmdsSizePerBlit * numberOfBlts;
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedBlitInstructionsSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto expectedAlignedSize = baseSize + MemorySynchronizationCommands<FamilyType>::getSizeForAdditonalSynchronization(pDevice->getHardwareInfo());
BlitPropertiesContainer blitPropertiesContainer;
@ -635,6 +639,10 @@ HWTEST_F(BcsTests, givenBlitPropertiesContainerWhenDirectsubmissionEnabledEstima
auto expectedBlitInstructionsSize = cmdsSizePerBlit * numberOfBlts;
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedBlitInstructionsSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto expectedAlignedSize = baseSize + MemorySynchronizationCommands<FamilyType>::getSizeForAdditonalSynchronization(pDevice->getHardwareInfo());
BlitPropertiesContainer blitPropertiesContainer;
@ -668,6 +676,10 @@ HWTEST_F(BcsTests, givenBlitPropertiesContainerWhenEstimatingCommandsSizeForWrit
auto baseSize = EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite() + sizeof(typename FamilyType::MI_BATCH_BUFFER_END);
auto expectedBlitInstructionsSize = cmdsSizePerBlit * numberOfBlts;
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedBlitInstructionsSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto expectedAlignedSize = baseSize + MemorySynchronizationCommands<FamilyType>::getSizeForAdditonalSynchronization(pDevice->getHardwareInfo());
BlitPropertiesContainer blitPropertiesContainer;
@ -701,6 +713,10 @@ HWTEST_F(BcsTests, givenBlitPropertiesContainerWhenDirectSubmissionEnabledEstima
auto baseSize = EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite() + sizeof(typename FamilyType::MI_BATCH_BUFFER_START);
auto expectedBlitInstructionsSize = cmdsSizePerBlit * numberOfBlts;
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedBlitInstructionsSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto expectedAlignedSize = baseSize + MemorySynchronizationCommands<FamilyType>::getSizeForAdditonalSynchronization(pDevice->getHardwareInfo());
BlitPropertiesContainer blitPropertiesContainer;
@ -726,6 +742,9 @@ HWTEST_F(BcsTests, givenTimestampPacketWriteRequestWhenEstimatingSizeForCommands
if (BlitCommandsHelper<FamilyType>::miArbCheckWaRequired()) {
expectedBaseSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedBaseSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto expectedSizeWithTimestampPacketWrite = expectedBaseSize + EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
auto expectedSizeWithoutTimestampPacketWrite = expectedBaseSize;
@ -747,6 +766,10 @@ HWTEST_F(BcsTests, givenTimestampPacketWriteRequestWhenEstimatingSizeForCommands
expectedBaseSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedBaseSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto expectedSizeWithTimestampPacketWriteAndProfiling = expectedBaseSize + 4 * sizeof(typename FamilyType::MI_STORE_REGISTER_MEM);
auto estimatedSizeWithTimestampPacketWrite = BlitCommandsHelper<FamilyType>::estimateBlitCommandsSize(
@ -777,6 +800,10 @@ HWTEST_F(BcsTests, givenBltSizeAndCsrDependenciesWhenEstimatingCommandSizeThenAd
size_t expectedSize = (cmdsSizePerBlit * numberOfBlts) +
TimestampPacketHelper::getRequiredCmdStreamSize<FamilyType>(csrDependencies);
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto estimatedSize = BlitCommandsHelper<FamilyType>::estimateBlitCommandsSize(
{1, 1, 1}, csrDependencies, false, false, pClDevice->getRootDeviceEnvironment());

18
opencl/test/unit_test/command_stream/command_stream_receiver_hw_2_tests.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2020 Intel Corporation
* Copyright (C) 2018-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -44,6 +44,12 @@ HWTEST_F(BcsTests, givenBltSizeWhenEstimatingCommandSizeThenAddAllRequiredComman
auto expectedAlignedSize = cmdsSizePerBlit * alignedNumberOfBlts;
auto expectedNotAlignedSize = cmdsSizePerBlit * notAlignedNumberOfBlts;
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedAlignedSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
expectedNotAlignedSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto alignedCopySize = Vec3<size_t>{alignedBltSize, 1, 1};
auto notAlignedCopySize = Vec3<size_t>{notAlignedBltSize, 1, 1};
@ -103,6 +109,11 @@ HWTEST_F(BcsTests, givenBltSizeWhenEstimatingCommandSizeForReadBufferRectThenAdd
auto expectedAlignedSize = cmdsSizePerBlit * alignedNumberOfBlts;
auto expectedNotAlignedSize = cmdsSizePerBlit * notAlignedNumberOfBlts;
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedAlignedSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
expectedNotAlignedSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto alignedEstimatedSize = BlitCommandsHelper<FamilyType>::estimateBlitCommandsSize(
alignedBltSize, csrDependencies, false, false, pClDevice->getRootDeviceEnvironment());
auto notAlignedEstimatedSize = BlitCommandsHelper<FamilyType>::estimateBlitCommandsSize(
@ -136,6 +147,11 @@ HWTEST_F(BcsTests, givenBltWithBigCopySizeWhenEstimatingCommandSizeForReadBuffer
auto expectedAlignedSize = cmdsSizePerBlit * alignedNumberOfBlts;
auto expectedNotAlignedSize = cmdsSizePerBlit * notAlignedNumberOfBlts;
if (BlitCommandsHelper<FamilyType>::preBlitCommandWARequired()) {
expectedAlignedSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
expectedNotAlignedSize += EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite();
}
auto alignedEstimatedSize = BlitCommandsHelper<FamilyType>::estimateBlitCommandsSize(
alignedBltSize, csrDependencies, false, false, rootDeviceEnvironment);
auto notAlignedEstimatedSize = BlitCommandsHelper<FamilyType>::estimateBlitCommandsSize(

3
opencl/test/unit_test/mem_obj/buffer_bcs_tests.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2020 Intel Corporation
* Copyright (C) 2020-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -827,7 +827,6 @@ HWTEST_TEMPLATED_F(BcsBufferTests, givenOutputTimestampPacketWhenBlitCalledThenP
bool blitCmdFound = false;
for (auto &cmd : hwParser.cmdList) {
if (auto miFlushDwCmd = genCmdCast<MI_FLUSH_DW *>(cmd)) {
EXPECT_TRUE(blitCmdFound);
if (miFlushDwCmd->getDestinationAddress() == 0) {
continue;
}

7
shared/source/gen12lp/command_stream_receiver_hw_gen12lp.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2020 Intel Corporation
* Copyright (C) 2019-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -153,6 +153,11 @@ void BlitCommandsHelper<Family>::appendBlitCommandsForFillBuffer(NEO::GraphicsAl
template <>
void BlitCommandsHelper<Family>::appendTilingEnable(typename Family::XY_COLOR_BLT &blitCmd) {}
template <>
bool BlitCommandsHelper<Family>::preBlitCommandWARequired() {
return true;
}
template class CommandStreamReceiverHw<Family>;
template struct BlitCommandsHelper<Family>;

5
shared/source/helpers/blit_commands_helper.h
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2020 Intel Corporation
* Copyright (C) 2019-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -114,6 +114,8 @@ struct BlitCommandsHelper {
static uint64_t getMaxBlitWidthOverride(const RootDeviceEnvironment &rootDeviceEnvironment);
static uint64_t getMaxBlitHeight(const RootDeviceEnvironment &rootDeviceEnvironment);
static uint64_t getMaxBlitHeightOverride(const RootDeviceEnvironment &rootDeviceEnvironment);
static void dispatchPreBlitCommand(LinearStream &linearStream);
static size_t estimatePreBlitCommandSize();
static void dispatchPostBlitCommand(LinearStream &linearStream);
static size_t estimatePostBlitCommandSize();
static size_t estimateBlitCommandsSize(const Vec3<size_t> &copySize, const CsrDependencies &csrDependencies, bool updateTimestampPacket,
@ -152,6 +154,7 @@ struct BlitCommandsHelper {
static void programGlobalSequencerFlush(LinearStream &commandStream);
static size_t getSizeForGlobalSequencerFlush();
static bool miArbCheckWaRequired();
static bool preBlitCommandWARequired();
static void appendClearColor(const BlitProperties &blitProperties, typename GfxFamily::XY_COPY_BLT &blitCmd);
};
} // namespace NEO

30
shared/source/helpers/blit_commands_helper_base.inl
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2020 Intel Corporation
* Copyright (C) 2019-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -40,6 +40,22 @@ uint64_t BlitCommandsHelper<GfxFamily>::getMaxBlitHeight(const RootDeviceEnviron
return BlitterConstants::maxBlitHeight;
}
template <typename GfxFamily>
void BlitCommandsHelper<GfxFamily>::dispatchPreBlitCommand(LinearStream &linearStream) {
if (BlitCommandsHelper<GfxFamily>::preBlitCommandWARequired()) {
EncodeMiFlushDW<GfxFamily>::programMiFlushDw(linearStream, 0, 0, false, false);
}
}
template <typename GfxFamily>
size_t BlitCommandsHelper<GfxFamily>::estimatePreBlitCommandSize() {
if (BlitCommandsHelper<GfxFamily>::preBlitCommandWARequired()) {
return EncodeMiFlushDW<GfxFamily>::getMiFlushDwCmdSizeForDataWrite();
}
return 0u;
}
template <typename GfxFamily>
void BlitCommandsHelper<GfxFamily>::dispatchPostBlitCommand(LinearStream &linearStream) {
if (DebugManager.flags.PostBlitCommand.get() != BlitterConstants::PostBlitMode::Default) {
@ -100,7 +116,7 @@ size_t BlitCommandsHelper<GfxFamily>::estimateBlitCommandsSize(const Vec3<size_t
auto sizePerBlit = (sizeof(typename GfxFamily::XY_COPY_BLT) + estimatePostBlitCommandSize());
return TimestampPacketHelper::getRequiredCmdStreamSize<GfxFamily>(csrDependencies) + (sizePerBlit * nBlits) + timestampCmdSize;
return TimestampPacketHelper::getRequiredCmdStreamSize<GfxFamily>(csrDependencies) + (sizePerBlit * nBlits) + timestampCmdSize + estimatePreBlitCommandSize();
}
template <typename GfxFamily>
@ -156,6 +172,8 @@ void BlitCommandsHelper<GfxFamily>::dispatchBlitCommandsForBufferPerRow(const Bl
PRINT_DEBUG_STRING(DebugManager.flags.PrintBlitDispatchDetails.get(), stdout,
"\nBlit dispatch with AuxTranslationDirection %u ", static_cast<uint32_t>(blitProperties.auxTranslationDirection));
dispatchPreBlitCommand(linearStream);
for (uint64_t slice = 0; slice < blitProperties.copySize.z; slice++) {
for (uint64_t row = 0; row < blitProperties.copySize.y; row++) {
uint64_t offset = 0;
@ -267,6 +285,7 @@ void BlitCommandsHelper<GfxFamily>::dispatchBlitCommandsRegion(const BlitPropert
appendBlitCommandsForImages(blitProperties, bltCmd, rootDeviceEnvironment, srcSlicePitch, dstSlicePitch);
appendColorDepth(blitProperties, bltCmd);
appendSurfaceType(blitProperties, bltCmd);
dispatchPreBlitCommand(linearStream);
for (uint32_t i = 0; i < blitProperties.copySize.z; i++) {
appendSliceOffsets(blitProperties, bltCmd, i, rootDeviceEnvironment, srcSlicePitch, dstSlicePitch);
auto cmd = linearStream.getSpaceForCmd<typename GfxFamily::XY_COPY_BLT>();
@ -341,6 +360,8 @@ void BlitCommandsHelper<GfxFamily>::dispatchBlitCommandsForBufferRegion(const Bl
const auto maxWidthToCopy = getMaxBlitWidth(rootDeviceEnvironment);
const auto maxHeightToCopy = getMaxBlitHeight(rootDeviceEnvironment);
dispatchPreBlitCommand(linearStream);
for (size_t slice = 0u; slice < blitProperties.copySize.z; ++slice) {
auto srcAddress = calculateBlitCommandSourceBaseAddressCopyRegion(blitProperties, slice);
auto dstAddress = calculateBlitCommandDestinationBaseAddressCopyRegion(blitProperties, slice);
@ -428,6 +449,11 @@ size_t BlitCommandsHelper<GfxFamily>::getNumberOfBlitsForCopyPerRow(const Vec3<s
return nBlits;
}
template <typename GfxFamily>
bool BlitCommandsHelper<GfxFamily>::preBlitCommandWARequired() {
return false;
}
template <typename GfxFamily>
void BlitCommandsHelper<GfxFamily>::appendExtraMemoryProperties(typename GfxFamily::XY_COPY_BLT &blitCmd, const RootDeviceEnvironment &rootDeviceEnvironment) {}

27
shared/test/unit_test/helpers/blit_commands_helper_tests.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2017-2020 Intel Corporation
* Copyright (C) 2017-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -9,6 +9,7 @@
#include "shared/source/command_container/command_encoder.h"
#include "shared/source/helpers/blit_commands_helper.h"
#include "shared/test/unit_test/cmd_parse/hw_parse.h"
#include "shared/test/unit_test/fixtures/device_fixture.h"
#include "shared/test/unit_test/helpers/debug_manager_state_restore.h"
#include "shared/test/unit_test/mocks/mock_graphics_allocation.h"
@ -512,3 +513,27 @@ HWTEST2_F(BlitTests, givenAllocDimsLowerThanMaxSizesWhenCheckingIfOneCommandCanB
bool useOneCommand = NEO::BlitCommandsHelper<FamilyType>::useOneBlitCopyCommand(copySize, bytesPerPixel);
EXPECT_TRUE(useOneCommand);
}
using WithoutGen12Lp = IsNotGfxCore<IGFX_GEN12LP_CORE>;
HWTEST2_F(BlitTests, givenPlatformWhenCallingPreBlitCommandWARequiredThenReturnsFalse, WithoutGen12Lp) {
EXPECT_FALSE(BlitCommandsHelper<FamilyType>::preBlitCommandWARequired());
}
HWTEST2_F(BlitTests, givenPlatformWhenCallingEstimatePreBlitCommandSizeThenZeroIsReturned, WithoutGen12Lp) {
using MI_FLUSH_DW = typename FamilyType::MI_FLUSH_DW;
EXPECT_EQ(0u, BlitCommandsHelper<FamilyType>::estimatePreBlitCommandSize());
}
HWTEST2_F(BlitTests, givenPlatformWhenCallingDispatchPreBlitCommandThenNoneMiFlushDwIsProgramed, WithoutGen12Lp) {
using MI_FLUSH_DW = typename FamilyType::MI_FLUSH_DW;
auto miFlushBuffer = std::make_unique<MI_FLUSH_DW>();
LinearStream linearStream(miFlushBuffer.get(), EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite());
BlitCommandsHelper<FamilyType>::dispatchPreBlitCommand(linearStream);
HardwareParse hwParser;
hwParser.parseCommands<FamilyType>(linearStream);
auto cmdIterator = find<typename FamilyType::MI_FLUSH_DW *>(hwParser.cmdList.begin(), hwParser.cmdList.end());
ASSERT_EQ(hwParser.cmdList.end(), cmdIterator);
}

25
shared/test/unit_test/helpers/blit_commands_helper_tests_gen12lp.cpp
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@ -1,11 +1,12 @@
/*
* Copyright (C) 2020 Intel Corporation
* Copyright (C) 2020-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/helpers/blit_commands_helper.h"
#include "shared/test/unit_test/cmd_parse/hw_parse.h"
#include "shared/test/unit_test/fixtures/device_fixture.h"
#include "shared/test/unit_test/helpers/blit_commands_helper_tests.inl"
#include "shared/test/unit_test/helpers/debug_manager_state_restore.h"
@ -240,3 +241,25 @@ HWTEST2_F(BlitTests, givenBlitCommandWhenAppendClearColorCalledThenNothingHappen
BlitCommandsHelper<FamilyType>::appendClearColor(properties, bltCmd);
EXPECT_EQ(0, std::memcmp(&expectedBlitCmd, &bltCmd, sizeof(bltCmd)));
}
HWTEST2_F(BlitTests, givenGen12LpPlatformWhenPreBlitCommandWARequiredThenReturnsTrue, IsGen12LP) {
EXPECT_TRUE(BlitCommandsHelper<FamilyType>::preBlitCommandWARequired());
}
HWTEST2_F(BlitTests, givenGen12LpPlatformWhenEstimatePreBlitCommandSizeThenSizeOfFlushIsReturned, IsGen12LP) {
using MI_FLUSH_DW = typename FamilyType::MI_FLUSH_DW;
EXPECT_EQ(EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite(), BlitCommandsHelper<FamilyType>::estimatePreBlitCommandSize());
}
HWTEST2_F(BlitTests, givenGen12LpPlatformWhenDispatchPreBlitCommandThenMiFlushDwIsProgramed, IsGen12LP) {
using MI_FLUSH_DW = typename FamilyType::MI_FLUSH_DW;
auto miFlushBuffer = std::make_unique<MI_FLUSH_DW>();
LinearStream linearStream(miFlushBuffer.get(), EncodeMiFlushDW<FamilyType>::getMiFlushDwCmdSizeForDataWrite());
BlitCommandsHelper<FamilyType>::dispatchPreBlitCommand(linearStream);
HardwareParse hwParser;
hwParser.parseCommands<FamilyType>(linearStream);
auto cmdIterator = find<typename FamilyType::MI_FLUSH_DW *>(hwParser.cmdList.begin(), hwParser.cmdList.end());
ASSERT_NE(hwParser.cmdList.end(), cmdIterator);
}

10
shared/test/unit_test/test_macros/header/test.h
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2017-2020 Intel Corporation
* Copyright (C) 2017-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -1025,6 +1025,14 @@ struct AreNotGfxCores {
}
};
template <GFXCORE_FAMILY gfxCoreFamily>
struct IsNotGfxCore {
template <PRODUCT_FAMILY productFamily>
static constexpr bool isMatched() {
return NEO::ToGfxCoreFamily<productFamily>::get() != gfxCoreFamily;
}
};
template <GFXCORE_FAMILY gfxCoreFamily>
struct IsAtMostGfxCore {
template <PRODUCT_FAMILY productFamily>