Refactor ULTs and AUB tests around HW commands

Change-Id: Ie00822b9e0864af6ede3e967039efa911d1dbb6f
This commit is contained in:
Zdanowicz, Zbigniew 2018-05-21 16:41:58 +02:00 committed by sys_ocldev
parent 80f11d1ac2
commit 996cb52370
8 changed files with 159 additions and 111 deletions

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@ -76,7 +76,7 @@ struct AUBHelloWorld
}
};
HWTEST_F(AUBHelloWorld, simple) {
HWCMDTEST_F(IGFX_GEN8_CORE, AUBHelloWorld, simple) {
typedef typename FamilyType::GPGPU_WALKER GPGPU_WALKER;
typedef typename FamilyType::STATE_BASE_ADDRESS STATE_BASE_ADDRESS;
typedef typename FamilyType::MEDIA_INTERFACE_DESCRIPTOR_LOAD MEDIA_INTERFACE_DESCRIPTOR_LOAD;
@ -209,7 +209,7 @@ struct AUBSimpleArg
}
};
HWTEST_F(AUBSimpleArg, simple) {
HWCMDTEST_F(IGFX_GEN8_CORE, AUBSimpleArg, simple) {
typedef typename FamilyType::GPGPU_WALKER GPGPU_WALKER;
typedef typename FamilyType::STATE_BASE_ADDRESS STATE_BASE_ADDRESS;
typedef typename FamilyType::MEDIA_INTERFACE_DESCRIPTOR_LOAD MEDIA_INTERFACE_DESCRIPTOR_LOAD;
@ -264,7 +264,7 @@ HWTEST_F(AUBSimpleArg, simple) {
EXPECT_EQ(0, memcmp(pISA, pExpectedISA, expectedSize));
}
HWTEST_F(AUBSimpleArg, givenAubCommandStreamerReceiverWhenBatchBufferFlateningIsForcedThenDumpedAubIsStillValid) {
HWCMDTEST_F(IGFX_GEN8_CORE, AUBSimpleArg, givenAubCommandStreamerReceiverWhenBatchBufferFlateningIsForcedThenDumpedAubIsStillValid) {
cl_uint workDim = 1;
size_t globalWorkOffset[3] = {0, 0, 0};

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@ -975,12 +975,14 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, blockingFlushTaskWithOnlyPipeContr
HWTEST_F(CommandStreamReceiverFlushTaskTests, FlushTaskBlockingHasPipeControlWithDCFlush) {
WhitelistedRegisters forceRegs = {0};
pDevice->setForceWhitelistedRegs(true, &forceRegs);
typedef typename FamilyType::PIPE_CONTROL PIPE_CONTROL;
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
CommandQueueHw<FamilyType> commandQueue(nullptr, pDevice, 0);
configureCSRtoNonDirtyState<FamilyType>();
auto &commandStreamReceiver = pDevice->getCommandStreamReceiver();
size_t pipeControlCount = static_cast<CommandStreamReceiverHw<FamilyType> &>(commandStreamReceiver).getRequiredPipeControlSize() / sizeof(PIPE_CONTROL);
auto &commandStreamTask = commandQueue.getCS();
DispatchFlags dispatchFlags;
@ -1007,14 +1009,16 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, FlushTaskBlockingHasPipeControlWit
auto pCmdWA = reinterpret_cast<PIPE_CONTROL *>(*itorPC);
EXPECT_EQ(true, pCmdWA->getDcFlushEnable());
// Search taskCS for PC to analyze
auto pipeControlTask = genCmdCast<typename FamilyType::PIPE_CONTROL *>(
ptrOffset(commandStreamTask.getCpuBase(), 24));
ASSERT_NE(nullptr, pipeControlTask);
if (pipeControlCount > 1) {
// Search taskCS for PC to analyze
auto pipeControlTask = genCmdCast<typename FamilyType::PIPE_CONTROL *>(
ptrOffset(commandStreamTask.getCpuBase(), 24));
ASSERT_NE(nullptr, pipeControlTask);
// Verify that the dcFlushEnabled bit is not set in PC
auto pCmd = reinterpret_cast<PIPE_CONTROL *>(pipeControlTask);
EXPECT_EQ(false, pCmd->getDcFlushEnable());
// Verify that the dcFlushEnabled bit is not set in PC
auto pCmd = reinterpret_cast<PIPE_CONTROL *>(pipeControlTask);
EXPECT_EQ(false, pCmd->getDcFlushEnable());
}
} else {
// Verify that the dcFlushEnabled bit is not set in PC
auto pCmd = reinterpret_cast<PIPE_CONTROL *>(*itorPC);

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@ -21,6 +21,8 @@
*/
#include "unit_tests/gen_common/gen_cmd_parse.h"
#include "unit_tests/helpers/hw_parse.h"
#include "unit_tests/helpers/hw_parse.inl"
#include "gtest/gtest.h"
// clang-format off
@ -428,3 +430,6 @@ void BdwParse::validateCommand<MEDIA_VFE_STATE *>(GenCmdList::iterator itorBegin
ASSERT_TRUE(false) << "A PIPE_CONTROL w/ CS stall is required before a MEDIA_VFE_STATE.";
}
template void HardwareParse::findHardwareCommands<BDWFamily>();
template const void *HardwareParse::getStatelessArgumentPointer<BDWFamily>(const Kernel &kernel, uint32_t indexArg, IndirectHeap &ioh);

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@ -21,6 +21,8 @@
*/
#include "unit_tests/gen_common/gen_cmd_parse.h"
#include "unit_tests/helpers/hw_parse.h"
#include "unit_tests/helpers/hw_parse.inl"
#include "gtest/gtest.h"
// clang-format off
@ -464,3 +466,6 @@ void SklParse::validateCommand<MEDIA_VFE_STATE *>(GenCmdList::iterator itorBegin
ASSERT_TRUE(false) << "A PIPE_CONTROL w/ CS stall is required before a MEDIA_VFE_STATE.";
}
template void HardwareParse::findHardwareCommands<SKLFamily>();
template const void *HardwareParse::getStatelessArgumentPointer<SKLFamily>(const Kernel &kernel, uint32_t indexArg, IndirectHeap &ioh);

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@ -38,6 +38,7 @@ set(IGDRCL_SRCS_tests_helpers
${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_tests.h
${CMAKE_CURRENT_SOURCE_DIR}/hw_parse.h
${CMAKE_CURRENT_SOURCE_DIR}/hw_parse.inl
${CMAKE_CURRENT_SOURCE_DIR}/kernel_commands_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/kernel_filename_helper.h
${CMAKE_CURRENT_SOURCE_DIR}/kmd_notify_tests.cpp

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@ -76,71 +76,7 @@ struct HardwareParse {
void findCsrBaseAddress();
template <typename FamilyType>
void findHardwareCommands() {
typedef typename FamilyType::GPGPU_WALKER GPGPU_WALKER;
typedef typename FamilyType::PIPELINE_SELECT PIPELINE_SELECT;
typedef typename FamilyType::STATE_BASE_ADDRESS STATE_BASE_ADDRESS;
typedef typename FamilyType::MEDIA_INTERFACE_DESCRIPTOR_LOAD MEDIA_INTERFACE_DESCRIPTOR_LOAD;
typedef typename FamilyType::MEDIA_VFE_STATE MEDIA_VFE_STATE;
typedef typename FamilyType::INTERFACE_DESCRIPTOR_DATA INTERFACE_DESCRIPTOR_DATA;
typedef typename FamilyType::MI_BATCH_BUFFER_START MI_BATCH_BUFFER_START;
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
itorWalker = find<GPGPU_WALKER *>(cmdList.begin(), cmdList.end());
if (itorWalker != cmdList.end()) {
cmdWalker = *itorWalker;
}
itorBBStartAfterWalker = find<MI_BATCH_BUFFER_START *>(itorWalker, cmdList.end());
if (itorBBStartAfterWalker != cmdList.end()) {
cmdBBStartAfterWalker = *itorBBStartAfterWalker;
}
for (auto it = cmdList.begin(); it != cmdList.end(); it++) {
auto lri = genCmdCast<MI_LOAD_REGISTER_IMM *>(*it);
if (lri) {
lriList.push_back(*it);
}
}
MEDIA_INTERFACE_DESCRIPTOR_LOAD *cmdMIDL = nullptr;
itorMediaInterfaceDescriptorLoad = find<MEDIA_INTERFACE_DESCRIPTOR_LOAD *>(cmdList.begin(), itorWalker);
if (itorMediaInterfaceDescriptorLoad != itorWalker) {
cmdMIDL = (MEDIA_INTERFACE_DESCRIPTOR_LOAD *)*itorMediaInterfaceDescriptorLoad;
cmdMediaInterfaceDescriptorLoad = *itorMediaInterfaceDescriptorLoad;
}
itorPipelineSelect = find<PIPELINE_SELECT *>(cmdList.begin(), itorWalker);
if (itorPipelineSelect != itorWalker) {
cmdPipelineSelect = *itorPipelineSelect;
}
itorMediaVfeState = find<MEDIA_VFE_STATE *>(itorPipelineSelect, itorWalker);
if (itorMediaVfeState != itorWalker) {
cmdMediaVfeState = *itorMediaVfeState;
}
STATE_BASE_ADDRESS *cmdSBA = nullptr;
uint64_t dynamicStateHeap = 0;
itorStateBaseAddress = find<STATE_BASE_ADDRESS *>(cmdList.begin(), itorWalker);
if (itorStateBaseAddress != itorWalker) {
cmdSBA = (STATE_BASE_ADDRESS *)*itorStateBaseAddress;
cmdStateBaseAddress = *itorStateBaseAddress;
// Extract the dynamicStateHeap
dynamicStateHeap = cmdSBA->getDynamicStateBaseAddress();
ASSERT_NE(0u, dynamicStateHeap);
}
// interfaceDescriptorData should be located within dynamicStateHeap
if (cmdMIDL && cmdSBA) {
auto iddStart = cmdMIDL->getInterfaceDescriptorDataStartAddress();
auto iddEnd = iddStart + cmdMIDL->getInterfaceDescriptorTotalLength();
ASSERT_LE(iddEnd, cmdSBA->getDynamicStateBufferSize() * MemoryConstants::pageSize);
// Extract the interfaceDescriptorData
cmdInterfaceDescriptorData = (INTERFACE_DESCRIPTOR_DATA *)(dynamicStateHeap + iddStart);
}
}
void findHardwareCommands();
template <typename FamilyType>
void parseCommands(OCLRT::LinearStream &commandStream, size_t startOffset = 0) {
@ -211,35 +147,7 @@ struct HardwareParse {
}
template <typename FamilyType>
const void *getStatelessArgumentPointer(const Kernel &kernel, uint32_t indexArg, IndirectHeap &ioh) {
typedef typename FamilyType::GPGPU_WALKER GPGPU_WALKER;
typedef typename FamilyType::STATE_BASE_ADDRESS STATE_BASE_ADDRESS;
auto cmdWalker = (GPGPU_WALKER *)this->cmdWalker;
EXPECT_NE(nullptr, cmdWalker);
auto cmdSBA = (STATE_BASE_ADDRESS *)cmdStateBaseAddress;
EXPECT_NE(nullptr, cmdSBA);
auto offsetCrossThreadData = cmdWalker->getIndirectDataStartAddress();
EXPECT_LT(offsetCrossThreadData, cmdSBA->getIndirectObjectBufferSize() * MemoryConstants::pageSize);
offsetCrossThreadData -= static_cast<uint32_t>(ioh.getGraphicsAllocation()->getGpuAddressToPatch());
// Get the base of cross thread
auto pCrossThreadData = ptrOffset(
reinterpret_cast<const void *>(ioh.getCpuBase()),
offsetCrossThreadData);
// Determine where the argument is
auto &patchInfo = kernel.getKernelInfo().patchInfo;
for (auto &arg : patchInfo.statelessGlobalMemObjKernelArgs) {
if (arg->ArgumentNumber == indexArg) {
return ptrOffset(pCrossThreadData, arg->DataParamOffset);
}
}
return nullptr;
}
const void *getStatelessArgumentPointer(const Kernel &kernel, uint32_t indexArg, IndirectHeap &ioh);
template <typename CmdType>
CmdType *getCommand(GenCmdList::iterator itorStart, GenCmdList::iterator itorEnd) {

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@ -0,0 +1,125 @@
/*
* Copyright (c) 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "unit_tests/helpers/hw_parse.h"
namespace OCLRT {
template <typename FamilyType>
void HardwareParse::findHardwareCommands() {
typedef typename FamilyType::GPGPU_WALKER GPGPU_WALKER;
typedef typename FamilyType::PIPELINE_SELECT PIPELINE_SELECT;
typedef typename FamilyType::STATE_BASE_ADDRESS STATE_BASE_ADDRESS;
typedef typename FamilyType::MEDIA_INTERFACE_DESCRIPTOR_LOAD MEDIA_INTERFACE_DESCRIPTOR_LOAD;
typedef typename FamilyType::MEDIA_VFE_STATE MEDIA_VFE_STATE;
typedef typename FamilyType::INTERFACE_DESCRIPTOR_DATA INTERFACE_DESCRIPTOR_DATA;
typedef typename FamilyType::MI_BATCH_BUFFER_START MI_BATCH_BUFFER_START;
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
itorWalker = find<GPGPU_WALKER *>(cmdList.begin(), cmdList.end());
if (itorWalker != cmdList.end()) {
cmdWalker = *itorWalker;
}
itorBBStartAfterWalker = find<MI_BATCH_BUFFER_START *>(itorWalker, cmdList.end());
if (itorBBStartAfterWalker != cmdList.end()) {
cmdBBStartAfterWalker = *itorBBStartAfterWalker;
}
for (auto it = cmdList.begin(); it != cmdList.end(); it++) {
auto lri = genCmdCast<MI_LOAD_REGISTER_IMM *>(*it);
if (lri) {
lriList.push_back(*it);
}
}
MEDIA_INTERFACE_DESCRIPTOR_LOAD *cmdMIDL = nullptr;
itorMediaInterfaceDescriptorLoad = find<MEDIA_INTERFACE_DESCRIPTOR_LOAD *>(cmdList.begin(), itorWalker);
if (itorMediaInterfaceDescriptorLoad != itorWalker) {
cmdMIDL = (MEDIA_INTERFACE_DESCRIPTOR_LOAD *)*itorMediaInterfaceDescriptorLoad;
cmdMediaInterfaceDescriptorLoad = *itorMediaInterfaceDescriptorLoad;
}
itorPipelineSelect = find<PIPELINE_SELECT *>(cmdList.begin(), itorWalker);
if (itorPipelineSelect != itorWalker) {
cmdPipelineSelect = *itorPipelineSelect;
}
itorMediaVfeState = find<MEDIA_VFE_STATE *>(itorPipelineSelect, itorWalker);
if (itorMediaVfeState != itorWalker) {
cmdMediaVfeState = *itorMediaVfeState;
}
STATE_BASE_ADDRESS *cmdSBA = nullptr;
uint64_t dynamicStateHeap = 0;
itorStateBaseAddress = find<STATE_BASE_ADDRESS *>(cmdList.begin(), itorWalker);
if (itorStateBaseAddress != itorWalker) {
cmdSBA = (STATE_BASE_ADDRESS *)*itorStateBaseAddress;
cmdStateBaseAddress = *itorStateBaseAddress;
// Extract the dynamicStateHeap
dynamicStateHeap = cmdSBA->getDynamicStateBaseAddress();
ASSERT_NE(0u, dynamicStateHeap);
}
// interfaceDescriptorData should be located within dynamicStateHeap
if (cmdMIDL && cmdSBA) {
auto iddStart = cmdMIDL->getInterfaceDescriptorDataStartAddress();
auto iddEnd = iddStart + cmdMIDL->getInterfaceDescriptorTotalLength();
ASSERT_LE(iddEnd, cmdSBA->getDynamicStateBufferSize() * MemoryConstants::pageSize);
// Extract the interfaceDescriptorData
cmdInterfaceDescriptorData = (INTERFACE_DESCRIPTOR_DATA *)(dynamicStateHeap + iddStart);
}
}
template <typename FamilyType>
const void *HardwareParse::getStatelessArgumentPointer(const Kernel &kernel, uint32_t indexArg, IndirectHeap &ioh) {
typedef typename FamilyType::GPGPU_WALKER GPGPU_WALKER;
typedef typename FamilyType::STATE_BASE_ADDRESS STATE_BASE_ADDRESS;
auto cmdWalker = (GPGPU_WALKER *)this->cmdWalker;
EXPECT_NE(nullptr, cmdWalker);
auto cmdSBA = (STATE_BASE_ADDRESS *)cmdStateBaseAddress;
EXPECT_NE(nullptr, cmdSBA);
auto offsetCrossThreadData = cmdWalker->getIndirectDataStartAddress();
EXPECT_LT(offsetCrossThreadData, cmdSBA->getIndirectObjectBufferSize() * MemoryConstants::pageSize);
offsetCrossThreadData -= static_cast<uint32_t>(ioh.getGraphicsAllocation()->getGpuAddressToPatch());
// Get the base of cross thread
auto pCrossThreadData = ptrOffset(
reinterpret_cast<const void *>(ioh.getCpuBase()),
offsetCrossThreadData);
// Determine where the argument is
auto &patchInfo = kernel.getKernelInfo().patchInfo;
for (auto &arg : patchInfo.statelessGlobalMemObjKernelArgs) {
if (arg->ArgumentNumber == indexArg) {
return ptrOffset(pCrossThreadData, arg->DataParamOffset);
}
}
return nullptr;
}
} // namespace OCLRT

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@ -71,7 +71,7 @@ struct KernelCommandsTest : DeviceFixture,
size_t sizeRequiredISH;
};
HWTEST_F(KernelCommandsTest, programInterfaceDescriptorDataResourceUsage) {
HWCMDTEST_F(IGFX_GEN8_CORE, KernelCommandsTest, programInterfaceDescriptorDataResourceUsage) {
CommandQueueHw<FamilyType> cmdQ(pContext, pDevice, 0);
std::unique_ptr<Image> srcImage(Image2dHelper<>::create(pContext));
@ -269,7 +269,7 @@ HWTEST_F(KernelCommandsTest, givenSendCrossThreadDataWhenWhenAddPatchInfoComment
EXPECT_EQ(PatchInfoAllocationType::IndirectObjectHeap, kernel->getPatchInfoDataList()[0].targetType);
}
HWTEST_F(KernelCommandsTest, sendIndirectStateResourceUsage) {
HWCMDTEST_F(IGFX_GEN8_CORE, KernelCommandsTest, sendIndirectStateResourceUsage) {
typedef typename FamilyType::INTERFACE_DESCRIPTOR_DATA INTERFACE_DESCRIPTOR_DATA;
CommandQueueHw<FamilyType> cmdQ(pContext, pDevice, 0);
@ -347,7 +347,7 @@ HWTEST_F(KernelCommandsTest, sendIndirectStateResourceUsage) {
EXPECT_GE(KernelCommandsHelper<FamilyType>::getSizeRequiredCS(), usedAfterCS - usedBeforeCS);
}
HWTEST_F(KernelCommandsTest, usedBindingTableStatePointer) {
HWCMDTEST_F(IGFX_GEN8_CORE, KernelCommandsTest, usedBindingTableStatePointer) {
typedef typename FamilyType::BINDING_TABLE_STATE BINDING_TABLE_STATE;
typedef typename FamilyType::RENDER_SURFACE_STATE RENDER_SURFACE_STATE;
@ -412,7 +412,7 @@ HWTEST_F(KernelCommandsTest, usedBindingTableStatePointer) {
EXPECT_EQ(0x00000040u, *(&bindingTableStatesPointers[1]));
}
HWTEST_F(KernelCommandsTest, usedBindingTableStatePointersForGlobalAndConstantAndPrivateAndEventPoolAndDefaultCommandQueueSurfaces) {
HWCMDTEST_F(IGFX_GEN8_CORE, KernelCommandsTest, usedBindingTableStatePointersForGlobalAndConstantAndPrivateAndEventPoolAndDefaultCommandQueueSurfaces) {
using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
// define kernel info
@ -734,7 +734,7 @@ HWTEST_F(KernelCommandsTest, slmValueScenarios) {
}
}
HWTEST_F(KernelCommandsTest, GivenKernelWithSamplersWhenIndirectStateIsProgrammedThenBorderColorIsCorrectlyCopiedToDshAndSamplerStatesAreProgrammedWithPointer) {
HWCMDTEST_F(IGFX_GEN8_CORE, KernelCommandsTest, GivenKernelWithSamplersWhenIndirectStateIsProgrammedThenBorderColorIsCorrectlyCopiedToDshAndSamplerStatesAreProgrammedWithPointer) {
typedef typename FamilyType::BINDING_TABLE_STATE BINDING_TABLE_STATE;
typedef typename FamilyType::RENDER_SURFACE_STATE RENDER_SURFACE_STATE;
typedef typename FamilyType::SAMPLER_STATE SAMPLER_STATE;