From b73d956285047d49c48a722c2d3800bf2b717dda Mon Sep 17 00:00:00 2001 From: Kamil Kopryk Date: Fri, 6 Sep 2024 06:50:15 +0000 Subject: [PATCH] test: correct expectations in level zero tests if heapless enabled 4/4 Related-To: NEO-10641 Signed-off-by: Kamil Kopryk --- .../sources/cmdlist/test_in_order_cmdlist.cpp | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/level_zero/core/test/unit_tests/sources/cmdlist/test_in_order_cmdlist.cpp b/level_zero/core/test/unit_tests/sources/cmdlist/test_in_order_cmdlist.cpp index 126d6e1ee4..883aab6e4c 100644 --- a/level_zero/core/test/unit_tests/sources/cmdlist/test_in_order_cmdlist.cpp +++ b/level_zero/core/test/unit_tests/sources/cmdlist/test_in_order_cmdlist.cpp @@ -1520,8 +1520,14 @@ HWTEST2_F(InOrderCmdListTests, givenImmediateCmdListWhenDispatchingWithRegularEv EXPECT_EQ(Event::CounterBasedMode::implicitlyEnabled, events[0]->counterBasedMode); } - auto hostAddress = static_cast(immCmdList->inOrderExecInfo->getDeviceCounterAllocation()->getUnderlyingBuffer()); - *hostAddress = immCmdList->inOrderExecInfo->getCounterValue(); + if (immCmdList->inOrderExecInfo->isHostStorageDuplicated()) { + + auto hostAddress = immCmdList->inOrderExecInfo->getBaseHostAddress(); + *hostAddress = immCmdList->inOrderExecInfo->getCounterValue(); + } else { + auto hostAddress = static_cast(immCmdList->inOrderExecInfo->getDeviceCounterAllocation()->getUnderlyingBuffer()); + *hostAddress = immCmdList->inOrderExecInfo->getCounterValue(); + } immCmdList->copyThroughLockedPtrEnabled = true; events[0]->makeCounterBasedInitiallyDisabled(); @@ -5141,8 +5147,12 @@ HWTEST2_F(MultiTileInOrderCmdListTests, givenMultiTileInOrderModeWhenProgramming auto gpuAddress = immCmdList->inOrderExecInfo->getBaseDeviceAddress(); - ASSERT_TRUE(verifyInOrderDependency(itor, 1, gpuAddress, immCmdList->isQwordInOrderCounter(), false)); - ASSERT_TRUE(verifyInOrderDependency(itor, 1, gpuAddress + device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset(), immCmdList->isQwordInOrderCounter(), false)); + if (immCmdList->inOrderExecInfo->isHostStorageDuplicated()) { + ASSERT_TRUE(verifyInOrderDependency(itor, 2, gpuAddress, immCmdList->isQwordInOrderCounter(), false)); + } else { + ASSERT_TRUE(verifyInOrderDependency(itor, 1, gpuAddress, immCmdList->isQwordInOrderCounter(), false)); + ASSERT_TRUE(verifyInOrderDependency(itor, 1, gpuAddress + device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset(), immCmdList->isQwordInOrderCounter(), false)); + } } } }