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Add memory banks to Simulated CSR

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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
This commit is contained in:
Bartosz Dunajski
2021-06-29 16:23:56 +00:00
committed by Compute-Runtime-Automation
parent 2ce3a223f0
commit c7a936d1f4
24 changed files with 913 additions and 75 deletions
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opencl/test/unit_test/command_stream/CMakeLists.txt
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@ -25,6 +25,7 @@ set(IGDRCL_SRCS_tests_command_stream
${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_flush_task_4_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_flush_task_gmock_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_with_aub_dump_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_simulated_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/create_command_stream_receiver_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/get_devices_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/experimental_command_buffer_tests.cpp