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Add memory banks to Simulated CSR

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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
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Bartosz Dunajski
2021-06-29 16:23:56 +00:00
committed by Compute-Runtime-Automation
parent 2ce3a223f0
commit c7a936d1f4
24 changed files with 913 additions and 75 deletions
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2
shared/source/os_interface/linux/drm_buffer_object.h
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@ -7,11 +7,11 @@
#pragma once
#include "shared/source/memory_manager/definitions/engine_limits.h"
#include "shared/source/os_interface/linux/cache_info.h"
#include "shared/source/utilities/stackvec.h"
#include "drm/i915_drm.h"
#include "engine_limits.h"
#include <array>
#include <atomic>