diff --git a/core/generated/gen12lp/hw_cmds_generated_gen12lp.inl b/core/generated/gen12lp/hw_cmds_generated_gen12lp.inl index cd3ca4f97f..4a51a07cb2 100644 --- a/core/generated/gen12lp/hw_cmds_generated_gen12lp.inl +++ b/core/generated/gen12lp/hw_cmds_generated_gen12lp.inl @@ -1825,8 +1825,7 @@ typedef struct tagRENDER_SURFACE_STATE { uint64_t ProceduralTexture : BITFIELD_RANGE(11, 11); uint64_t Reserved_332 : BITFIELD_RANGE(12, 63); // DWORD 12 - uint32_t CompressionFormat : BITFIELD_RANGE(0, 4); - uint32_t Reserved_389 : BITFIELD_RANGE(5, 5); + uint32_t Reserved_384 : BITFIELD_RANGE(0, 5); uint32_t ClearAddressLow : BITFIELD_RANGE(6, 31); // DWORD 13 uint32_t ClearAddressHigh : BITFIELD_RANGE(0, 15); @@ -2674,13 +2673,6 @@ typedef struct tagRENDER_SURFACE_STATE { inline MEMORY_COMPRESSION_MODE getMemoryCompressionMode(void) const { return static_cast(TheStructure.Common.MemoryCompressionMode); } - inline void setCompressionFormat(uint32_t compressionFormat) { - UNRECOVERABLE_IF(compressionFormat > 0x1F); - TheStructure.Common.CompressionFormat = compressionFormat; - } - inline uint32_t getCompressionFormat(void) const { - return TheStructure.Common.CompressionFormat; - } inline void setSurfaceBaseAddress(const uint64_t value) { TheStructure.Common.SurfaceBaseAddress = value; } diff --git a/runtime/gen12lp/helpers_gen12lp.cpp b/runtime/gen12lp/helpers_gen12lp.cpp index b7d3dbaded..417e9ae627 100644 --- a/runtime/gen12lp/helpers_gen12lp.cpp +++ b/runtime/gen12lp/helpers_gen12lp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2020 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -39,16 +39,5 @@ void setAdditionalPipelineSelectFields(void *pipelineSelectCmd, const PipelineSelectArgs &pipelineSelectArgs, const HardwareInfo &hwInfo) {} -bool isPageTableManagerSupported(const HardwareInfo &hwInfo) { - return hwInfo.capabilityTable.ftrRenderCompressedBuffers || hwInfo.capabilityTable.ftrRenderCompressedImages; -} - -bool obtainRenderBufferCompressionPreference(const HardwareInfo &hwInfo, const size_t size) { - return false; -} - -void setAdditionalSurfaceStateParamsForImageCompression(Image &image, TGLLPFamily::RENDER_SURFACE_STATE *surfaceState) { -} - } // namespace Gen12LPHelpers } // namespace NEO diff --git a/runtime/gen12lp/helpers_gen12lp.h b/runtime/gen12lp/helpers_gen12lp.h index 5a7a75a453..e067c15b6e 100644 --- a/runtime/gen12lp/helpers_gen12lp.h +++ b/runtime/gen12lp/helpers_gen12lp.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2020 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -31,8 +31,5 @@ void adjustAubGTTData(const CommandStreamReceiver &commandStreamReceiver, AubGTT void setAdditionalPipelineSelectFields(void *pipelineSelectCmd, const PipelineSelectArgs &pipelineSelectArgs, const HardwareInfo &hwInfo); -bool isPageTableManagerSupported(const HardwareInfo &hwInfo); -bool obtainRenderBufferCompressionPreference(const HardwareInfo &hwInfo, const size_t size); -void setAdditionalSurfaceStateParamsForImageCompression(Image &image, typename TGLLPFamily::RENDER_SURFACE_STATE *surfaceState); } // namespace Gen12LPHelpers } // namespace NEO diff --git a/runtime/gen12lp/hw_helper_gen12lp.cpp b/runtime/gen12lp/hw_helper_gen12lp.cpp index 620b26d353..22a9f0778a 100644 --- a/runtime/gen12lp/hw_helper_gen12lp.cpp +++ b/runtime/gen12lp/hw_helper_gen12lp.cpp @@ -52,12 +52,12 @@ bool HwHelperHw::isLocalMemoryEnabled(const HardwareInfo &hwInfo) const template <> bool HwHelperHw::isPageTableManagerSupported(const HardwareInfo &hwInfo) const { - return Gen12LPHelpers::isPageTableManagerSupported(hwInfo); + return hwInfo.capabilityTable.ftrRenderCompressedBuffers || hwInfo.capabilityTable.ftrRenderCompressedImages; } template <> bool HwHelperHw::obtainRenderBufferCompressionPreference(const HardwareInfo &hwInfo, const size_t size) const { - return Gen12LPHelpers::obtainRenderBufferCompressionPreference(hwInfo, size); + return false; } template <> diff --git a/runtime/gen12lp/image_gen12lp.cpp b/runtime/gen12lp/image_gen12lp.cpp index f45c326e74..91c71cd064 100644 --- a/runtime/gen12lp/image_gen12lp.cpp +++ b/runtime/gen12lp/image_gen12lp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2020 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -37,11 +37,6 @@ void ImageHw::setSurfaceMemoryObjectControlStateIndexToMocsTable(void surfaceState->setSurfaceMemoryObjectControlStateIndexToMocsTables(value); } -template <> -void ImageHw::appendSurfaceStateParams(Family::RENDER_SURFACE_STATE *surfaceState) { - Gen12LPHelpers::setAdditionalSurfaceStateParamsForImageCompression(*this, surfaceState); -} - // clang-format off #include "runtime/mem_obj/image_tgllp_plus.inl" #include "runtime/mem_obj/image_factory_init.inl" diff --git a/unit_tests/gen12lp/hw_helper_tests_gen12lp.inl b/unit_tests/gen12lp/hw_helper_tests_gen12lp.inl index 9a5a71362e..54fac8041b 100644 --- a/unit_tests/gen12lp/hw_helper_tests_gen12lp.inl +++ b/unit_tests/gen12lp/hw_helper_tests_gen12lp.inl @@ -76,23 +76,19 @@ GEN12LPTEST_F(HwHelperTestGen12Lp, givenCompressionFtrEnabledWhenAskingForPageTa hardwareInfo.capabilityTable.ftrRenderCompressedBuffers = false; hardwareInfo.capabilityTable.ftrRenderCompressedImages = false; - bool expectedPageTableManagerSupport = SpecialUltHelperGen12lp::isPageTableManagerSupported(hardwareInfo); - EXPECT_EQ(expectedPageTableManagerSupport, helper.isPageTableManagerSupported(hardwareInfo)); + EXPECT_FALSE(helper.isPageTableManagerSupported(hardwareInfo)); hardwareInfo.capabilityTable.ftrRenderCompressedBuffers = true; hardwareInfo.capabilityTable.ftrRenderCompressedImages = false; - expectedPageTableManagerSupport = SpecialUltHelperGen12lp::isPageTableManagerSupported(hardwareInfo); - EXPECT_EQ(expectedPageTableManagerSupport, helper.isPageTableManagerSupported(hardwareInfo)); + EXPECT_TRUE(helper.isPageTableManagerSupported(hardwareInfo)); hardwareInfo.capabilityTable.ftrRenderCompressedBuffers = false; hardwareInfo.capabilityTable.ftrRenderCompressedImages = true; - expectedPageTableManagerSupport = SpecialUltHelperGen12lp::isPageTableManagerSupported(hardwareInfo); - EXPECT_EQ(expectedPageTableManagerSupport, helper.isPageTableManagerSupported(hardwareInfo)); + EXPECT_TRUE(helper.isPageTableManagerSupported(hardwareInfo)); hardwareInfo.capabilityTable.ftrRenderCompressedBuffers = true; hardwareInfo.capabilityTable.ftrRenderCompressedImages = true; - expectedPageTableManagerSupport = SpecialUltHelperGen12lp::isPageTableManagerSupported(hardwareInfo); - EXPECT_EQ(expectedPageTableManagerSupport, helper.isPageTableManagerSupported(hardwareInfo)); + EXPECT_TRUE(helper.isPageTableManagerSupported(hardwareInfo)); } GEN12LPTEST_F(HwHelperTestGen12Lp, givenDifferentSizesOfAllocationWhenCheckingCompressionPreferenceThenReturnCorrectValue) { @@ -100,8 +96,7 @@ GEN12LPTEST_F(HwHelperTestGen12Lp, givenDifferentSizesOfAllocationWhenCheckingCo const size_t sizesToCheck[] = {128, 256, 512, 1023, 1024, 1025}; for (size_t size : sizesToCheck) { - EXPECT_EQ(SpecialUltHelperGen12lp::isRenderBufferCompressionPreferred(hardwareInfo, size), - helper.obtainRenderBufferCompressionPreference(hardwareInfo, size)); + EXPECT_FALSE(helper.obtainRenderBufferCompressionPreference(hardwareInfo, size)); } } diff --git a/unit_tests/gen12lp/image_tests_gen12lp.inl b/unit_tests/gen12lp/image_tests_gen12lp.inl index 9adc228be9..9809e58d1e 100644 --- a/unit_tests/gen12lp/image_tests_gen12lp.inl +++ b/unit_tests/gen12lp/image_tests_gen12lp.inl @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2020 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -140,27 +140,6 @@ GEN12LPTEST_F(gen12LpImageTests, givenMediaCompressionSurfaceStateParamsAreSetFo EXPECT_EQ(surfaceState.getAuxiliarySurfaceMode(), RENDER_SURFACE_STATE::AUXILIARY_SURFACE_MODE::AUXILIARY_SURFACE_MODE_AUX_NONE); } -GEN12LPTEST_F(gen12LpImageTests, givenCompressionEnabledWhenAppendingSurfaceStateParamsForImageCompressionThenSetCompressionFormat) { - using RENDER_SURFACE_STATE = typename FamilyType::RENDER_SURFACE_STATE; - using ImageHwTgllp = ImageHw; - constexpr static uint8_t mockCompressionFormat = 13u; - - RENDER_SURFACE_STATE rss{}; - rss.setMemoryCompressionEnable(true); - MockContext context{}; - std::unique_ptr image{static_cast(ImageHelper::create(&context))}; - MockGmmClientContext *gmmClientContext = static_cast(platform()->peekGmmClientContext()); - - uint8_t expectedCompressionFormat = rss.getCompressionFormat(); - if (SpecialUltHelperGen12lp::isAdditionalSurfaceStateParamForCompressionRequired(context.getDevice(0)->getHardwareInfo())) { - expectedCompressionFormat = mockCompressionFormat; - } - - gmmClientContext->compressionFormatToReturn = mockCompressionFormat; - image->appendSurfaceStateParams(&rss); - EXPECT_EQ(expectedCompressionFormat, rss.getCompressionFormat()); -} - using Gen12lpRenderSurfaceStateDataTests = ::testing::Test; GEN12LPTEST_F(Gen12lpRenderSurfaceStateDataTests, WhenMemoryObjectControlStateIndexToMocsTablesIsSetThenValueIsShift) { diff --git a/unit_tests/gen12lp/special_ult_helper_gen12lp.cpp b/unit_tests/gen12lp/special_ult_helper_gen12lp.cpp index 5d90c9ff75..e2bcc29153 100644 --- a/unit_tests/gen12lp/special_ult_helper_gen12lp.cpp +++ b/unit_tests/gen12lp/special_ult_helper_gen12lp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2020 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -31,16 +31,4 @@ bool SpecialUltHelperGen12lp::isPipeControlWArequired(PRODUCT_FAMILY productFami return true; } -bool SpecialUltHelperGen12lp::isPageTableManagerSupported(const HardwareInfo &hwInfo) { - return hwInfo.capabilityTable.ftrRenderCompressedBuffers || hwInfo.capabilityTable.ftrRenderCompressedImages; -} - -bool SpecialUltHelperGen12lp::isRenderBufferCompressionPreferred(const HardwareInfo &hwInfo, const std::size_t size) { - return false; -} - -bool SpecialUltHelperGen12lp::isAdditionalSurfaceStateParamForCompressionRequired(const HardwareInfo &hwInfo) { - return false; -} - } // namespace NEO diff --git a/unit_tests/gen12lp/special_ult_helper_gen12lp.h b/unit_tests/gen12lp/special_ult_helper_gen12lp.h index 24cebfbcd6..d9af224095 100644 --- a/unit_tests/gen12lp/special_ult_helper_gen12lp.h +++ b/unit_tests/gen12lp/special_ult_helper_gen12lp.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2020 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -20,8 +20,5 @@ struct SpecialUltHelperGen12lp { static bool shouldPerformimagePitchAlignment(PRODUCT_FAMILY productFamily); static bool shouldTestDefaultImplementationOfSetupHardwareCapabilities(PRODUCT_FAMILY productFamily); static bool isPipeControlWArequired(PRODUCT_FAMILY productFamily); - static bool isPageTableManagerSupported(const HardwareInfo &hwInfo); - static bool isRenderBufferCompressionPreferred(const HardwareInfo &hwInfo, const std::size_t size); - static bool isAdditionalSurfaceStateParamForCompressionRequired(const HardwareInfo &hwInfo); }; } // namespace NEO diff --git a/unit_tests/gen12lp/unit_test_helper_gen12lp.cpp b/unit_tests/gen12lp/unit_test_helper_gen12lp.cpp index 3c8311b60a..c9d1627e1e 100644 --- a/unit_tests/gen12lp/unit_test_helper_gen12lp.cpp +++ b/unit_tests/gen12lp/unit_test_helper_gen12lp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2020 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -21,7 +21,7 @@ bool UnitTestHelper::isL3ConfigProgrammable() { template <> bool UnitTestHelper::isPageTableManagerSupported(const HardwareInfo &hwInfo) { - return SpecialUltHelperGen12lp::isPageTableManagerSupported(hwInfo); + return hwInfo.capabilityTable.ftrRenderCompressedBuffers || hwInfo.capabilityTable.ftrRenderCompressedImages; } template <>