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https://github.com/intel/compute-runtime.git
synced 2025-09-15 13:01:45 +08:00
Add additional StateBaseAddress cmd wa
Resolves: NEO-5982 Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
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committed by
Compute-Runtime-Automation

parent
dc77174255
commit
d7a2a62ded
@ -1998,6 +1998,7 @@ void CommandListCoreFamily<gfxCoreFamily>::programStateBaseAddress(NEO::CommandC
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args.hdcPipelineFlush = true;
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args.textureCacheInvalidationEnable = true;
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NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
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auto &hwInfo = device->getHwInfo();
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STATE_BASE_ADDRESS sba;
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NEO::EncodeStateBaseAddress<GfxFamily>::encode(commandContainer, sba);
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@ -2012,6 +2013,8 @@ void CommandListCoreFamily<gfxCoreFamily>::programStateBaseAddress(NEO::CommandC
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device->getL0Debugger()->captureStateBaseAddress(commandContainer, sbaAddresses);
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}
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NEO::EncodeStateBaseAddress<GfxFamily>::addStateBaseAddressIfRequired(commandContainer, sba, hwInfo);
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}
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template <GFXCORE_FAMILY gfxCoreFamily>
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@ -139,3 +139,10 @@ HWTEST_F(HwInfoConfigTest, givenSamplerStateWhenAdjustSamplerStateThenNothingIsC
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EXPECT_EQ(0, memcmp(&initialState, &state, sizeof(SAMPLER_STATE)));
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}
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HWTEST_F(HwInfoConfigTest, whenCallingIsAdditionalStateBaseAddressWARequiredThenFalseIsReturned) {
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auto hwInfoConfig = HwInfoConfig::get(pInHwInfo.platform.eProductFamily);
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bool ret = hwInfoConfig->isAdditionalStateBaseAddressWARequired(pInHwInfo);
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EXPECT_FALSE(ret);
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}
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@ -88,6 +88,12 @@ void HwInfoConfigHw<IGFX_UNKNOWN>::adjustSamplerState(void *sampler, const Hardw
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template <>
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void HwInfoConfigHw<IGFX_UNKNOWN>::convertTimestampsFromOaToCsDomain(uint64_t ×tampData){};
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template <>
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bool HwInfoConfigHw<IGFX_UNKNOWN>::isAdditionalStateBaseAddressWARequired(const HardwareInfo &hwInfo) const {
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return false;
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}
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} // namespace NEO
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struct DummyHwConfig : HwInfoConfigHw<IGFX_UNKNOWN> {
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@ -539,6 +545,11 @@ TEST_F(HwInfoConfigTestLinuxDummy, givenFailingGttSizeIoctlWhenInitializingHwInf
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EXPECT_EQ(pInHwInfo.capabilityTable.gpuAddressSpace, outHwInfo.capabilityTable.gpuAddressSpace);
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}
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HWTEST_F(HwInfoConfigTestLinuxDummy, givenHardwareInfoWhenCallingIsAdditionalStateBaseAddressWARequiredThenFalseIsReturned) {
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bool ret = hwConfig.isAdditionalStateBaseAddressWARequired(outHwInfo);
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EXPECT_FALSE(ret);
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}
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using HwConfigLinux = ::testing::Test;
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HWTEST2_F(HwConfigLinux, GivenDifferentValuesFromTopologyQueryWhenConfiguringHwInfoThenMaxSlicesSupportedSetToAvailableCountInGtSystemInfo, MatchAny) {
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@ -67,6 +67,11 @@ void HwInfoConfigHw<IGFX_UNKNOWN>::convertTimestampsFromOaToCsDomain(uint64_t &t
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template <>
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void HwInfoConfigHw<IGFX_UNKNOWN>::adjustSamplerState(void *sampler, const HardwareInfo &hwInfo){};
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template <>
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bool HwInfoConfigHw<IGFX_UNKNOWN>::isAdditionalStateBaseAddressWARequired(const HardwareInfo &hwInfo) const {
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return false;
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}
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HwInfoConfigTestWindows::HwInfoConfigTestWindows() {
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this->executionEnvironment = std::make_unique<MockExecutionEnvironment>();
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this->rootDeviceEnvironment = std::make_unique<RootDeviceEnvironment>(*executionEnvironment);
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@ -117,6 +122,11 @@ TEST_F(HwInfoConfigTestWindows, givenInstrumentationForHardwareIsEnabledOrDisabl
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EXPECT_TRUE(outHwInfo.capabilityTable.instrumentationEnabled);
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}
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HWTEST_F(HwInfoConfigTestWindows, givenHardwareInfoWhenCallingIsAdditionalStateBaseAddressWARequiredThenFalseIsReturned) {
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bool ret = hwConfig.isAdditionalStateBaseAddressWARequired(outHwInfo);
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EXPECT_FALSE(ret);
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}
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HWTEST_F(HwInfoConfigTestWindows, givenFtrIaCoherencyFlagWhenConfiguringHwInfoThenSetCoherencySupportCorrectly) {
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HardwareInfo initialHwInfo = *defaultHwInfo;
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auto &hwHelper = HwHelper::get(initialHwInfo.platform.eRenderCoreFamily);
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@ -219,6 +219,7 @@ struct EncodeStateBaseAddress {
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using STATE_BASE_ADDRESS = typename GfxFamily::STATE_BASE_ADDRESS;
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static void encode(CommandContainer &container, STATE_BASE_ADDRESS &sbaCmd);
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static void encode(CommandContainer &container, STATE_BASE_ADDRESS &sbaCmd, uint32_t statelessMocsIndex, bool useGlobalAtomics);
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static void addStateBaseAddressIfRequired(CommandContainer &container, STATE_BASE_ADDRESS &sbaCmd, const HardwareInfo &hwInfo);
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};
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template <typename GfxFamily>
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@ -386,6 +386,9 @@ void EncodeStateBaseAddress<Family>::encode(CommandContainer &container, STATE_B
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EncodeWA<Family>::encodeAdditionalPipelineSelect(*container.getDevice(), *container.getCommandStream(), false);
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}
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template <typename Family>
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void EncodeStateBaseAddress<Family>::addStateBaseAddressIfRequired(CommandContainer &container, STATE_BASE_ADDRESS &sbaCmd, const HardwareInfo &hwInfo) {}
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template <typename Family>
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void EncodeL3State<Family>::encode(CommandContainer &container, bool enableSLM) {
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auto offset = L3CNTLRegisterOffset<Family>::registerOffset;
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@ -484,6 +484,9 @@ void EncodeStateBaseAddress<Family>::encode(CommandContainer &container, STATE_B
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}
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}
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template <typename Family>
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void EncodeStateBaseAddress<Family>::addStateBaseAddressIfRequired(CommandContainer &container, STATE_BASE_ADDRESS &sbaCmd, const HardwareInfo &hwInfo) {}
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template <typename Family>
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void EncodeComputeMode<Family>::adjustComputeMode(LinearStream &csr, void *const stateComputeModePtr, StateComputeModeProperties &properties) {
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using STATE_COMPUTE_MODE = typename Family::STATE_COMPUTE_MODE;
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@ -133,6 +133,7 @@ class CommandStreamReceiverHw : public CommandStreamReceiver {
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void programPreamble(LinearStream &csr, Device &device, DispatchFlags &dispatchFlags, uint32_t &newL3Config);
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void programPipelineSelect(LinearStream &csr, PipelineSelectArgs &pipelineSelectArgs);
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void programAdditionalPipelineSelect(LinearStream &csr, PipelineSelectArgs &pipelineSelectArgs, bool is3DPipeline);
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void programAdditionalStateBaseAddress(LinearStream &csr, typename GfxFamily::STATE_BASE_ADDRESS &cmd, Device &device);
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void programEpilogue(LinearStream &csr, Device &device, void **batchBufferEndLocation, DispatchFlags &dispatchFlags);
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void programEpliogueCommands(LinearStream &csr, const DispatchFlags &dispatchFlags);
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void programMediaSampler(LinearStream &csr, DispatchFlags &dispatchFlags);
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@ -422,6 +422,8 @@ CompletionStamp CommandStreamReceiverHw<GfxFamily>::flushTask(
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dispatchFlags.areMultipleSubDevicesInContext);
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*pCmd = cmd;
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programAdditionalStateBaseAddress(commandStreamCSR, cmd, device);
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if (sshDirty) {
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bindingTableBaseAddressRequired = true;
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}
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@ -1314,6 +1316,9 @@ inline void CommandStreamReceiverHw<GfxFamily>::programAdditionalPipelineSelect(
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}
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}
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template <typename GfxFamily>
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inline void CommandStreamReceiverHw<GfxFamily>::programAdditionalStateBaseAddress(LinearStream &csr, typename GfxFamily::STATE_BASE_ADDRESS &cmd, Device &device) {}
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template <typename GfxFamily>
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inline bool CommandStreamReceiverHw<GfxFamily>::isComputeModeNeeded() const {
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return false;
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@ -38,6 +38,7 @@ class HwInfoConfig {
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virtual uint64_t getSharedSystemMemCapabilities() = 0;
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virtual void convertTimestampsFromOaToCsDomain(uint64_t ×tampData) = 0;
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virtual uint32_t getDeviceMemoryMaxClkRate(const HardwareInfo *hwInfo) = 0;
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virtual bool isAdditionalStateBaseAddressWARequired(const HardwareInfo &hwInfo) const = 0;
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uint32_t threadsPerEu;
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};
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@ -59,6 +60,7 @@ class HwInfoConfigHw : public HwInfoConfig {
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uint64_t getSharedSystemMemCapabilities() override;
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void convertTimestampsFromOaToCsDomain(uint64_t ×tampData) override;
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uint32_t getDeviceMemoryMaxClkRate(const HardwareInfo *hwInfo) override;
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bool isAdditionalStateBaseAddressWARequired(const HardwareInfo &hwInfo) const override;
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protected:
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HwInfoConfigHw() = default;
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@ -80,4 +80,9 @@ uint32_t HwInfoConfigHw<gfxProduct>::getDeviceMemoryMaxClkRate(const HardwareInf
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return 0u;
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}
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template <PRODUCT_FAMILY gfxProduct>
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bool HwInfoConfigHw<gfxProduct>::isAdditionalStateBaseAddressWARequired(const HardwareInfo &hwInfo) const {
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return false;
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}
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} // namespace NEO
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