Media
/
compute-runtime
mirror of https://github.com/intel/compute-runtime.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Clear Drm profiling variables and macros 

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
This commit is contained in:
Bartosz Dunajski 2022-02-01 14:49:57 +00:00 committed by Compute-Runtime-Automation
parent 2be98a1e62
commit db94f4b8e1
4 changed files with 18 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
opencl/test/unit_test/linux/drm_null_device_tests.cpp
View File

@ -1,11 +1,12 @@
/*
* Copyright (C) 2018-2021 Intel Corporation
* Copyright (C) 2018-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/execution_environment/execution_environment.h"
#include "shared/source/helpers/register_offsets.h"
#include "shared/source/os_interface/linux/drm_null_device.h"
#include "shared/test/common/helpers/debug_manager_state_restore.h"
#include "shared/test/common/test_macros/test.h"
@ -67,17 +68,17 @@ TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENregReadOtherThenTimestampReadTH
TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENgetGpuTimestamp32bOr64bTHENerror) {
struct drm_i915_reg_read arg;
arg.offset = TIMESTAMP_LOW_REG;
arg.offset = REG_GLOBAL_TIMESTAMP_LDW;
ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), -1);
arg.offset = TIMESTAMP_HIGH_REG;
arg.offset = REG_GLOBAL_TIMESTAMP_UN;
ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), -1);
}
TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENgetGpuTimestamp36bTHENproperValues) {
struct drm_i915_reg_read arg;
arg.offset = TIMESTAMP_LOW_REG | 1;
arg.offset = REG_GLOBAL_TIMESTAMP_LDW | 1;
ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), 0);
EXPECT_EQ(arg.val, 1000ULL);

18
shared/source/os_interface/linux/device_time_drm.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2021 Intel Corporation
* Copyright (C) 2018-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -7,6 +7,7 @@
#include "shared/source/os_interface/linux/device_time_drm.h"
#include "shared/source/helpers/register_offsets.h"
#include "shared/source/os_interface/linux/drm_neo.h"
#include "shared/source/os_interface/os_interface.h"
@ -30,28 +31,25 @@ void DeviceTimeDrm::timestampTypeDetect() {
if (pDrm == nullptr)
return;
reg.offset = (TIMESTAMP_LOW_REG | 1);
reg.offset = (REG_GLOBAL_TIMESTAMP_LDW | 1);
err = pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg);
if (err) {
reg.offset = TIMESTAMP_HIGH_REG;
reg.offset = REG_GLOBAL_TIMESTAMP_UN;
err = pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg);
if (err) {
getGpuTime = &DeviceTimeDrm::getGpuTime32;
timestampSizeInBits = OCLRT_NUM_TIMESTAMP_BITS_FALLBACK;
} else {
getGpuTime = &DeviceTimeDrm::getGpuTimeSplitted;
timestampSizeInBits = OCLRT_NUM_TIMESTAMP_BITS;
}
} else {
getGpuTime = &DeviceTimeDrm::getGpuTime36;
timestampSizeInBits = OCLRT_NUM_TIMESTAMP_BITS;
}
}
bool DeviceTimeDrm::getGpuTime32(uint64_t *timestamp) {
struct drm_i915_reg_read reg = {};
reg.offset = TIMESTAMP_LOW_REG;
reg.offset = REG_GLOBAL_TIMESTAMP_LDW;
if (pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg)) {
return false;
@ -63,7 +61,7 @@ bool DeviceTimeDrm::getGpuTime32(uint64_t *timestamp) {
bool DeviceTimeDrm::getGpuTime36(uint64_t *timestamp) {
struct drm_i915_reg_read reg = {};
reg.offset = TIMESTAMP_LOW_REG | 1;
reg.offset = REG_GLOBAL_TIMESTAMP_LDW | 1;
if (pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg)) {
return false;
@ -78,8 +76,8 @@ bool DeviceTimeDrm::getGpuTimeSplitted(uint64_t *timestamp) {
uint64_t tmp_hi;
int err = 0, loop = 3;
reg_hi.offset = TIMESTAMP_HIGH_REG;
reg_lo.offset = TIMESTAMP_LOW_REG;
reg_hi.offset = REG_GLOBAL_TIMESTAMP_UN;
reg_lo.offset = REG_GLOBAL_TIMESTAMP_LDW;
err += pDrm->ioctl(DRM_IOCTL_I915_REG_READ, &reg_hi);
do {

8
shared/source/os_interface/linux/device_time_drm.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2021 Intel Corporation
* Copyright (C) 2018-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -9,11 +9,6 @@
#include "shared/source/os_interface/linux/drm_neo.h"
#include "shared/source/os_interface/os_time.h"
#define OCLRT_NUM_TIMESTAMP_BITS (36)
#define OCLRT_NUM_TIMESTAMP_BITS_FALLBACK (32)
#define TIMESTAMP_HIGH_REG 0x0235C
#define TIMESTAMP_LOW_REG 0x02358
namespace NEO {
class DeviceTimeDrm : public DeviceTime {
@ -31,7 +26,6 @@ class DeviceTimeDrm : public DeviceTime {
protected:
Drm *pDrm = nullptr;
unsigned timestampSizeInBits;
};
} // namespace NEO

7
shared/source/os_interface/linux/drm_null_device.h
View File

@ -1,11 +1,12 @@
/*
* Copyright (C) 2020-2021 Intel Corporation
* Copyright (C) 2020-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/helpers/register_offsets.h"
#include "shared/source/os_interface/linux/device_time_drm.h"
#include "shared/source/os_interface/linux/drm_neo.h"
@ -25,10 +26,10 @@ class DrmNullDevice : public Drm {
struct drm_i915_reg_read *regArg = static_cast<struct drm_i915_reg_read *>(arg);
// Handle only 36b timestamp
if (regArg->offset == (TIMESTAMP_LOW_REG | 1)) {
if (regArg->offset == (REG_GLOBAL_TIMESTAMP_LDW | 1)) {
gpuTimestamp += 1000;
regArg->val = gpuTimestamp & 0x0000000FFFFFFFFF;
} else if (regArg->offset == TIMESTAMP_LOW_REG || regArg->offset == TIMESTAMP_HIGH_REG) {
} else if (regArg->offset == REG_GLOBAL_TIMESTAMP_LDW || regArg->offset == REG_GLOBAL_TIMESTAMP_UN) {
return -1;
}