Temporarily disable bufferL3CacheTest ult
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com> Related-To: IGC-5606 Test is validating 1st programmed surface state (it's expecting buffer at 1st surface state), however during patch tokens cleanup order of surface states and BTIs will be changed.
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@ -1816,7 +1816,7 @@ class BufferL3CacheTests : public ::testing::TestWithParam<uint64_t> {
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void *hostPtr;
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};
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HWTEST_P(BufferL3CacheTests, givenMisalignedAndAlignedBufferWhenClEnqueueWriteImageThenL3CacheIsOn) {
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HWTEST_P(BufferL3CacheTests, DISABLED_givenMisalignedAndAlignedBufferWhenClEnqueueWriteImageThenL3CacheIsOn) {
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const auto &compilerHwInfoConfig = *CompilerHwInfoConfig::get(defaultHwInfo->platform.eProductFamily);
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if (compilerHwInfoConfig.isForceToStatelessRequired() || !ctx.getDevice(0)->getHardwareInfo().capabilityTable.supportsImages) {
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GTEST_SKIP();
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