Temporarily disable bufferL3CacheTest ult

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: IGC-5606

Test is validating 1st programmed surface state (it's expecting
buffer at 1st surface state), however
during patch tokens cleanup order of surface states and BTIs
will be changed.
This commit is contained in:
Kamil Kopryk 2022-09-21 12:31:00 +00:00 committed by Compute-Runtime-Automation
parent 9bde277184
commit ddaf6c10cd
1 changed files with 1 additions and 1 deletions

View File

@ -1816,7 +1816,7 @@ class BufferL3CacheTests : public ::testing::TestWithParam<uint64_t> {
void *hostPtr;
};
HWTEST_P(BufferL3CacheTests, givenMisalignedAndAlignedBufferWhenClEnqueueWriteImageThenL3CacheIsOn) {
HWTEST_P(BufferL3CacheTests, DISABLED_givenMisalignedAndAlignedBufferWhenClEnqueueWriteImageThenL3CacheIsOn) {
const auto &compilerHwInfoConfig = *CompilerHwInfoConfig::get(defaultHwInfo->platform.eProductFamily);
if (compilerHwInfoConfig.isForceToStatelessRequired() || !ctx.getDevice(0)->getHardwareInfo().capabilityTable.supportsImages) {
GTEST_SKIP();