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Add unit test helper function to set pipe control hdc flush

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Separate unit test helper definitions bdw_and_later / xe_hp_and_later

Related-To: NEO-6466

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
This commit is contained in:
Mateusz Jablonski
2022-01-17 12:54:53 +00:00
committed by Compute-Runtime-Automation
parent fc224202d6
commit e5a18177c5
26 changed files with 142 additions and 97 deletions
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10
opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_tests_xehp_and_later.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -92,7 +92,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi
auto pipeControlCmd = reinterpret_cast<typename FamilyType::PIPE_CONTROL *>(*pipeControlItor);
EXPECT_TRUE(pipeControlCmd->getTextureCacheInvalidationEnable());
EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::getDcFlushEnable(true, *defaultHwInfo), pipeControlCmd->getDcFlushEnable());
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
}
HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramPipeControlPriorToNonPipelinedStateCommandDebugKeyAndStateBaseAddressWhenItIsRequiredThenThereIsPipeControlPriorToIt) {
@ -111,14 +111,14 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi
auto pipeControlItor = find<typename FamilyType::PIPE_CONTROL *>(cmdList.begin(), stateBaseAddressItor);
EXPECT_NE(stateBaseAddressItor, pipeControlItor);
auto pipeControlCmd = reinterpret_cast<typename FamilyType::PIPE_CONTROL *>(*pipeControlItor);
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
EXPECT_TRUE(pipeControlCmd->getAmfsFlushEnable());
EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable());
EXPECT_TRUE(pipeControlCmd->getInstructionCacheInvalidateEnable());
EXPECT_TRUE(pipeControlCmd->getTextureCacheInvalidationEnable());
EXPECT_TRUE(pipeControlCmd->getConstantCacheInvalidationEnable());
EXPECT_TRUE(pipeControlCmd->getStateCacheInvalidationEnable());
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
}
HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramPipeControlPriorToNonPipelinedStateCommandDebugKeyAndStateSipWhenItIsRequiredThenThereIsPipeControlPriorToIt) {
@ -144,7 +144,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi
auto pipeControlIterator = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
auto pipeControlCmd = genCmdCast<PIPE_CONTROL *>(*pipeControlIterator);
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
EXPECT_TRUE(pipeControlCmd->getAmfsFlushEnable());
EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable());
EXPECT_TRUE(pipeControlCmd->getInstructionCacheInvalidateEnable());

4
opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests_dg2_and_later.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -118,7 +118,7 @@ HWTEST2_F(CommandStreamReceiverFlushTasDg2AndLaterTests, givenProgramPipeControl
--_3dStateBtdIterator;
auto pipeControlCmd = genCmdCast<PIPE_CONTROL *>(*_3dStateBtdIterator);
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
EXPECT_TRUE(pipeControlCmd->getAmfsFlushEnable());
EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable());
EXPECT_TRUE(pipeControlCmd->getInstructionCacheInvalidateEnable());

10
opencl/test/unit_test/helpers/hw_helper_tests_dg2_and_later.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -44,7 +44,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, WhenAddingPipeControlWAThenCorrectC
PIPE_CONTROL expectedPipeControl = FamilyType::cmdInitPipeControl;
expectedPipeControl.setCommandStreamerStallEnable(true);
expectedPipeControl.setHdcPipelineFlush(true);
UnitTestHelper<FamilyType>::setPipeControlHdcPipelineFlush(expectedPipeControl, true);
expectedPipeControl.setUnTypedDataPortCacheFlush(true);
auto it = cmdList.begin();
auto pPipeControl = genCmdCast<PIPE_CONTROL *>(*it);
@ -107,7 +107,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenRequestedCacheFlushesWhenProgr
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush());
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
}
@ -124,7 +124,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenDebugVariableSetWhenProgrammin
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush());
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
}
@ -144,7 +144,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenDebugDisableCacheFlushWhenProg
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
EXPECT_FALSE(pipeControl->getHdcPipelineFlush());
EXPECT_FALSE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_FALSE(pipeControl->getUnTypedDataPortCacheFlush());
EXPECT_FALSE(pipeControl->getCompressionControlSurfaceCcsFlush());
}

10
opencl/test/unit_test/helpers/hw_helper_tests_xehp_and_later.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@ -248,7 +248,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, WhenAddingPipeC
PIPE_CONTROL expectedPipeControl = FamilyType::cmdInitPipeControl;
expectedPipeControl.setCommandStreamerStallEnable(true);
expectedPipeControl.setHdcPipelineFlush(true);
UnitTestHelper<FamilyType>::setPipeControlHdcPipelineFlush(expectedPipeControl, true);
auto it = cmdList.begin();
auto pPipeControl = genCmdCast<PIPE_CONTROL *>(*it);
ASSERT_NE(nullptr, pPipeControl);
@ -312,7 +312,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, givenRequestedC
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
}
@ -328,7 +328,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, givenDebugVaria
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
}
@ -346,7 +346,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, givenDebugDisab
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
EXPECT_FALSE(pipeControl->getHdcPipelineFlush());
EXPECT_FALSE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_FALSE(pipeControl->getCompressionControlSurfaceCcsFlush());
}