Media
/
compute-runtime
mirror of https://github.com/intel/compute-runtime.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

fix: do not expose render engine by default on xe2 

Related-To: HSD-18040606360
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
This commit is contained in:
Maciej Plewka 2024-11-21 12:02:07 +00:00 committed by Compute-Runtime-Automation
parent 4ad8c17db9
commit ff324424eb
2 changed files with 103 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
shared/source/xe2_hpg_core/gfx_core_helper_xe2_hpg_core.cpp
View File

@ -58,7 +58,11 @@ const EngineInstancesContainer GfxCoreHelperHw<Family>::getGpgpuEngineInstances(
}
}
engines.push_back({aub_stream::ENGINE_CCCS, EngineUsage::regular});
if ((debugManager.flags.NodeOrdinal.get() == static_cast<int32_t>(aub_stream::EngineType::ENGINE_CCCS)) ||
hwInfo.featureTable.flags.ftrRcsNode) {
engines.push_back({aub_stream::ENGINE_CCCS, EngineUsage::regular});
}
engines.push_back({defaultEngine, EngineUsage::lowPriority});
engines.push_back({defaultEngine, EngineUsage::internal});

98
shared/test/unit_test/xe2_hpg_core/gfx_core_helper_tests_xe2_hpg_core.cpp
View File

@ -159,6 +159,7 @@ XE2_HPG_CORETEST_F(GfxCoreHelperTestsXe2HpgCore, givenOneCcsEnabledWhenGetEngine
HardwareInfo hwInfo = *defaultHwInfo;
hwInfo.featureTable.flags.ftrCCSNode = true;
hwInfo.featureTable.flags.ftrRcsNode = true;
hwInfo.featureTable.ftrBcsInfo = maxNBitValue(9);
hwInfo.capabilityTable.blitterOperationsSupported = true;
hwInfo.capabilityTable.defaultEngineType = aub_stream::ENGINE_CCS;
@ -247,6 +248,103 @@ XE2_HPG_CORETEST_F(GfxCoreHelperTestsXe2HpgCore, givenNotAllCopyEnginesWhenSetti
}
}
XE2_HPG_CORETEST_F(GfxCoreHelperTestsXe2HpgCore, givenFtrRcsDisabledWhenGettingGpgpuEnginesThenCCCSIsNotAdded) {
const size_t numEngines = 14;
HardwareInfo hwInfo = *defaultHwInfo;
hwInfo.featureTable.flags.ftrCCSNode = true;
hwInfo.featureTable.flags.ftrRcsNode = false;
hwInfo.featureTable.ftrBcsInfo = maxNBitValue(9);
hwInfo.capabilityTable.blitterOperationsSupported = true;
hwInfo.capabilityTable.defaultEngineType = aub_stream::ENGINE_CCS;
hwInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled = 1;
auto device = std::unique_ptr<MockDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(&hwInfo, 0));
auto &gfxCoreHelper = device->getGfxCoreHelper();
EXPECT_EQ(numEngines, device->allEngines.size());
auto &engines = gfxCoreHelper.getGpgpuEngineInstances(device->getRootDeviceEnvironment());
EXPECT_EQ(numEngines, engines.size());
struct EnginePropertiesMap {
aub_stream::EngineType engineType;
bool isCcs;
bool isBcs;
};
const std::array<EnginePropertiesMap, numEngines> enginePropertiesMap = {{
{aub_stream::ENGINE_CCS, true, false},
{aub_stream::ENGINE_CCS, true, false},
{aub_stream::ENGINE_CCS, true, false},
{aub_stream::ENGINE_BCS, false, true},
{aub_stream::ENGINE_BCS, false, true},
{aub_stream::ENGINE_BCS1, false, true},
{aub_stream::ENGINE_BCS2, false, true},
{aub_stream::ENGINE_BCS3, false, true},
{aub_stream::ENGINE_BCS3, false, true},
{aub_stream::ENGINE_BCS4, false, true},
{aub_stream::ENGINE_BCS5, false, true},
{aub_stream::ENGINE_BCS6, false, true},
{aub_stream::ENGINE_BCS7, false, true},
{aub_stream::ENGINE_BCS8, false, true},
}};
for (size_t i = 0; i < numEngines; i++) {
EXPECT_EQ(enginePropertiesMap[i].engineType, engines[i].first);
EXPECT_EQ(enginePropertiesMap[i].isCcs, EngineHelpers::isCcs(enginePropertiesMap[i].engineType));
EXPECT_EQ(enginePropertiesMap[i].isBcs, EngineHelpers::isBcs(enginePropertiesMap[i].engineType));
}
}
XE2_HPG_CORETEST_F(GfxCoreHelperTestsXe2HpgCore, givenNodeOrdinalSetoToCCCSWhenGettingGpgpuEnginesThenCCCSIsAdded) {
const size_t numEngines = 15;
DebugManagerStateRestore restorer;
debugManager.flags.NodeOrdinal.set(aub_stream::ENGINE_CCCS);
HardwareInfo hwInfo = *defaultHwInfo;
hwInfo.featureTable.flags.ftrCCSNode = true;
hwInfo.featureTable.flags.ftrRcsNode = false;
hwInfo.featureTable.ftrBcsInfo = maxNBitValue(9);
hwInfo.capabilityTable.blitterOperationsSupported = true;
hwInfo.capabilityTable.defaultEngineType = aub_stream::ENGINE_CCCS;
hwInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled = 1;
auto device = std::unique_ptr<MockDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(&hwInfo, 0));
auto &gfxCoreHelper = device->getGfxCoreHelper();
EXPECT_EQ(numEngines, device->allEngines.size());
auto &engines = gfxCoreHelper.getGpgpuEngineInstances(device->getRootDeviceEnvironment());
EXPECT_EQ(numEngines, engines.size());
struct EnginePropertiesMap {
aub_stream::EngineType engineType;
bool isCcs;
bool isBcs;
};
const std::array<EnginePropertiesMap, numEngines> enginePropertiesMap = {{
{aub_stream::ENGINE_CCS, true, false},
{aub_stream::ENGINE_CCCS, false, false},
{aub_stream::ENGINE_CCCS, false, false},
{aub_stream::ENGINE_CCCS, false, false},
{aub_stream::ENGINE_BCS, false, true},
{aub_stream::ENGINE_BCS, false, true},
{aub_stream::ENGINE_BCS1, false, true},
{aub_stream::ENGINE_BCS2, false, true},
{aub_stream::ENGINE_BCS3, false, true},
{aub_stream::ENGINE_BCS3, false, true},
{aub_stream::ENGINE_BCS4, false, true},
{aub_stream::ENGINE_BCS5, false, true},
{aub_stream::ENGINE_BCS6, false, true},
{aub_stream::ENGINE_BCS7, false, true},
{aub_stream::ENGINE_BCS8, false, true},
}};
for (size_t i = 0; i < numEngines; i++) {
EXPECT_EQ(enginePropertiesMap[i].engineType, engines[i].first);
EXPECT_EQ(enginePropertiesMap[i].isCcs, EngineHelpers::isCcs(enginePropertiesMap[i].engineType));
EXPECT_EQ(enginePropertiesMap[i].isBcs, EngineHelpers::isBcs(enginePropertiesMap[i].engineType));
}
}
XE2_HPG_CORETEST_F(GfxCoreHelperTestsXe2HpgCore, givenOneBcsEnabledWhenGetEnginesCalledThenCreateOnlyOneBcs) {
const size_t numEngines = 9;