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35 Commits

Author SHA1 Message Date
Igor Venevtsev fed673861f Add multiple root devices support to memory manager 
Related-To: NEO-2941

Change-Id: If4977c19dbd083f2d1559a40f9b4e911eab4859c
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2019-10-31 14:30:19 +01:00
Mrozek, Michal e6341f48bb Add extra settings file 
Change-Id: I49757d38a76cf7e3ae5357477296a4d4e6dcc84e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-17 13:26:14 -07:00
Dunajski, Bartosz 0337b58ee4 Remove dcFlush parameter from finish call 
Change-Id: Ifc808822399a100745a9d81bb5f6e45903a895fa
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-09-13 12:28:10 +02:00
Dunajski, Bartosz 89d1878cd6 Rename engine member in CommandQueue 
Change-Id: I01516616c164f19afbcd62d39a2a42d04ff768c9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-07-15 17:53:01 +02:00
Dunajski, Bartosz 0a8a77d47c Move enqueue blit logic to enqueueHandler 
Change-Id: Ibbad22906387c15243708d37b272601f4734697d
Related-To: NEO-3020
 2019-07-08 12:37:06 +02:00
Maciej Plewka 9e52684f5b Change namespace from OCLRT to NEO 
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-26 15:48:19 +01:00
Mateusz Hoppe 047f2bec87 Program correct addresses in EnqueueReadWriteBufferRect scenarios 
- SurfaceBaseAddress should be programmed with aligned address
this was not the case for certain origin and region values
- offset from aligned address added to operationParams

Change-Id: I0742b826dd0b70f0a6dedf436b850734fa015688
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-26 10:37:46 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Hoppe, Mateusz 509ed273c4 Refactor Ults finding hardware commands 
- use CPU address for found dynamicStateHeap address in
StateBaseAddress command

Change-Id: I2d857c5a069f5a8f46169d2047cdb27efd3502b8
 2019-02-04 17:26:37 +01:00
Dunajski, Bartosz 3ad33bf1b8 Allow Device creating multiple CSRs [3/n] 
Add CSR from Device to CommandQueue

Change-Id: Iaccf3c73d25e357242837677777d0513e81f520e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-23 10:51:34 +01:00
Mateusz Jablonski ead2e2ea6d Move createAllocationForHostPtr method to command stream receiver 
Remove not needed includes from command_queue.h

Change-Id: I45963bf005471bd7716d55471474299a15e27b62
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-30 17:49:08 +01:00
Filip Hazubski c75dc23b6e Change HWCMDTEST_F() tests to HWTEST_F() where possible 
Change-Id: Ibfe147a12b53f832723f83809770e1b203159f8f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-10-02 17:29:46 +02:00
Artur Harasimiuk 40146291ad Update copyright headers 
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-09-20 18:02:35 +02:00
Maciej Dziuban 049ba5c625 Revert "Improve build time: command_queue tests" 
This reverts commit 76c78f017e.

Change-Id: Icb7eb473a17de5c072ba1833812fa084c4873465
 2018-09-10 14:54:55 +02:00
Maciej Dziuban 76c78f017e Improve build time: command_queue tests 
Change-Id: I22f7788bacd4a36488d5b6d56bae79b1f4788625
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-07 13:38:22 +02:00
Artur Harasimiuk 02b8055897 Revert "Improve build time: command_queue tests" 
This reverts commit 41811852db.

Change-Id: I74d4dba4aa0d840ddd8eeacf5b40503ff54b7c5a
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-08-27 19:17:52 +02:00
Dunajski, Bartosz 41811852db Improve build time: command_queue tests 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Change-Id: Ia80a8bfed28789c6c7a53478cdd56f883d61adf3
 2018-08-27 14:13:06 +02:00
Maciej Dziuban b91c14f70e Delete Device::getBuiltIns() 
Change-Id: I9d1968dfb2ba4a56020fd17152119add726106e1
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-08-22 16:54:53 +02:00
Maciej Dziuban e0e48203d2 Move BuiltIns to ExecutionEnvironment 
Change-Id: Ib2a1b82cc7858c898bb32820aad106a01d1325ad
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-08-21 23:15:47 +02:00
Stefanowski, Adam 623314665b Set valid "max number of threads" in MEDIA_VFE_STATE 
Change-Id: Icd55fe6b5cae5a92021d2692fe09c19535e64121
 2018-07-19 15:17:17 +02:00
Koska, Andrzej fe56c57318 Tracking the internal allocation when creating a buffer 
This fix prevents the creation of a buffer from the pointer
obtained from clEnqueueMapBuffer

Change-Id: I203f2d5263eeb02fe0d73bc9db159438af3cf1fc
 2018-06-08 07:33:07 +02:00
Zdanowicz, Zbigniew b27eee1f7a Refactoring ULTs around HW tests 
Splitting HW tests into CMD-unrelated HW tests
and CMD-related HW tests

Change-Id: Ifbdcabdd0d6f4082e976363a3d8bcd5e7a9ce6c1
 2018-05-18 11:45:45 +02:00
Maciej Dziuban 541735d932 L3 programming refactor 3/n 
- Add L3UltHelper to be able to tell if L3 config is programmable
- Run L3 config kernel tests according to its output

Change-Id: I55b76e2da325d28f62b0bde20250b68f02154ae2
 2018-05-10 12:43:10 +02:00
Dunajski, Bartosz 82c9acddde Improve including common reg_configs header 
Change-Id: I7fa22c2caffd0004269eb0d4f4fcdfd7621572af
 2018-04-26 14:48:50 +02:00
Artur Harasimiuk 75d497a9a9 separate BuiltinDispatchInfoBuilder from built_ins.h 
We don't need BuiltinDispatchInfoBuilder in every place where built ins
are used. specifically in .cpp files generated from kernel binary.

Change-Id: Ie739951cdc93873993f78ad14cee656122af51fd
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-04-19 12:32:13 +02:00
Mrozek, Michal de315db953 [24/n] Internal 4GB allocator. 
- Refactor tests for better maintenance
- Remove duplicated code.

Change-Id: I154cad43610497d2e1cabf99217820735d3868cd
 2018-03-30 09:12:08 +02:00
Mrozek, Michal 9bdf01468e [20/n] Internal 4GB allocator. 
- Switch to internal heap for kernel ISA allocations.
- remove IH from various functions
- remove IHState from CSR , IH is never dirty
- ISA is no longer copied on enqueue calls.

Change-Id: I0099cf2a9ebab6192ea03a74dd35f7da963fd5a5
 2018-03-28 16:07:26 +02:00
Mrozek, Michal 1602fa5a88 [7/n] Internal 4GB allocator 
- rename getBase to getCpuBase
- change some test names accordingly.

Change-Id: I6fb2e4714298250147ea7766a916d7f5d62edc54
 2018-03-05 22:16:14 +01:00
Zdanowicz, Zbigniew 45dedb37f3 For HostPtr surfaces of enqueue calls use GPU address 
Change-Id: I67bf5076d23d43438f5e82c5cb6cbd3b9ed2f152
 2018-02-14 15:44:27 +01:00
mplewka 4db1e3af6a Check zeroCopy flag for r/w images/buffers 
Change-Id: I7047ae8458bdf3528d6014137522a37561d15ab6
 2018-02-08 13:55:44 +01:00
Mateusz Jablonski ea021f8d69 Cmake refactor part 1: fix dependencies with including os_inc.h 
Remove some not needed includes

Change-Id: I158ad663ccfcec4822e3768df9d05090c5e096f9
 2018-02-08 09:40:40 +01:00
mplewka 251de14ee6 Enable zero copy for enqueueWriteBufferRect with hint 
Change-Id: I411f00b98056307906c02d34e793cefe460735ba
 2018-01-25 11:48:10 +01:00
Mateusz Jablonski 13ac81f465 Change pipeline select programing 
- Program one PS with gpgpu selection and media sampler
- Program PS only when media sampler requirement changed
  or when preamble was not sent

Change-Id: I85ba3f74087733e79d048e120aeb8b4b04796e00
 2018-01-18 14:39:47 +01:00
Chodor, Jaroslaw 044fd1ab81 Fixing IntDescr programing for blocked cmd and MT 
Fixing InterfaceDescriptor programming for
blocked commands when MidThread preemption is
enabled
Additionally, fixing couple of tests that block
global preemption enabling in ULTs

Change-Id: I454c9608f8606f23d7446785ac24c7c7d8701ae0
 2018-01-17 12:19:07 +01:00
Brandon Fliflet 7e9ad41290 Initial commit 
Change-Id: I4bf1707bd3dfeadf2c17b0a7daff372b1925ebbd
 2017-12-21 00:45:38 +01:00