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15ba4b6788c1e8aa0f359a1a93abceeae864fc94
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1985 Commits

Author SHA1 Message Date
Mrozek, Michal
15ba4b6788 Add function to check whether resolves are required 
Change-Id: I0f81a4101b626ad7ddc17f19daabdf7a15c34467
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-05 13:25:24 +02:00
Mrozek, Michal
3f433baf38 Force stateless compilation for builtins path. 
Change-Id: I8ee826fdcc455a3770fa54ee635aaeff62ee35e6
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-05 13:07:21 +02:00
Piotr Fusik
8278d58841 Pass by const reference. 
Related-To: NEO-3008

Change-Id: I90e430ccfc049ccb164865e29b6ec3f6f7e98b86
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-09-05 12:35:00 +02:00
Mrozek, Michal
46b3012eb5 Force stateless compilation when device supports shared system memory 
Change-Id: I8e11ef82baf010a9a400bc9d733b8ec37a9fbb21
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-05 12:34:32 +02:00
Pawel Wilma
849ff8c6d1 Add per-DSS back buffer programming 
Related-To: NEO-3220

Change-Id: Ide341205a283d8973b5c11f3a953eabbda14262f
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2019-09-05 11:45:44 +02:00
Mrozek, Michal
0cd93d6d7d Disable 64 bit integer atomics on icllp. 
Change-Id: If24c40414d10a2bb9ec6e0d5fa3296a873a0a062
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-05 10:17:14 +02:00
Mrozek, Michal
29613a2b1a Allow to set shared system memory pointers in constant buffers. 
Change-Id: Ie2a811c0f50abf667df82517abf2291e00a18460
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-05 07:36:02 +02:00
Jobczyk, Lukasz
b25422deb1 Refactor a createUnifiedMemoryAllocation method 
Related-To: NEO-3330

Change-Id: I3703d2474b7b3c91d584c165952d2762c7423bab
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-09-04 19:45:11 +02:00
Dunajski, Bartosz
f4008336f8 Dispatch blit operation in blocked path 
Change-Id: I2230bde051449bf22c74c112bbe5719aad644533
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
 2019-09-04 18:29:46 +02:00
Mrozek, Michal
bf3210c1cd Add debug flag to override shared system memory capabilities. 
Change-Id: I241221757aaab8780c1f2542ed835a03e710adb6
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-04 17:24:38 +02:00
Dunajski, Bartosz
6dae106f07 Improve TimestampPacket residency flow 
- Dont call makeResident in enqueueHandler for blocked path
- Fill csrDeps for blit enqueue only in unblocked path
- Call makeResident on all dependencies during blocked command flush

Change-Id: I6658e4695483bee63eca205f85687ea5f951b099
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-09-04 16:33:17 +02:00
Dunajski, Bartosz
45707269c9 Dont use system memory for printf surface 
Change-Id: Iebcee7fd1e7b35333013b90c0958314883c67ac8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-09-04 16:17:29 +02:00
Jobczyk, Lukasz
a79b682fc2 Move a GfxPartition to the core dir 
Related-To: NEO-3677

Change-Id: Ia89ba93eefbb2921ef7d64bde7ed4114a0c78e0d
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-09-04 15:42:25 +02:00
Jobczyk, Lukasz
76fe09c2a9 Handle page faults while accessing unified memory 
Related-To: NEO-3330

Change-Id: I7e21f894e9d1c82598954c49342d1f65af07498f
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-09-04 13:28:53 +02:00
Dunajski, Bartosz
cf979c3bc0 Remove getWaTable() method 
Change-Id: I508103a0d46ae94b55891c8a7ef104fb47b0b3e0
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-09-04 11:32:55 +02:00
Mrozek, Michal
c1f0949a67 Return error on device queue creation attempts if not supported. 
Change-Id: I571433ec3f02ac7570c85949b636c86efc133abe
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-03 14:59:02 +02:00
Mateusz Jablonski
1635bef9a8 Tests update: create memory manager for command stream receiver 
Change-Id: I89b577759d6da112049a8b0135ae488f2849c140
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-09-03 14:24:02 +02:00
Dunajski, Bartosz
47a0c43ad3 Copy EnqueueProperties to KernelOperation in blocked path 
Change-Id: I5b9999901b5b75fc3165f9fa389857732aca2849
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
 2019-09-03 14:11:40 +02:00
Dunajski, Bartosz
ac6b1e038d Remove not used code 
Change-Id: Id79398b872325e096c53863cdfc9acb86ff047a8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-09-03 14:11:10 +02:00
Mrozek, Michal
288193c6b4 Simplify fillExecObject code. 
- remove defines
- always go for 64 bit addresses, ( all our GPU VA addressees are 64 bit )

Change-Id: Ic650feddc964e7dad45bad4248c0ba4dcf23e886
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-03 10:44:20 +02:00
Mateusz Jablonski
94761a78d6 Unregister engine during destruction of related command stream receiver 
Change-Id: I9225439b67a11c02998296bd9c3fbc4e2149cae2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-09-03 09:02:41 +02:00
Mrozek, Michal
a5880f19af Remove not used parameter. 
Change-Id: Ib0407bc479e60d1b164222bb2326a1987f8a94f1
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-03 07:52:46 +02:00
Mrozek, Michal
db8cd0e575 Report 64 bit integer atomic extension basing on caps. 
Change-Id: Ib4241c082eb03edcb43bb79d2eef3af8b5bbe00d
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-09-02 17:58:05 +02:00
Jobczyk, Lukasz
86edfea3bf Fix OCL specific registry path in a core dir 
Change-Id: I5b7792582e6c77a29ffb42b8fe024bc826ae1867
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-09-02 17:33:50 +02:00
Dunajski, Bartosz
712313a3be Remove not used parameter 
Change-Id: I89b8e3f3cd835b6bb3896fb3951941854e804786
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-09-02 14:44:32 +02:00
Dunajski, Bartosz
2275f8df0e Rename CommandMarker to CommandWithoutKernel 
Change-Id: Ie19c510465a36ea517a79db9eeac5b5993e44c81
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-09-02 12:53:58 +02:00
Dunajski, Bartosz
e7e23cd0b4 Remove queueBlocked restriction from blitEnqueueAllowed 
Change-Id: If7fcd15cbbb4e749d16b9d028dac33a8a7b20bde
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
 2019-09-02 12:53:21 +02:00
Krzysztof Gibala
6a221bc7fc Refactor flags validation 
-create masks for buffer and image flags
-create common file for mem_obj_helper
-refactor parseMemoryProperties
-remove:
 checkUsedFlagsForBuffer, checkUsedFlagsForImage,
 addCommonMemoryProperties, addBufferMemoryProperties,
 addExtraMemoryProperties, addImageMemoryProperties

Related-To: NEO-3132
Change-Id: I3c147799de7b104d10d25b2f5262aeda58241d84
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2019-09-02 12:42:02 +02:00
Dunajski, Bartosz
93aeb1f29a Dont call mapAuxGpuVA() when PTManager is not supported 
Change-Id: I8ead56c289a83a720f150d89cdbfd4d44dfea1ee
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-09-02 10:39:53 +02:00
Jobczyk, Lukasz
a9a7408cf9 Fix build issues after moving debug settings reader to core dir 
Change-Id: I0f9d5b4c579367c08ffdd8476bfd2949102bb37f
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-09-02 09:47:31 +02:00
Maciej Dziuban
7e6ef7c208 Add helpers for MI_ATOMIC address 
Setter in HardwareCommandsHelper
Getter in UnitTestHelper

Change-Id: I26610d0ccf0113b2b3d3c8ba2d1edd5bf8b41175
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-09-02 08:52:59 +02:00
Maciej Plewka
7827501b91 Add returned status to MemoryOperationsHandler 
Change-Id: Ic8685e3711cec03d8f83d371fa7152ee095a47a0
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-09-02 08:42:50 +02:00
Dunajski, Bartosz
77e22bd81b Refactor dispatching blit enqueue 
Change-Id: Ibe499e4815a16d5884510c6804221d2b74dbffd4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
 2019-09-02 07:56:50 +02:00
Mrozek, Michal
094068807e Change default value of flushL3cache to true. 
Change-Id: Ibaf682fcbe54ebb97a01575b1891ccfe3f60fc4a
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-30 14:42:21 +02:00
Mrozek, Michal
0666da693e Improve uncached flag. 
- When resource is uncached for surface state and not used in stateless manner
then it doesn't need to flush cache
- Minor cleanup

Change-Id: I4cfe5a6fe3e666200407d9acdd89e6f64b2b3eed
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-30 12:17:27 +02:00
Mrozek, Michal
ae201a47d3 Improve uncached resources handling. 
- Change kernel to properly detect true stateless resources
- do not turn of stateless l3 if arg is used in pure stateful manner
- refactor variable names to better reflect what they do
- improve mock kernel with internal to have setKernelArg capabilties

Change-Id: I2cdde04f2144d9b86dc1486126632db0fd7cad49
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-30 10:51:28 +02:00
Mrozek, Michal
33f6c7f0da Add new flag to disable L3 for stateful accesses. 
- With this flag resource will not be cached in L3 for stateful accesses.

Change-Id: Icf9a393ab92d55c2cdf30444420ea40da0d5630c
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-29 23:38:26 -07:00
Sebastian Sanchez
08a3046e4d Add isL3Configurable() method to HwHelper 
Add isL3Configurable() method to HwHelper to query if L3 is
configurable using an HwHelper instance.

Change-Id: I0f350ae292f12980611a250301293378dbd8dd91
Signed-off-by: Sebastian Sanchez <sebastian.sanchez@intel.com>
 2019-08-30 07:19:40 +02:00
Mrozek, Michal
81b055024e Change the offset calculation to use CCS. 
Change-Id: I07a878dd6861883e47062b89b5af57fcb7f5aa9b
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-29 14:16:07 +02:00
Jobczyk, Lukasz
10795c716f Move DebugSettingsReader to a core dir 
Related-To: NEO-3677

Change-Id: I3374abde6717be20c064ec6d65c0751a783f5138
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-08-29 13:49:40 +02:00
Igor Venevtsev
7be1853013 Correct releasing pin Buffer Object in DrmMemoryManager 
Change-Id: I451449b90de03345d8fb4f7858ca04a56978fea7
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2019-08-29 11:50:18 +02:00
Mateusz Jablonski
4974d08a29 Correct releasing reserved memory in memory manager 
Change-Id: I8525410153d85ecd8075b04db96831f887737288
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-08-29 10:55:15 +02:00
Andrzej Swierczynski
91af33d825 Update images to work in media compression scenarios 
Related-To: NEO-3613
Change-Id: I338f465435207400156d42a45e5d5b5915489715
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
 2019-08-28 14:15:52 +02:00
Mrozek, Michal
a54dcd98b3 Register cache flushes when ISA allocation is destroyed. 
- when ISA is being destroyed , check what are the users of it and register
instruction cache flushes there.
- For subsequent enqueue commands this would result in properly flushed
instruction cache.

Change-Id: I3791cd77ee42da9f87508c64a65cdc6238950858
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-28 14:15:19 +02:00
Dongwon Kim
25d9e4533d DRM Graphic allocation assigns original hostPtr as cpuPtr 
Change-Id: I9ba282b130b5fb9b674e1ceb2f87183f218ab140
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
 2019-08-28 13:35:18 +02:00
Igor Venevtsev
3371ed12f6 Refactor DrmMemoryManager::freeGraphicsMemoryImpl 
- remove default value from synchronousDestroy param in
  DrmMemoryManager::unreference
- unreference BufferObject in synchronous mode  before release
  GPU and CPU memory
- add ULTs

Related-To: NEO-2877

Change-Id: I8065c27923cf4259a0fcd0f6d8d6d5b7c4b810c0
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2019-08-28 12:30:20 +02:00
Mateusz Jablonski
18982bd016 Move memory for slm window to memory manager 
remove redundant methods from MockDevice

Related-To: NEO-3007

Change-Id: I9cc819b9c9118dbb667f5bf87d1bf15787f9b67f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-08-28 12:09:17 +02:00
Jobczyk, Lukasz
c7ad27d430 Add a HostToHost copy type in the Memcpy 
Related-To: NEO-3570, NEO-3610

Change-Id: I84f8e2150b2d3760d968e94ae85638d91cb77a54
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-08-28 10:55:07 +02:00
Mrozek, Michal
e7a4635dd6 Add mechanism to register instruction cache flushes. 
- With this mechanism csr with add pipe control with instruction cache flush
prior to enqueue, to make sure that this cache is flushed.

Change-Id: I664f212427686e9957027c7cf6c0dab17d2a3cac
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-28 07:56:41 +02:00
Krzysztof Gibala
84c801e28b Remove OCL object from MemoryProperties 8/n 
Refactor MemoryPropertiesFlags to bitfield

Related-To: NEO-3132
Change-Id: I7092b16d15cec962e94c992696bd9845ce86f642
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2019-08-27 17:28:47 +02:00