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172 Commits

Author SHA1 Message Date
Tomasz Biernacik 310d8c2e58 fix: allow ringBuffer in coherent memory only for Xe2+ 
Related-To: NEO-9421

Signed-off-by: Tomasz Biernacik <tomasz.biernacik@intel.com>
 2025-05-06 15:31:59 +02:00
Tomasz Biernacik eff2d1cde8 performance: change usage for semaphoreBuffer on integrated devices 
Related-To: NEO-9421

Signed-off-by: Tomasz Biernacik <tomasz.biernacik@intel.com>
 2025-04-16 09:07:05 +02:00
Kamil Kopryk dd3d294f87 performance: cache MOCS values 
This change caches the most used MOCS values:

* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED);
inside gmmHelper class during initialization to avoid repeated
calls of virtual functions, branches and/or gmm lib access.

and adds more readably corresponding getters:
* getL1EnabledMOCS
* getL3EnabledMOCS
* getUncachedMOCS

If force all resources uncached is called,
these 3 cached mocs values are reinitialized

It also changes the order of gmmHelper members, to avoid
not needed padding after addressWidth
and simplifies logic in getMocsIndex function
for xehp and later products.

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-04-14 14:12:48 +02:00
Tomasz Biernacik 194c3058b8 performance: change usage for ringBuffer on integrated devices 
Related-To: NEO-9421

Signed-off-by: Tomasz Biernacik <tomasz.biernacik@intel.com>
 2025-04-14 12:25:38 +02:00
Tomasz Biernacik 18435df04c fix: unify deferring MOCS to PAT 
Related-To: NEO-14643

Signed-off-by: Tomasz Biernacik <tomasz.biernacik@intel.com>
 2025-04-11 20:10:25 +02:00
Szymon Morek 3fff3dd77b fix: set misaligned source memory 1-way coherent 
Related-To: NEO-14443

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-03-28 14:16:45 +01:00
Szymon Morek bb10290828 fix: make misaligned user memory 2-Way coherent 
Related-To: NEO-9004

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-03-21 17:56:37 +01:00
Lukasz Jobczyk 8ede026c5d refactor: Use gmm resource info to print unknown usage 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-03-10 16:28:31 +01:00
Lukasz Jobczyk 5a04d1e10a refactor: Print unknown gmm usage type value 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-03-05 10:34:40 +01:00
Filip Hazubski 4c7900008f refactor: Change wording from NonCopyableOrMovable to NonCopyableAndNonMovable 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2025-02-17 14:19:10 +01:00
Lukasz Jobczyk 09e23804dc refactor: Use timestamp types for events and in order nodes 
Switching tagAllocation into UC causes regressions in non event
scenarios. It is no longer used as dependant type for semaphores.
Restoring previous GMM_USAGE settings for tag.
Marking events and in order nodes using only timestamp types as they
have proper GMM_USAGE settings already and can be both in smem and lmem.

Resolves: NEO-13847

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-01-30 12:20:38 +01:00
Lukasz Jobczyk 7eac78d253 refactor: Make semaphore dependant resources UC 
Change for tagBuffer type on Windows. Timestamp types are already UC on all DC
flush platforms regardless of OS.

Resolves: NEO-13847

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-01-28 14:51:28 +01:00
Vysochyn, Illia afd22999cc refactor: Adjust RENDER_SURFACE_STATE structures naming 
Performs minor renaming (mostly capitalization) in order to align with
specification.

Renames L1_CACHE_POLICY to L1_CACHE_CONTROL.

Related-To: NEO-13147

Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
 2024-11-29 09:43:11 +01:00
Lukasz Jobczyk e687e11ab1 performance: Add CCS Optimization 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-10-23 11:35:57 +02:00
Compute-Runtime-Validation e10998db45 Revert "performance: Add CCS Optimization" 
This reverts commit e7b3a40aa7.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-10-22 05:52:14 +02:00
Lukasz Jobczyk e7b3a40aa7 performance: Add CCS Optimization 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-10-21 09:59:14 +02:00
Mateusz Jablonski 5912b43841 refactor: remove dead code 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-09-17 13:41:50 +02:00
Mateusz Jablonski 54bda0e986 fix: In Linux CL/GL sharing 
- always issue flush request before export

Apparently it's expected to flush the object (which might convert them
from one format to another for export, or remove aux buffer uses or
anything not supported by export).

- use modifier to select tiling mode

Previously we just assumed that whatever tiling mode was picked by mesa
will match the one picked by GMMLIB but that's not always the case
and in particular on Arc and Xe it doesn't work ... Mesa picks Tile4
and GMMLIB picks Tile64 ...

Fixes: #761
Fixes: #736

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-09-06 21:40:18 +02:00
Lukasz Jobczyk a54a3bf624 performance: Optimize heap handling when mitigate dc flush 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-09-06 04:33:41 +02:00
Compute-Runtime-Validation dc84b163b5 Revert "performance: Optimize heap handling when mitigate dc flush" 
This reverts commit 9249c5c65c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-09-03 08:33:20 +02:00
Lukasz Jobczyk 9249c5c65c performance: Optimize heap handling when mitigate dc flush 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-09-02 18:12:19 +02:00
Compute-Runtime-Validation d3f32358e9 Revert "performance: Optimize heap handling when mitigate dc flush" 
This reverts commit 452f4b1dd1.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-08-31 06:03:18 +02:00
Michal Mrozek ce3cb71773 performance: add debug flag to control timestamp caching 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2024-08-30 16:32:06 +02:00
Lukasz Jobczyk 452f4b1dd1 performance: Optimize heap handling when mitigate dc flush 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-08-30 10:54:54 +02:00
Compute-Runtime-Validation 63528e70a7 Revert "performance: Optimize heap handling when mitigate dc flush" 
This reverts commit 1a8149e91c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-08-30 05:59:25 +02:00
Lukasz Jobczyk 1a8149e91c performance: Optimize heap handling when mitigate dc flush 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-08-29 17:03:55 +02:00
Compute-Runtime-Validation 956dd8e17d Revert "fix: set properly resource params when setAllocationType" 
This reverts commit 2e0884a301.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-08-24 05:01:38 +02:00
Katarzyna Cencelewska 2e0884a301 fix: set properly resource params when setAllocationType 
gmm params: usage, cachable and resource info
should be set properly when override allocation type

Resolves: HSD-22020344331
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-08-23 16:57:23 +02:00
Katarzyna Cencelewska 153cda9a9f feature: add debug flag to force gmm system memory resource type 
Related-To: NEO-10157
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-07-18 14:05:16 +02:00
Dominik Dabek 76e8be5c39 fix(ocl): handle gl sharing displayable textures 
Displayable textures always need dc flush.

Related-To: NEO-11694

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-06-27 13:43:20 +02:00
Michal Mrozek 0e29ab8387 performance: add debug key to control cpu cacheablitiy 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2024-06-19 12:34:06 +02:00
Katarzyna Cencelewska 0f0e7403bd fix: use gmm type ocl system buffer for tag buffer 
Related-To: NEO-11690, NEO-11698
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-06-18 20:54:19 +02:00
Maciej Plewka 32cfa3d497 fix: stop using LocalOnly flag on Xe2+ platforms 
Related-To: NEO-11391
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-06-10 11:26:20 +02:00
Lukasz Jobczyk 9a2fa1dcb1 fix: Override prefer no cpu access for dc flush mitigation 
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-06-05 10:26:45 +02:00
Lukasz Jobczyk a9269939f6 fix: Defer MOCS to PAT 
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-05-27 10:26:26 +02:00
Compute-Runtime-Validation ce0ccacef6 Revert "fix: Defer MOCS to PAT" 
This reverts commit 6c75ec3116.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-05-25 06:22:22 +02:00
Lukasz Jobczyk 6c75ec3116 fix: Defer MOCS to PAT 
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-05-24 15:30:49 +02:00
Katarzyna Cencelewska 12d1bce6b9 fix: change gmm resource for externalHostPtr 
Resolves: NEO-10157

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-05-22 16:50:17 +02:00
Compute-Runtime-Validation 94a4bbac57 Revert "fix: change gmm resource for externalHostPtr" 
This reverts commit 63843862df.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-05-21 07:43:53 +02:00
Katarzyna Cencelewska 63843862df fix: change gmm resource for externalHostPtr 
Resolves: NEO-10157

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-05-21 00:43:29 +02:00
Lukasz Jobczyk a230c762e0 feature: Adjust PATs for dc flush mitigation 
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-04-16 13:31:02 +02:00
Lukasz Jobczyk 8a0c425495 feature: Mark selected resources as UC when mitigating dc flush 
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-04-12 12:52:13 +02:00
Mateusz Jablonski 78a4a92b44 refactor: reorder members to reduce internal padding in structs 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-03-25 15:50:00 +01:00
Mateusz Jablonski 1e1d675606 fix: disable passing FtrTile64Optimization to gmmlib 
add debug key to control if the value should be passed

Related-To: NEO-10785
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-03-15 17:42:53 +01:00
Mateusz Jablonski 8ae4a3bc7a fix: pass Sku/Wa tables for gmm without additional translations on Windows 
Related-To: NEO-10623
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-03-06 14:58:58 +01:00
Katarzyna Cencelewska d0b009901c fix: use proper gmm resource type for uncache resources 
when new coherency model

Resolves: NEO-9657
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-01-31 15:26:11 +01:00
Katarzyna Cencelewska eec01e500a fix: non-coherency issue on arl 
Resolves: HSD-15015200338
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-01-26 10:26:33 +01:00
Katarzyna Cencelewska b4d2170a6d fix: add missing gmm type to getUsageTypeString 
Related-To: HSD-18031172224
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-01-25 14:12:31 +01:00
Katarzyna Cencelewska 7bbe57c671 feature: add debug info for logging pat indexes 
Related-To: HSD-18031172224
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-01-23 13:34:35 +01:00
Lukasz Jobczyk 7b8abd8fff fix: pass GMM to Drm::getPatIndex 
Related-To: NEO-9543

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-01-08 09:14:14 +01:00