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68 Commits

Author SHA1 Message Date
Jaime Arteaga 1aca16a7ac Add experimental_properties for indirect access 
Read zebin experimental properties indicating whether a kernel has
indirect access and if so, ignore calls to zeKernelSetIndirectAccess.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2021-02-10 14:23:43 +01:00
Igor Venevtsev 3df6110a17 Add extra parameters to setArgStateful() 
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2021-02-05 12:24:27 +01:00
Jaime Arteaga 2fa27ebe73 Move ISA at kernel creation time (2) 
For internal kernels, move ISA only at creation time. For user
kernels, do it a module creation time.

Related-To: LOCI-2009

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2021-02-04 21:03:41 +01:00
Mateusz Hoppe f7613a5827 Program surface state when debugging is enabled 
- surface state for debugSurface should be set when
kernel is compiled for debug

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2021-02-02 17:53:12 +01:00
Jaime Arteaga afffedebb2 Move ISA at kernel creation time 
Instead of moving the ISAs for all kernel in a module when the module
is created, move the ISA when the kernel is created, to avoid
unnecessary memory transfers.

Related-To: LOCI-2009

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2021-02-01 13:28:38 +01:00
Young Jin Yoon 4168ee8120 Print output from Kernel dtor to avoid segfault 
Related-to: LOCI-1912
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
 2021-01-21 23:00:15 +01:00
Jaime Arteaga 05b5ad37ea Initialize kernel private surface when kernel is created 
This instead of when the associated module is created, to avoid
allocating memory for kernels that are never created nor used.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2021-01-13 17:22:40 +01:00
Jaime Arteaga 08655a315c Revert "Initialize kernel private surface when kernel is created" 
This reverts commit be2a87fe98.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2021-01-10 22:56:32 +01:00
Jaime Arteaga be2a87fe98 Initialize kernel private surface when kernel is created 
This instead of when the associated module is created, to avoid
allocating memory for kernels that are never created nor used.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2021-01-08 19:22:17 +01:00
Slawomir Milczarek 55f3c8f134 Add resolve capability for compressed USM device allocations 
Related-To: NEO-5107

Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
 2021-01-08 12:16:26 +01:00
Jaime Arteaga d7ea713c5f Revert "Initialize kernel immutable data when kernel is created" 
This reverts commit a6ac10088c.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2021-01-04 11:11:39 +01:00
Kamil Diedrich e0da0e1868 Fix for block load and store 
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2020-12-31 12:28:26 +01:00
Jaime Arteaga a6ac10088c Initialize kernel immutable data when kernel is created 
This instead of when the associated module is created, to avoid
allocating memory for kernels that are never created nor used.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-12-29 19:29:10 +01:00
Krystian Chmielewski 4948c39d39 Remove executionEnvironment from KernelInfo 
Related-To: NEO-3739
 2020-12-16 14:56:57 +01:00
Jim Snow 37cd49330c Implement ZE_CACHE_CONFIG_FLAG_LARGE_DATA for zeKernelSetCacheConfig 
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
 2020-12-16 07:00:13 +01:00
Zbigniew Zdanowicz b32b5784c2 Fix calculations for offseted addresses 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-12-11 20:25:54 +01:00
Jaime Arteaga beb3c5ed05 Add support for global work offset extension in L0 
Add experimental extension to set global work offest in L0.
Current L0 specification does not have interface to export
experimental function symbols, so for now, applications need
to find the symbol like with dlsym on Linux.

A blackbox test showing functionality is also added.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-12-09 07:33:40 +01:00
Zbigniew Zdanowicz 19bea962d0 Use imported host pointers in the driver when available 
Related-To: NEO-5126

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-12-03 13:52:14 +01:00
Jaime Arteaga be90b9ff93 Add support for ZE_DEVICE_MEM_ALLOC_FLAG_BIAS_UNCACHED 
Add support for device and shared allocations that use the
ZE_DEVICE_MEM_ALLOC_FLAG_BIAS_UNCACHED flag, whether the
kernel using the memory is stateless or statefull.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-12-02 10:43:45 +01:00
macabral 720ba46548 Register kernel Elf for debugging purpose 
Signed-off-by: macabral <matias.a.cabral@intel.com>
 2020-12-01 17:16:14 +01:00
Maciej Plewka c80353587f Patch bindless offset 
Related-To: NEO-4724

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-11-20 23:02:36 +01:00
Jaroslaw Chodor 451f1e7e0d Fixing residency of global const/var buffers 
Signed-off-by: Jaroslaw Chodor <jaroslaw.chodor@intel.com>
 2020-11-18 13:15:06 +01:00
Mateusz Hoppe 0f42ef1ed7 Differentiate between users ISA and internal ISA allocation 
Related-To: NEO-5240

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-11-16 13:16:30 +01:00
Jaime Arteaga b3700370a6 Remove dead-code functions for cache intermediate/last-level config 
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-11-14 04:23:36 +01:00
Jaroslaw Chodor d181a2e5a3 Fixing zeKernelGetProperties 
Additionally, adding zell_world_jitc_ocloc BB test

Change-Id: If3b8c7e4bd4a789ec1b4f4de55ab21e91c1e7afa
 2020-11-02 19:38:39 +01:00
Jaroslaw Chodor 345e56a151 Zebin improvements 
* cleaning-up per-thread buffer size calculations
* fixing default slm alignment to 16
* adding scratch space slots
* renaming slm addressing mode
* adding support for zeinfo version

Change-Id: I0450353788b8488a685976d7f1dd26a44360383c
 2020-10-29 16:33:21 +01:00
Filip Hazubski c3b8727e97 Remove opencl includes from HwHelper 
Resolves: NEO-3964

Change-Id: Ie891ba6a205a89b41ca2cce0fa386dc4c93a0aaa
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2020-10-23 11:10:52 +02:00
Bartosz Dunajski 1926ef8319 is_simt_thread token support 
Change-Id: I8cee6ff26229f0f492ba0d1e5e61d6e46e0c2486
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-10-21 14:14:43 +02:00
Krystian Chmielewski 9f08a60a20 KernelInfo Refactor 
Using kernelDescriptor.kernelMetadata.kernelName instead of
kernelInfo.name

Change-Id: I11f5721d8072a3beccb573cec4bea56cf14cf0f9
 2020-10-20 13:18:09 +02:00
Bartosz Dunajski 27f9a95af2 Refactor: Common helper for Blit and CPU memory transfers 
Change-Id: Icc61f82517e75e3066e441494af3bf9a7ffbbeef
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-10-12 18:29:42 +02:00
Bartosz Dunajski fb0651521d Linker: Fix incremental patching for local memory allocations 
Change-Id: Ib85e4a2abc8a62477003853aa0c35f8107444f4e
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-10-09 09:13:42 +02:00
Maciej Dziuban 138f04bdcd Enable L1 cache for Tigerlake 
Change-Id: I33513ed084f9d06ceca11315cac03f1b682db535
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Related-To: NEO-4832
 2020-10-06 13:26:54 +02:00
Jaroslaw Chodor df2e76f526 Fixing residency of extern device functions 
Change-Id: Icad696cbf6fb3fc0276f0d0d488bf92091525d9b
 2020-10-02 12:27:59 +02:00
Spruit, Neil R 7ea864cbd2 Update Kernel Buffer Argument given nullptr value assignment 
- Given a nullptr Arg Buffer value, the argument value in cross thread
data must be updated to be a nullptr value especially given the argument
could have been set previously to a buffer that may not exist or should
not be used during this call to the kernel

Change-Id: Ie3a03ce25a4bb0b5e186863cc912a55863d0fb69
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
 2020-09-25 00:43:00 +02:00
Bartosz Dunajski bb788b4cc4 Copy ISA on CPU if BCS is not supported 
Change-Id: I18b0bea70a0104dfa3f930ee360b9967f8d615be
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-09-23 16:47:02 +02:00
Zbigniew Zdanowicz 03c8bbf054 Use non-coherent buffers as kernel args in L0 
Change-Id: I78f699779d65b694fa8de82c8e19dc07f7c176c3
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-09-23 07:16:13 +02:00
Bartosz Dunajski 9a29a75600 Use BCS to copy ISA if required - part 2 
Change-Id: I8a06433640cb3ce6de8f1e1a367501572a6f77de
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-09-22 10:43:12 +02:00
Zbigniew Zdanowicz 394e626db9 Refactor programming of surface states 
Related-To: NEO-5069

Change-Id: Id7442fcdcc8c7df57f00e8dc383c11869bf1a677
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-09-16 11:54:00 +02:00
Mateusz Hoppe a5c556fe11 Create TestEnvironment in ze_intel_gpu_core_tests 
Change-Id: I85306b59e220c34ee6b43790b59f5ad96ea51eca
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-09-11 09:53:58 +02:00
Jaime Arteaga 9ceff528b5 Add toggle for enabling indirect access 
Change-Id: I35d3e1580cd51fea5f6b139d524737e400f6e1bc
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-09-08 00:09:28 -07:00
Mateusz Jablonski 92aef012d9 Add implementation of module dynamic link 
Change-Id: I80c9ed1b5f6b0243e89515c393d89c4f86e5d83a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2020-08-10 11:21:31 +02:00
Aravind Gopalakrishnan 513d9bdb83 Allow multiple combinations of kernel indirect access flags 
Change-Id: I96c96e1626f97dae22004eab9ea09ccd2313cb22
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@intel.com>
 2020-08-04 12:15:22 -07:00
Maciej Plewka 0abf2b20af Update mock dispatch kernel encoder 
Releated-To: NEO-4568

Change-Id: I0e0c5308d7cc73a0295ec094001d75bb08f4ac0f
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-08-04 17:27:04 +02:00
Jaime Arteaga 902fc2f6c4 level-zero v1.0 (2/N) 
Change-Id: I1419231a721fab210e166d26a264cae04d661dcd
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: macabral <matias.a.cabral@intel.com>
Signed-off-by: davidoli <david.olien@intel.com>
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@intel.com>
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
Signed-off-by: Latif, Raiyan <raiyan.latif@intel.com>
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2020-08-03 13:11:13 +02:00
Jaime Arteaga f29dacd5c0 Add new v1.0 kernel properties 
Change-Id: Ic194e2176ca96bd255e8108ac494ef4006cf6712
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-07-31 06:03:28 +02:00
Jaime Arteaga 169089347f Add support for zeKernelGetName 
Change-Id: I167cc202436b6a76841c56e46baa684e7be90132
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-07-31 00:24:37 +02:00
Jaime Arteaga c05f80643a Use correct graphics allocation in setArgBuffer() 
Use the rootDeviceIndex to select the graphics allocation associated
with the argument being set.

Change-Id: I2298f46c0ce5d96841d17381afb7b0013a3f804e
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-07-18 14:51:25 -07:00
Konstanty Misiak 1067596196 Add channelOrder and channelDataType to crossThreadData in L0 
Related-To: NEO-4649

Change-Id: If07127424fc03ac410665cd1eb0c0da966b46584
Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com>
 2020-07-13 16:59:08 +02:00
Andrzej Swierczynski 77f50e5444 Always pass device bitfield to AllocationProperties in constructor 
Related-To: NEO-4722

Change-Id: Ie2475bf92a3189bcb9073bec5bf5af709e597c5d
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
 2020-07-13 09:00:10 +02:00
Zbigniew Zdanowicz bac5506b62 Modify function dispatching cross and per-thread data 
Related-To: NEO-4585

Change-Id: Ia6b54b8d0c868cab5403332411655dc8c9ef4c8d
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-07-08 19:30:23 +02:00