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Author SHA1 Message Date
Compute-Runtime-Validation be9ce8ee12 Revert "Add report of extension cl_intel_split_work_group_barrier" 
This reverts commit 08a4df80e5.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-03-19 02:49:38 +01:00
Lukasz Wesierski 08a4df80e5 Add report of extension cl_intel_split_work_group_barrier 
Related-To: NEO-6746
Signed-off-by: Lukasz Wesierski <lukasz.wesierski@intel.com>
 2022-03-18 14:06:29 +01:00
Compute-Runtime-Validation 1b1481e587 Revert "Add report of extension cl_intel_split_work_group_barrier" 
This reverts commit 886d4a36f7.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-03-09 20:11:27 +01:00
Lukasz Wesierski 886d4a36f7 Add report of extension cl_intel_split_work_group_barrier 
Related-To: NEO-6746
Signed-off-by: Lukasz Wesierski <lukasz.wesierski@intel.com>
 2022-03-09 17:40:21 +01:00
Bartosz Dunajski 4b0d986876 Move AllocationType enum out of GraphicsAllocation class 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-02-04 17:49:09 +01:00
Spruit, Neil R cbdf324a70 set islockable only for non shareable memory 
-Fix gen12 helper to only set islockable on the storage if
the allocation is not shareable.

Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
 2022-02-02 21:21:03 +01:00
Maciej Plewka 615688336f Program all fields in SCM 
Related-To: NEO-6432

This change applies WA that always programs all fields in SCM for
gen12lp. Also for those platforms Force Non-Coherent is set to 0x2.

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-12-28 16:30:47 +01:00
Bartosz Dunajski dfdd3c597a Remove redundant BUFFER_COMPRESSED allocation type 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-07 13:35:49 +01:00
Bartosz Dunajski 68aea5bf62 Rename compression flags and helpers 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-03 18:09:02 +01:00
Bartosz Dunajski 5c266f9ab0 Compression refactor [3/n] 
Dont use allocation type for compression preference

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-03 17:20:07 +01:00
Filip Hazubski 3b820d41c6 Reorder engines to match API engines order 
Related-To: NEO-6219

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-11-29 09:59:01 +01:00
Bartosz Dunajski 995cb88bfa Improve ftr/wa flags packing 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-11-25 16:05:57 +01:00
Zbigniew Zdanowicz 78609cd9f5 Optimize number of calls for pipe control post syncs 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-10 18:36:21 +01:00
Zbigniew Zdanowicz 36fd163837 Refactor pipe control post sync operations 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-10 08:53:03 +01:00
Mateusz Jablonski c16eb0ff84 Correct getGpgpuEngineInstances function 
dont expose bcs engine if blitter operations not supported

Related-To: NEO-6325
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-11-09 08:36:05 +01:00
Bartosz Dunajski 5856c283c5 Remove HardwareCapabilities struct 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-10-12 07:25:06 +02:00
Rafal Maziejuk f5be28e45f Add storage info adjustment check 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-28 11:49:35 +02:00
Rafal Maziejuk ad97bd32de Remove Gen12LP helpers files 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2021-09-28 09:38:11 +02:00
Rafal Maziejuk 82f27e882d Refactor Gen12LP helpers 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-27 14:07:37 +02:00
Rafal Maziejuk 7c473d0a11 Move setCapabilityCoherencyFlag function from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-23 11:45:34 +02:00
Rafal Maziejuk 09ac89339e Move local memory access mode getters from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-13 13:10:14 +02:00
Rafal Maziejuk a651e30aa1 Move stepping getter functions from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-08-30 10:54:23 +02:00
Compute-Runtime-Validation 946ae7cba3 Revert "Add HwHelper::getExtraExtensions" 
This reverts commit a9226a9113.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2021-08-27 02:31:19 +02:00
Dominik Dabek 3ab3761172 Enable buffer compression debug flag 
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2021-08-26 19:32:28 +02:00
Filip Hazubski a9226a9113 Add HwHelper::getExtraExtensions 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-08-26 14:06:35 +02:00
Rafal Maziejuk c96bd1b35d Move getHwRevIdFromStepping function from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-08-24 15:45:19 +02:00
Filip Hazubski 63f8c9d98b Add new EngineUsage 
Simplify verifying EngineUsage in tryGetEngine function.
Remove unused getGpgpuEnginesCount function.

Related-To: NEO-4940

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-08-23 17:41:13 +02:00
Rafal Maziejuk c6ee7065db Move isPageTableManagerSupported function from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-08-19 17:35:08 +02:00
Bartosz Dunajski 4fb5ceeb89 Add helper engines to EngineInstanced Device 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-08-19 16:14:19 +02:00
Katarzyna Cencelewska 5f491ed22b Add support for adlp in opensource 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com
 2021-08-18 00:03:17 +02:00
Szymon Morek aa5e1780a2 Rename plus in filenames to and_later 
Related-To: NEO-5920

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2021-08-17 11:26:27 +02:00
Milczarek, Slawomir eb14d8458b Add helper function to enable stateless compression 
Related-To: NEO-5107

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2021-08-02 14:34:33 +02:00
Mateusz Jablonski ed31aaedb8 Make BUFFER allocation lockable on DG1 
Related-To: NEO-5733
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-05-21 17:05:51 +02:00
Konstanty Misiak 62d52ba2e9 Fix DG1 tests fail 
Related-To: NEO-5679

Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com>
 2021-04-21 18:47:22 +02:00
Sebastian Luzynski 6163120809 Remove unnecessary check for gen12lp during symbol relocations 
Related-To: NEO-5433

Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
 2021-03-30 11:48:06 +02:00
Filip Hazubski a0d3e8b352 Simplify stepping conversion 
Related-To: NEO-5475

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-02-16 11:52:17 +01:00
Filip Hazubski 7d01074ee4 Update aub/tbx stepping handling 
For the stepping value use hardware value.

Resolves: NEO-5475

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-02-15 13:57:39 +01:00
Sebastian Luzynski 0526910f6f Check if additional flag is required 
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
 2021-02-10 13:51:05 +01:00
Maciej Plewka 51e073af73 Revert "Extra checks for gen12lp" 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-02-04 18:02:30 +01:00
Sebastian Luzynski 22c25a231e Extra checks for gen12lp 
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
 2021-02-04 11:23:15 +01:00
Bartosz Dunajski a8fe9b7630 Add const suffix 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-01-13 16:39:23 +01:00
Maciej Dziuban 544dd141ec Refactor addEngineToEngineGroup functions 
This change replaces HwHelper::addEngineToEngineGroup with getEngineGroupType,
so we're able to map EngineType to EngineGroupType without pushing engines.

Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2020-12-29 15:46:01 +01:00
Slawomir Milczarek 8a4bf3782a Code clean-up related to small LMEM BAR configuration 
Related-To: NEO-4876

Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
 2020-11-23 12:10:45 +01:00
Filip Hazubski ed04053007 Add hwhelper function allowRenderCompressionForContext 
Rename and unify compression related functions.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2020-11-12 13:16:51 +01:00
Slawomir Milczarek b7d5427f01 CPU access disallowed mode and blitter amendments 
Related-To: NEO-4876

Change-Id: I7d6de1a0530e9c4f8bcf302824242033d3ca724a
Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
 2020-11-03 13:04:28 +01:00
Maciej Plewka 44af85b492 Return correct maxFillSize property 
Related-To: NEO-5205

Change-Id: I62b7fec89451c640f70028b8d3ecb81f7655225d
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-11-02 16:10:01 +01:00
Piotr Zdunowski 4c2d92890f Opensource ADLS. 
Resolves: NEO-5092

Change-Id: I544247a057a667ce6423f2e59ba4ca769e866479
Signed-off-by: Piotr Zdunowski <piotr.zdunowski@intel.com>
 2020-10-21 19:07:38 +02:00
Pawel Wilma 0c3d430f50 W/A for disabling RCC RHWO for compressed media surfaces on gen12lp 
Whenever media compressed surface is used, the RCC Read-Hit-Write optimization
disable bit (14) has to be set in Common Slice Chicken1 register (7010h).

Related-To: NEO-4982

Change-Id: I71b91b52692252459da05b737838eb4854575974
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2020-10-13 11:52:15 +02:00
Maciej Dziuban 38ca6e9862 Disable L1 for Gen12lp 
Change-Id: I3b0ec2a6ea9a3bb72507ff66d314bfb1ad7a6a81
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2020-10-12 11:18:55 +02:00
Zbigniew Zdanowicz 28ef5fa709 Move pipecontrol w/a estimation to dedicated class 
Change-Id: I8ceaa2dff94dd7148daf921568fd30f098e5dae4
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-06 15:02:37 +02:00