Commit Graph

169 Commits

Author SHA1 Message Date
Piotr Fusik 378bd28bab Change the signature of MemoryManager::createGraphicsAllocation.
Change-Id: Ia82235ff2831fd5b3436d488a5946bb49d63ce91
2019-02-25 16:08:35 +01:00
dongwonk b44d434a89 limited GPU range is used for external 32bit allocation
Change-Id: I494ad97fb1ddfa7b3c6b2e7cef2ae04fba571ba0
Signed-off-by: dongwonk <dongwon.kim@intel.com>
2019-02-21 16:26:49 -08:00
dongwonk 56972935ad graphic memory allocation with alignment in limited Range heap
Change-Id: Iccfb0fdc2f161e30bfdd26154110185277f176f5
Signed-off-by: dongwonk <dongwon.kim@intel.com>
2019-02-21 10:10:47 -08:00
Piotr Fusik 4ec5be0c99 Simplify code by removing AllocationOrigin.
Change-Id: Ie73cefc1ae1ee846fb9a5ef1054af01cd1867a4d
2019-02-21 16:29:05 +01:00
Mrozek, Michal a1d4c07f45 Simplify DRM allocation constructors.
Change-Id: I2c477ce85f4748f0637451a405f7949aa829ba81
2019-02-21 12:06:01 +01:00
Mrozek, Michal 45a0ceecfb Clean drm interfaces.
- all driver allocations are using SoftPin
- remove unneeded methods.
- remove unneeded members.
- remove unneeded code paths.

Change-Id: I3369c0a4d37727210b5a26271d25537ca5218bd4
2019-02-20 16:11:19 +01:00
Piotr Fusik 75edea81bb Virtual address space partitioning on Linux [2/n]
Move selectHeap from Wddm to MemoryManager.
Set DrmAllocation::origin.

Change-Id: I5d412e35d524d1f31174893b9ce1d3b1e98eee96
2019-02-20 14:43:08 +01:00
dongwonk fb993d6107 limited range and internal 32bit allocators with correct base and size
correct add 1 to the current size, gpuRange as gpuRange
only specifies the end address of the pool, not the actual
size, which causes alignment issue of all the offsets of
allocated objects. Also, a page was added in the beginning
of the limited range memory pool to avoid the base address
of it to be 0x0 that is interpreted as invalid address by
heap allocator (This makes the size reduced by pageSize)

Internal 32bit allocator is also initialized in proper way
with corrected base address.

v2: added 'givenMemoryManagerLimimedRangeAllocator' unit
    test
v3: adjust size to be freed when DrmMemoryManager instance
    is destroyed to 4GB
v4: - defined external 32bit allocator for limited Range
    allocation case.
    - softpinning object on the correct GPU address

Change-Id: Idaa0206d4133a1476cceb5a48ff8c8528742c76a
Signed-off-by: dongwonk <dongwon.kim@intel.com>
2019-02-17 19:19:52 +01:00
dongwonk c2f5fccfd0 DrmAllocation with correct pair of cpu address and gpu address
correct mapping of cpu and gpu address in memory allocation
in case of NonSVM. Also, used only aligned address since offset
is already calculated and written to "allocationOffset".
gpuBaseAddress is programmed with 0 instead of base address of
heap because it represents GPU's address space.

v2: add allocationOffset to the aligned address in allocation
    data to point to exact starting address of buffer in two
    NonSVM allocation unit tests

Change-Id: I32ef512de64a13459b7c132672f837c5cb210ada
Signed-off-by: dongwonk <dongwon.kim@intel.com>
2019-02-15 19:03:26 +01:00
dongwonk 0240f239ad check if the whole object region is in 32Bit address space boundary
checks the address + size of buffer object to determine
whether the object is located within 32bit address space
boundary.

v2: changed end year to 2019 in ther license term
v3: added unit test for checking of flag when size of
    bo is given.
v4: two different unit tests are created to cover two
    different case separately

Change-Id: Ie2df6025fc116aca679dcfe88d858ff240278c39
Signed-off-by: dongwonk <dongwon.kim@intel.com>
2019-02-15 16:15:06 +01:00
Dunajski, Bartosz 958d931cd9 Allow to create HardwareContextController for multiple Devices
Change-Id: Ib066c937809536196182ca87359c487570cc2e89
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-14 16:00:00 +01:00
Piotr Fusik 6882cf09c1 Avoid manual memory management.
Change-Id: Id29d9ec366e338d519aad5353a15a44ecf5998e4
2019-02-12 09:14:51 +01:00
Dunajski, Bartosz 12da1b0616 Remove osContextCount parameter from GraphicsAllocation
Change-Id: I23b650e97f107008b1122a1ecea48722fe129863
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-11 15:44:37 +01:00
Hoppe, Mateusz 4d9acf3352 Pass aubfile name to TbxCommandStreamReceiver::create and CSRWithAubDump
Change-Id: Ib10c017ce4ed2a572815053dae3f517e0dfd9eb3
2019-02-07 15:05:54 +01:00
Mateusz Jablonski f157943610 Allocate internal allocations through preferred pool
Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-30 11:18:15 +01:00
Hoppe, Mateusz d7ce6ef8d1 Allocate images through preferred pool call
Change-Id: I79c9c1a0a95a8a3e26ed690530b71ef504cc7ff8
2019-01-25 09:05:25 +01:00
Mateusz Jablonski f332bf369e Set allocation's lock state only in lockResource and unlockResource methods
Change-Id: I60f35801287166f5bdb0dfcd31ff0118c56ec22a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-24 15:15:27 +01:00
Piotr Fusik 40870f9c7d Retry mmap with a smaller size.
Change-Id: If8ea046af789394c1f58be9cc3a2b8100cee214a
2019-01-22 11:04:16 +01:00
Mateusz Jablonski 06600f169b Define GPGPU engines per gen
Change-Id: Ie0e565d11184c5355b5bf09f5b10a567deb5c106
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-15 12:05:19 +01:00
Piotr Fusik 30dd15144c Add debug variable to disable host ptr tracking.
Change-Id: Ifc866e06a4519e7590d40d8ad136147ecc80225d
2019-01-11 12:06:52 +01:00
Mateusz Jablonski aee69779fa Minor renaming in a scope of multi os context allocations:
shareable -> multiOsContextCapable
resetTaskCount -> releaseUsageInOsContext
resetResidencyTaskCount -> releaseResidencyInOsContext
isUsedByContext -> isUsedByOsContext

Change-Id: If824246a0e393b962bd12f8c63d429a0fcfcda25
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-07 11:42:43 +01:00
Dunajski, Bartosz 8029639898 Pin allocation with specific DrmContextId at creation time
Change-Id: Ic132fb70b1da2cf3b7c70ab899822705adb83edc
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-27 09:35:58 +01:00
Kai Chen 1251ccc3c6 Allocate CPU address for Linux internal 32bit allocator base
The internal 32bit allocator sometimes need CPU address to access
or store data when it is in reduced address space scenario.

Change-Id: I6c0b3f9703ae3e124249b41ad7d81f03ad93ad17
Signed-off-by: Kai Chen <kai.chen@intel.com>
2018-12-21 07:11:48 +01:00
Mateusz Jablonski 1e011f9a08 Allow to allocate shareable graphics allocation
Change-Id: I284b03b001e5b67c344d46f34048803ef9a57314
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-20 20:14:57 +01:00
Mateusz Jablonski c9e667d601 Simplify Memory Manager API [4/4]
- fill AllocationData in one place
- remove allocateGraphicsMemoryForSVM function
- refactor SVM manager tests

Change-Id: I6f4ecd70503da8031cced50ea98a54162fd8e5d3
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-20 09:01:33 +01:00
Hoppe, Mateusz f6790c42cf Refactor Graphics Allocation paths for Images
Change-Id: Ifa3084b18cac95289bbceeaf3669dd31567fbd3e
2018-12-19 13:49:53 +01:00
Piotr Fusik e8a71132a4 Remove unnecessary casts.
Change-Id: I2d293d065c7efa006efe7d60a625cba0c6116c86
2018-12-18 13:42:14 +01:00
Mateusz Jablonski 8ec072d39c Simplify Memory Manager API [3/4]
- remove method allocateGraphicsMemory(size_t size)
- pass allocation type in allocation properties
- set allocation type in allocateGraphicsMemoryInPreferredPool

Change-Id: Ia9296d0ab2f711b7d78aff615cb56b3a246b60ec
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-17 10:42:16 +01:00
Dunajski, Bartosz 010e1a4738 VFE state programming cleanup
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-13 17:44:40 +01:00
Dunajski, Bartosz cfafe943eb Use different DRM Context for each OsContext on Linux
Change-Id: I543df4accdeba6c69b7dcf86d4238d12dafe92fe
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-12 15:08:23 +01:00
Mateusz Jablonski a6be6533ea Simplify Memory Manager API [2/n]
- make AllocationData a protected structure
- use AllocationProperties instead of AllocationFlags
- refactor methods: allocateGraphicsMemory64kb, allocateGraphicsMemoryForSVM
- call AllocateGraphicsMemoryInPreferredPool in AllocateGraphicsMemory
  where there is no host ptr

Change-Id: Ie9ca47b1bccacd00f8486e7d1bf6fb3985e5cb12
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-11 13:12:00 +01:00
Piotr Fusik 0b839722f4 Don't store preemption mode in Wddm.
Change-Id: I6088e5fec65b6910fefb42ec9735181867c44a1b
2018-12-10 14:48:52 +01:00
Dunajski, Bartosz f5508ed2d7 Simplify preemption control on Linux
Change-Id: Ie0896cc8950f7fbb271b710b8bb221eb41ba0445
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-10 13:12:16 +01:00
Mateusz Jablonski c8748b77a0 Simplify memory manager API [1/n]
pass struct with properties to allocate graphics memory methods:
for protected methods use AllocationData
for public methods use AllocationProperties

Change-Id: Ie1c3cb6b5e330bc4adac2ca8b0bf02d30ec76065
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-06 15:09:25 +01:00
Dunajski, Bartosz b728526c4e Allow Device creating multiple CSRs [8/n]
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
2018-12-04 15:36:59 +01:00
Katarzyna Cencelewska 3e800d55e6 Add support for dumping cl_cache to specified directory
Change-Id: I782ff17d0d4b17d3d26db543eb7ae222f75ff8a1
2018-11-29 13:59:26 +01:00
Maciej Dziuban 1cd59e927a Store residency status for each osContext separately
Change-Id: I2f17f68dcef6db7b596a69579a435b7ccd24e44b
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-11-29 08:08:25 +01:00
Dunajski, Bartosz b0de2a11d2 Set OsContext as reference
Change-Id: I3b682fabde9c2ddb2c33a95aef77bf6ce400a21f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-27 15:32:14 +01:00
Dunajski, Bartosz 2d77b86e70 Allow Device creating multiple CSRs [5/n]
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-27 14:25:04 +01:00
Mateusz Jablonski 352450adaa Pass number of os contexts to Graphics Allocation constructor
Mark unshareable allocations

Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-21 17:38:02 +01:00
Kai Chen 85b60dff0f Linux GPU address allocator for devices with reduced address space
Code implementation of GPU address allocator for devices with reduced
address space.

Change-Id: Ieb0412c5930fdd71f90741055cf89c0338b01133
Signed-off-by: Kai Chen <kai.chen@intel.com>
2018-11-19 10:20:25 +01:00
Mateusz Jablonski 0e0a280803 Create structure UsageInfo for task count and residency task count
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-15 14:07:05 +01:00
Dunajski, Bartosz 728932ed44 Pass Drm object to OsContext on Linux
Change-Id: I341925eef9bc892f5c321c668736bb6a3aff38f5
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-15 12:04:03 +01:00
Mrozek, Michal 3c0a6bd24d Remove residency control from Buffer Object.
- Residency is being controlled by Graphics Allocation.
- Duplicates are now eliminated only for shared resources.

Change-Id: Ib51e2739a07728ae0b94abf6cce2e9981b017111
2018-11-14 08:32:04 +01:00
Stefanowski, Adam c202c95634 Stop creating osInterface in WddmCSR and DrmCSR constructors
Change-Id: Ic8ca21824882dfae5df3fe05c7ec1ff96311f286
2018-10-31 15:01:50 +01:00
Kowalczuk, Jakub 1822fb0747 Control enabling of local memory based on OS and HW Capabilities part 2
- add EnableLocalMemory debug variable
- separate OSInterface::osEnableLocalMemory for dll and unit tests

Change-Id: I78a1f60364eece28b30ce3e91418e7d72ba3e0d9
2018-10-31 13:59:42 +01:00
Mrozek, Michal 7ece16ee7a Graphics Allocation cleanup.
- remove one constructor
- start using mock graphics allocation in tests

Change-Id: Idb8f4a35dbc2cae8d6bf667bab5542d8e91d6e0d
2018-10-31 11:54:24 +01:00
Milczarek, Slawomir 7b1d19eaec Moved header with engine node definitions
Change-Id: Iaa78bb0584589e354b1bb469b729844121decb8f
2018-10-27 14:51:02 -07:00
Mateusz Jablonski 129380c1a6 Cleanup host ptr manager
Change-Id: I0fc9df41a08255eef8072666c1c5c16806e0f7cf
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-26 08:26:38 +02:00
Kowalczuk, Jakub 8ead8f727f Control enabling of local memory based on OS and HW Capabilities
Change-Id: Ia26c856aeef27fe638b7a6e895cc289859f3c579
2018-10-25 16:36:47 +02:00