Commit Graph

18 Commits

Author SHA1 Message Date
Mateusz Hoppe f86d4220a5 feature: add bindless samplers support to level zero
- samplers using bindless adressing require patching bindless offsets to
sampler states on kernel's cross thread data

Related-To: NEO-10505

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2024-03-29 08:07:28 +01:00
Mateusz Jablonski 138fb65401 refactor: correct naming of enum class constants 11/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-19 14:52:57 +01:00
Maciej Bielski 97e7cda912 feature: Optimize intra-module kernel ISA allocations
So far, there is a separate page allocated for each kernel's ISA within
`KernelImmutableData::initialize()`. Apparently the ISA blocks are often
much smaller than a 64k page, which leads to poor memory utilization and
was even observed to cause the device OOM error if a single module has
several keys.

Improve the situation by reusing the parent allocation (owned by the
module instance) for modules, which kernel ISAs can fit together within
a single 64k page. This improves the memory utilization on a single
module level.

Related-To: NEO-7788
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2023-09-21 13:55:45 +02:00
Compute-Runtime-Validation 913a926fd4 Revert "feature: Optimize intra-module kernel ISA allocations"
This reverts commit c348831470.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-09-19 14:16:05 +02:00
Maciej Bielski c348831470 feature: Optimize intra-module kernel ISA allocations
So far, there is a separate page allocated for each kernel's ISA within
`KernelImmutableData::initialize()`. Apparently the ISA blocks are often
much smaller than a 64k page, which leads to poor memory utilization and
was even observed to cause the device OOM error if a single module has
several keys.

Improve the situation by reusing the parent allocation (owned by the
module instance) for modules, which kernel ISAs can fit together within
a single 64k page. This improves the memory utilization on a single
module level.

Related-To: NEO-7788
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2023-09-19 12:05:09 +02:00
Mateusz Hoppe 313fb84fda feature: bindless addressing mode support
- allow bindless kernels to execute
- bindless addressing kernels are using private heaps mode
- do not differentiate bindful and bindless surface state base addresses

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-06-19 12:41:03 +02:00
Krystian Chmielewski 18adbed233 feat(zebin): add thread scheduling mode support
Resolves: NEO-7197

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-08-18 16:10:18 +02:00
Kamil Kopryk d4d54f5093 Cleanup includes
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-07-25 09:58:38 +02:00
Filip Hazubski 35d1f2e341 Add debug flag to control programming of thread arbitration policy with SCM
Related-To: NEO-6801

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-05-27 11:35:41 +02:00
Mateusz Jablonski ea6f089e17 Unify implicit args programming across APIs
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-02-23 11:52:47 +01:00
Mateusz Jablonski 5a59a6ad2e Add support for implicit args in L0
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-09-15 11:12:23 +02:00
Igor Venevtsev bd32518d31 Add extra parameters to EncodeComputeMode::adjustComputeMode() method
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2021-03-31 16:51:55 +02:00
Jim Snow 37cd49330c Implement ZE_CACHE_CONFIG_FLAG_LARGE_DATA for zeKernelSetCacheConfig
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2020-12-16 07:00:13 +01:00
Zbigniew Zdanowicz bac5506b62 Modify function dispatching cross and per-thread data
Related-To: NEO-4585

Change-Id: Ia6b54b8d0c868cab5403332411655dc8c9ef4c8d
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2020-07-08 19:30:23 +02:00
Jaroslaw Chodor 2c25777f3c DispatchKernelEncoder refactor
Replacing parts of DispatchKernelEncoder with KernelDescriptor

Change-Id: I1c780b04a2d3d1de0fb75d5413a0dde8b41bbe07
2020-04-08 16:19:21 +02:00
Mateusz Hoppe 3d4051abdf Query for number of local ids channels
Change-Id: I9f217d83c4399397484d56ff47b16697dd29180b
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2020-04-06 22:43:36 +02:00
Mateusz Hoppe 74cb8dd41e Add isInlineDataRequired() to DispatchKernelEncoderI
Change-Id: I0baaeddc16fe068f6c1ddd6c6697d447c4411055
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2020-04-06 11:16:19 +02:00
kamdiedrich e072275ae6 Reorganization directory structure [3/n]
Change-Id: If3dfa3f6007f8810a6a1ae1a4f0c7da38544648d
2020-02-23 23:48:28 +01:00