Commit Graph

361 Commits

Author SHA1 Message Date
3eab7009ac Move SCM related WAs logic from CSR to EncodeComputeMode
This will help with unifying the logic between APIs and GENs.

Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-03-11 14:00:53 +01:00
c6e27bdc18 Enable prepatcher DirectSubmission WA
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-03-10 20:23:11 +01:00
79fedd59e4 Add BB_START prepatching WA - disabled by default
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-03-10 17:05:53 +01:00
835b344968 Add debug flag to disable GPU hang detection
This change introduces the new flag called DisableGpuHangDetection.
By default it is disabled. When someone wants to disable hang checking,
then this flag can be set to true.

Related-To: NEO-6681
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-03-09 18:07:42 +01:00
43ed1acc63 Update StateComputeModeProperties design
Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-03-08 16:30:25 +01:00
dd01cff879 Unify logic determining thread arbitration policy value
Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-03-08 13:14:56 +01:00
80b520bc9b Change ThreadArbitrationPolicy enum type to int32_t
Change ThreadArbitrationPolicy::NotPresent value to -1
Update initial values to ThreadArbitrationPolicy::NotPresent

Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-03-07 20:04:24 +01:00
f293c9ab25 Avoid ReadModifyWrite problem on devices with coherent L3.
Setting one of bitfields requires read from local memory which is very slow.
This is not needed for devices that have coherent L3.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-03-04 15:05:04 +01:00
999c6424a4 While enqueue blit do not flush gpgpu if already flushed
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-03-03 13:01:57 +01:00
8e94d568a8 Do not set dcFlush in Immediate dispatch mode.
Some devices do not need dcFlush.
Setting it prevents further optimization of pipe controls which
are not needed.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-03-02 13:20:28 +01:00
22ed1be1a3 Add checks for mmap and getSpace
Signed-off-by: John Falkowski <john.falkowski@intel.com>
2022-02-28 20:57:29 +01:00
cf1bc3a2ba Disable EU fusion based on kernel properties from compiler
Related-To: NEO-6633

Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com>
2022-02-28 18:50:38 +01:00
7f729b7f89 Detect GPU hang in clWaitForEvents
This change:
- moves NEO::WaitStatus to a separate file
- enables detection of GPU hang in clWaitForEvents
- adjusts most of blocking calls in CommandStreamReceiver to return WaitStatus
- adds ULTs to cover the new code

Related-To: NEO-6681
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-02-23 13:33:09 +01:00
e0c892ed55 Add lock to downloading allocations on tbx
When running multiple threads, one thread could clear
allocationsForDownload while another was iterating over it.

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-02-16 16:51:41 +01:00
1275c4e200 Detect GPU hang in remaining blocking calls of L0
This change introduces detection of GPU hangs in
zeEventHostSynchronize and zeFenceHostSynchronize.
Furthermore, if CommandQueueHw::executeCommandLists
uses ZE_COMMAND_QUEUE_MODE_SYNCHRONOUS and hang occurs,
the information about it is propagated to the caller.

Related-To: NEO-6681
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-02-16 14:47:29 +01:00
02c87fd8b9 Refactor naming around additional PC before NP state command
Rename:
- debug flag ProgramPipeControlPriorToNonPipelinedStateCommand
to ProgramExtendedPipeControlPriorToNonPipelinedStateCommand
- local variables

Related-To: NEO-6615
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-02-11 19:24:14 +01:00
6a111e41ff Improve submission logging
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-02-11 17:36:14 +01:00
436fd7edce Add PC before NP state commands on ATS
Add pipe control before state base address, state compute
mode and state sip commands.

Related-To: NEO-6615
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-02-11 12:28:59 +01:00
ff7882bcbe Add PC before NP state commands
Add pipe control before state base address, state compute
mode and state sip commands on DG2 and PVC when CCS flow is used.

Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-02-10 12:06:41 +01:00
18cafd3a52 Implement GPU hang detection on Windows
This change uses value of cpuAddress from monitored fence
to detect GPU hang.

Related-To: NEO-5313
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-02-09 17:22:52 +01:00
b60d963ff5 Add debug variable to force default heap allocation size
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-02-09 13:27:05 +01:00
d6eaab18b4 Correct blitter command size estimation
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-02-09 10:21:06 +01:00
538e0aea87 Add debug flag to bind at creation time
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-02-09 09:26:02 +01:00
4b0d986876 Move AllocationType enum out of GraphicsAllocation class
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-02-04 17:49:09 +01:00
9ff1307b4b Fix optimize timestamp packet dependiencies
-program barrier after global fence allocation is programmed
-do not double barrier timestamp in blit enqueue
-flush GPGPU while submitting to BCS when barrier requested

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-02-03 16:27:09 +01:00
52c6973e89 Rename blitBuffer method
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-02-03 15:02:55 +01:00
9d8ce7aace Command container appends BB_END on cmd buffer allocation end
When linear stream created for command container has not enough space
for command and BB_END it will program BB_END and allocate new command
buffer allocation. Pointer returned from getSpace in this case will
return storage from new command buffer allocation.

Related-To: NEO-5707

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-01-31 16:15:37 +01:00
498cf5e871 Implement GPU hang detection
This change uses DRM_IOCTL_I915_GET_RESET_STATS to detect
GPU hangs. When such situation is encountered, then
zeCommandQueueSynchronize returns ZE_RESULT_ERROR_DEVICE_LOST.

Related-To: NEO-5313
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-01-31 13:48:17 +01:00
f8c104feaa Use fw declaration of IndirectHeap in CommandContainer
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-01-26 13:30:26 +01:00
6df17f5a30 [3/n] Optimize indirect allocations handling.
Add new debug variable to trigger new mode.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-25 16:40:56 +01:00
e29a85ebb3 Use ImmediateDispatch mode for L0 command queues
Related-To: LOCI-1988

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2022-01-21 00:23:04 +01:00
1b7949432f Add shareable allocation on windows dGPUs
Add default initialization for object members

Related-To: LOCI-2665

Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2022-01-19 19:03:18 +01:00
10f329768f Fix multitile tag initialization for AubCsr
Before this change, only Tile0 tag was initialized

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-18 19:33:57 +01:00
4238679078 Refactor implicit scaling device support
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-18 13:08:43 +01:00
e7f2676d5e Fix ThreadArbitrationMode programming
For non-kernel submission, TAM was incorrectly reprogrammed to default
mode. Correct programming should reuse value from previous submission.

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-14 13:09:11 +01:00
394c0e90e1 Return error when failing on submission
Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
2022-01-12 16:42:30 +01:00
45ae4fe881 Remove device enqueue part 3
- isSchedulerKernel

Related-To: NEO-6559
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-01-12 13:50:18 +01:00
34856747b4 Add implementation for reading logical subDevice from builtin
Related-To: NEO-6258
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2022-01-11 13:06:15 +01:00
5be4d89b73 Rename function
Rename MemorySynchronizationCommands::isDcFlushAllowed
to MemorySynchronizationCommands::getDcFlushEnable

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-12-30 17:03:22 +01:00
615688336f Program all fields in SCM
Related-To: NEO-6432

This change applies WA that always programs all fields in SCM for
gen12lp. Also for those platforms Force Non-Coherent is set to 0x2.

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2021-12-28 16:30:47 +01:00
b8e88159f8 Add proper alignment to BBE in flush small task path
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2021-12-28 11:01:57 +01:00
9be5efe4f7 Check BCS engine type correctly in flush non kernel
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2021-12-28 10:23:15 +01:00
b59b0b6b36 Download timestamps before checking completion
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2021-12-28 08:14:27 +01:00
2bbe7438ce Revert "Add implementation for reading logical subDevice from builtin"
This reverts commit 901e1e71f95a8cd90611ed7cbd25705a14f38170.

Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2021-12-27 15:58:51 +01:00
b6da6471f2 Add notify parameter to direct submission post sync operations
Related-To: NEO-5845

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-12-23 17:35:48 +01:00
f4c151cce5 Refactor PipeControlArgs struct
Remove struct PipeControlArgsBase

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-12-22 17:13:16 +01:00
9a450d1b74 Pass hwInfo to appendMiFlushDw
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-12-22 15:22:47 +01:00
0fd685541d Add isDcFlushAllowed function to HwInfoConfig
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-12-21 18:29:43 +01:00
6d439f88bb Explicitly set dcFlushEnable value
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-12-21 12:21:11 +01:00
6940fbf387 Program private 2 scratch in L0
Related-To: NEO-5427
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2021-12-20 23:25:09 +01:00