5327731f26
add missing include
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-07-05 08:39:20 +02:00
4bdd8860a1
test.h refactor
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-07-04 18:20:07 +02:00
6a9fcd38b1
Create KMD-migrated unified shared memory with multiple local memory regions
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Remove the restriction on USM allocation created in a single local memory region
with latest KMD fix for cross tile migration thrashing b/t lmem (dii-3516)
Related-To: NEO-6909
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2022-07-04 13:33:23 +02:00
0b26ee3664
Add surface state programming for kernels with images and stateless buffers
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2022-07-04 12:24:11 +02:00
76e023b941
Link build option with L1 cache policy helper
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Related-To: NEO-7003
Add L1CachePolicyHelper struct.
This struct is resposible for L1 cache policy
in build option, Surface State and stateless
caching. Currently default option for all
platforms is WBP (write by-pass)
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2022-07-04 11:49:55 +02:00
76d905b1f2
Pass LogicalStateHelper to SBA helper
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-07-01 14:52:20 +02:00
95d4ac7812
Capability to insert WA MMIO for BCS dispatch
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-07-01 11:53:53 +02:00
cdd2cd7ac3
Revert "Bind virtual copy engines in optimal sequence"
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This reverts commit b55bbd41931d71ca774d4ae776f6860185e332c9.
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2022-07-01 10:17:12 +02:00
7e144d73f6
Dont patch implicit args relocation to zero
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IGC should set the value to zero by default
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-06-30 20:26:04 +02:00
0d42fdf38c
Fix setting flag Cacheable in gmm resource params base on resource usage
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Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2022-06-30 19:37:21 +02:00
c648a941ec
includes cleanup
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-30 16:09:09 +02:00
2b9827ad7d
hw_cmds.h for XE refactor
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-30 11:52:27 +02:00
e88bad79a6
Dont pass drm to ioctl helper methods - use Ioctl Helper's member instead
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Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-06-30 11:11:12 +02:00
0e65d3e667
hw_cmds.h usage refactor
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create header with include for DEFAULT_PLATFORM what can be used in some
places
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-29 18:03:21 +02:00
70b41cf3ce
Revert "Move semaphore to local memory on XE_HPG"
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This reverts commit 94f3e54261compute-runtime-validation@intel.com >
2022-06-29 17:06:58 +02:00
c9e2b4bc32
Pass Drm to ioctl helper ctor
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Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-06-29 15:47:01 +02:00
aff0ea99a8
Enable signed/unsigned mismatch warning for MSVC
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-29 14:12:10 +02:00
30071599df
Create buffer object with multiple lmem regions for kmd-migrated buffers
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This commit enables cross-tile kmd migration for buffers in local memory
Related-To: NEO-6977
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2022-06-29 13:47:58 +02:00
f2bbd63d37
Refactor SBA handling + fix unit tests
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-29 13:27:57 +02:00
b72fcad1be
Drm: call ioctl using ioctl helper if possible
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Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-06-29 11:29:40 +02:00
a8e2bd3f98
hw_cmds.h usage cleanup
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-29 11:15:45 +02:00
fffd56d7a6
refactor: bind drm context within IoctlHelper::createDrmContext method
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Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-06-29 10:47:52 +02:00
4a2a9daf41
Add AIL for Wondershare Filmora 11 subprocesses
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Related-To: NEO-6982
Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com >
2022-06-28 20:50:07 +02:00
c90f3b3c93
Correct naming: SetUpImpl -> setUpImpl
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-06-28 17:59:37 +02:00
1083a0d0c4
Move more timestamp packet tests to shared
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Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com >
2022-06-28 15:04:54 +02:00
84de510723
Add missing includes to unit_test_helper.inl
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-06-28 12:05:15 +02:00
b0d4215328
Revert "Use DualSubSliceCount to calculate workgroup size"
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This reverts commit 8ea5bbd3b5compute-runtime-validation@intel.com >
2022-06-28 11:47:11 +02:00
2cc2d05c37
remove unused include
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-28 10:59:30 +02:00
09d160910d
remove unused includes
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-27 22:59:18 +02:00
a701e28ca5
DrmMM fixtures refactor
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-27 22:50:56 +02:00
2d976098f5
Use LogicalStateHelper to program FrontEndState
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-27 19:42:54 +02:00
3af3185e3c
includes simplification
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-27 17:44:14 +02:00
9bf32b73ec
Introduce debug regkey to enable kmd migration for buffers
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The new regkey is aimed to test cross-tile migration for buffers,
esp. first touch policy on h/w with support for page faults.
Related-To: NEO-6977
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2022-06-27 16:18:36 +02:00
8ea5bbd3b5
Use DualSubSliceCount to calculate workgroup size
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Related-To: NEO-5719
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com >
2022-06-27 15:41:47 +02:00
2c853adac3
Use LogicalStateHelper to program ComputeMode
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-27 15:25:55 +02:00
4dff4e165c
includes simplification
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-27 15:08:46 +02:00
5236b34629
Set L1 policy globally
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Related-To: NEO-7003
Add function to control l1 policy for both
stateless and surface state cache.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2022-06-27 14:57:31 +02:00
5bce1eceb1
Remove self cleanup section when using immediate command list
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2022-06-27 13:29:52 +02:00
f31fef4417
Simplify ReferenceTrackedObject API
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Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com >
2022-06-27 11:27:08 +02:00
48c2aa23db
Fix for conditionally enabled acronyms
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Signed-off-by: Daria Hinz <daria.hinz@intel.com >
2022-06-27 11:00:36 +02:00
4673a98074
includes simplification
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use HW specific header instead generic one
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-24 22:07:18 +02:00
31dbc04f23
L0Debug - capture SurfaceState heaps
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Related-To: NEO-7103
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2022-06-24 15:05:56 +02:00
94f3e54261
Move semaphore to local memory on XE_HPG
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2022-06-24 14:36:23 +02:00
61b2ee45cd
Use LogicalStateHelper to encode SystemMemoryFence
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-24 13:29:58 +02:00
113b0378ac
Fix level zero event synchronization in tbx mode
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2022-06-23 18:13:11 +02:00
c86c518bc4
L0 Debugger Win - read SBA tracking buffer address
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MMIO will store SBA tracking buffer address for current context.
This change helps in extracting this address and use to read SBA virtual
register.
Related-To: NEO-6765
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com >
2022-06-23 15:02:38 +02:00
4ece30528c
Do not force SingleSliceDispatchCcsMode when dispatch all is enabled
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2022-06-23 12:35:48 +02:00
60b88806d5
L0 Windows Debugger - Implement GPU mem read/write
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Signed-off-by: Yates, Brandon <brandon.yates@intel.com >
2022-06-23 09:28:47 +02:00
0b5269d4ae
Use LogicalStateHelper to program CSR allocation
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-22 21:19:57 +02:00
1bfe42350a
Revert "Disable tlb flush WA on PVC and later"
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This reverts commit e0c87435e1compute-runtime-validation@intel.com >
2022-06-22 20:09:28 +02:00
