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27 Commits

Author SHA1 Message Date
Zdanowicz, Zbigniew f3a732081e Change interface to program cross-thread data 
Change-Id: I96bf4bddf1557f588fd745efca7b19ec2f38a78e
 2018-10-18 23:55:29 +02:00
Filip Hazubski 91f540f437 Move HW specific KernelCommandsHelper functions to a separate file 
Change-Id: I04b0c0faaa7ff42e62c3d1765e6ba54c76ae2ee0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-10-17 16:48:11 +02:00
Dunajski, Bartosz 66427f60c6 Handle TimestampPackets for non-kernel enqueues 
Change-Id: I52ec4f43b10bf6e2a10b2455d32a90a606645d29
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-10 04:21:30 +02:00
Zdanowicz, Zbigniew bb62343aba Add new parameter to thread data dispatching 
Change-Id: I86710b0cc764156f4c2db9d24ccd1c96b32d7660
 2018-10-05 12:06:25 +02:00
Zdanowicz, Zbigniew 2632b21fd1 Organize dispatching of thread data for better reuse of code 
Change-Id: I8c156f8b5a50f6fa4dfb5218cdadb2840ff556eb
 2018-10-02 18:47:13 +02:00
Dunajski, Bartosz cbd017d495 Handle TimestamPacket with implicit dependencies ownership 
Change-Id: I22a4de4e9eb904c359583e235e0de54a7c743e07
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-09-28 01:48:02 +02:00
Zdanowicz, Zbigniew 9e8a434464 Add new parameter to dispatch payload data 
Change-Id: I0034c5a40de65a050e19691b13793b7053354757
 2018-09-26 14:43:46 +02:00
Artur Harasimiuk 40146291ad Update copyright headers 
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-09-20 18:02:35 +02:00
Dunajski, Bartosz f4c094a568 Set default Semaphore wait mode for polling 
Change-Id: I2537d3d53bc645558cbcf0893ef6f8dae30db57e
 2018-09-17 20:05:00 +02:00
Mateusz Jablonski 873a58382b Extend kernel commands helper 
add method to check if we should program binding table prefetch

Change-Id: I2a78f406b6f2a3fde33dec653ec887b7f2c03442
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-09-17 09:34:31 +00:00
Dunajski, Bartosz 2366c41154 Simplify Semaphore programming 
Change-Id: I3322be137bbc1fe6f63baada26cf65baf821b4c1
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-09-11 11:06:56 +02:00
Mateusz Jablonski 47f3dad619 Apply (2/4)x4x1 layout when generating local ids for kernel with images only 
- For SIMD8 apply 2x4x1 layout
- For SIMD16/SIMD32 apply 4x4x1 layout

Change-Id: I31bceb49387011c66da5f96ad2a71125b96d4cda
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-08-14 12:22:20 +02:00
Mrozek, Michal 99829a3319 Prefetch binding table entries. 
- Significant performance boost for kernels utilizing surface states

Change-Id: I0cec91cb61bd19999847090b945810f798ed80d6
 2018-08-13 17:21:04 +02:00
Chodor, Jaroslaw c10d0d79f5 Workgroup walk order 
Change-Id: Id02db6a383e21dc17be64655e7f51a84103b2e0b
 2018-08-07 13:54:10 +02:00
mplewka dccee618be Handle when gtpin kernel start offset is not zero 
Change-Id: I3e8365455a23b0f271c5c1211dda6e2f4241a4e9
 2018-06-07 10:33:29 +02:00
Zdanowicz, Zbigniew 33fee15711 Change interface to pass Interface Descriptor Data as pointer 
Change-Id: I0f33109b800a7607206954bb1e5cb0826290e6f3
 2018-05-11 14:35:53 +02:00
Pawel Wilma a0c044e6d2 Extend batch buffer flattening in AubCSR to BatchedDispatch mode 
- batch buffer flatening in batched mode
    - added MI_USER_INTERRUPT command
    - added GUC Work Queue Item

Change-Id: I35142da34b30d3006bb4ffc1521db7f6ebe68ebc
 2018-04-26 12:45:02 +02:00
Mrozek, Michal 6299388b71 [30/n] Internal 4GB allocator. 
- Add support for patching indirect state with internal heaps.

Change-Id: Ib5748beb462be1786134a0a81bb649dd279816ec
 2018-04-17 09:22:15 +02:00
Mrozek, Michal 2be5934096 [21/n] Remove Instruction Heap from enqueue path. 
- This removes Instruction Heap allocation from enqueue path
- Blocked path is handled as well
- Heap is no longer allocated on demand it is bind to kernelInfo.

Change-Id: I54545beceed3404ee0330a8bac2b0934944cac30
 2018-03-28 20:15:55 +02:00
Mrozek, Michal 9bdf01468e [20/n] Internal 4GB allocator. 
- Switch to internal heap for kernel ISA allocations.
- remove IH from various functions
- remove IHState from CSR , IH is never dirty
- ISA is no longer copied on enqueue calls.

Change-Id: I0099cf2a9ebab6192ea03a74dd35f7da963fd5a5
 2018-03-28 16:07:26 +02:00
Pawel Wilma ff1d2361f3 Add patch info comments to AUB dump 
Collect patching information and add as comments to AUB dump.

Change-Id: Ib7c903a2589d68b6e3e614c1774c7cd5a000c29f
 2018-03-23 13:08:54 +01:00
Mrozek, Michal 1602fa5a88 [7/n] Internal 4GB allocator 
- rename getBase to getCpuBase
- change some test names accordingly.

Change-Id: I6fb2e4714298250147ea7766a916d7f5d62edc54
 2018-03-05 22:16:14 +01:00
Zdanowicz, Zbigniew 533afe472a Program preemption mode in Interface Descriptor Data 
Change-Id: I7fce731d71dd0b6dc8505ebfe45d24c65898a08b
 2018-03-05 09:36:53 +01:00
hjnapiat 5909a6b3d3 Add support for GT-Pin Callbacks [3/n] 
Change-Id: Iea4b49efc9a666fde310ece15a9c69686d22f627
 2018-02-19 10:43:19 +01:00
Mrozek, Michal 2d0af9d4a4 Make sure that local workgroup size is properly passed for IOH estimation. 
Change-Id: I0ad5da4fffd1575f64d44803ce8eb4a6a0ab1532
 2018-02-15 07:57:39 +01:00
Chodor, Jaroslaw 044fd1ab81 Fixing IntDescr programing for blocked cmd and MT 
Fixing InterfaceDescriptor programming for
blocked commands when MidThread preemption is
enabled
Additionally, fixing couple of tests that block
global preemption enabling in ULTs

Change-Id: I454c9608f8606f23d7446785ac24c7c7d8701ae0
 2018-01-17 12:19:07 +01:00
Brandon Fliflet 7e9ad41290 Initial commit 
Change-Id: I4bf1707bd3dfeadf2c17b0a7daff372b1925ebbd
 2017-12-21 00:45:38 +01:00