6256f89a79
Page fault support to be controlled with the registry key
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Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-04-13 14:29:02 +02:00
d70b1a2e2a
Filter L0 Debugger support by platfom
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Related-To: NEO-6678
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
2022-04-13 13:03:40 +02:00
3e19f39b8d
Add RPL-P device IDs
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-04-13 09:59:58 +02:00
7a64982822
Debug Zebin pass kernel's address
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feat: Set text sections' addresses with valid GPU VA. Offset debug symbols
with text segment names by corresponding segment's GPU VA.
Resolves: NEO-6873
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-04-13 08:38:49 +02:00
c856899dbb
Account for hwInfo when checking for implicit scaling support
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Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
2022-04-12 18:10:38 +02:00
858766c080
Remove unused members and getters in system info
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Related-To: NEO-6835
Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
2022-04-12 10:46:53 +02:00
789587bacc
Return nullptr for gfx alloc mmap error
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Signed-off-by: John Falkowski <john.falkowski@intel.com>
2022-04-12 10:08:19 +02:00
ee0d183cf9
Handle legacy hasBarriers properly
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Previous change regarding NEO-6785 added encoding of number of barriers
to specific value representation depending on hardware that we program for.
In patch token format encoding of number of barriers is sent via
hasBarriers field in a token.
In zebin true number of barriers is sent via barrier_count field in
zeInfo.
To remove this discrepancy, translate encoded number of barriers into
true number of barriers in legacy format.
Resolves: NEO-6785
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-04-12 09:44:10 +02:00
884d729e4e
Improve pat index programming on linux
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-04-12 08:18:20 +02:00
01a719cf33
Allow for zebin rebuild when IR is present
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This commits adds rebuilding zebin binary.
If zebin is built for different device and has SPIRV, then new ze binary
will be built using SPIRV.
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-04-12 08:05:25 +02:00
ce645f13b7
Encode PRODUCT_CONFIG value into fatbinary
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Change modifies the encoding entry in fatbinary for platforms.
If numbering in -device is used, the value PRODUCT_CONFIG will be encoded.
The functionality that returns the correct product config values has
also been added.
Related-To: NEO-6744
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2022-04-11 15:09:17 +02:00
fbb5137f3e
Remove function extendParseDeviceBlob
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Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
2022-04-11 13:38:49 +02:00
29e4518407
Update formatting in dynamic memory tracking
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Format as follows:
backtrace start
call_1
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call_n
backtrace end
Related-To: NEO-6837
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-04-08 13:17:30 +02:00
667594e8eb
Revert "Improve multi storage handling."
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This reverts commit 81739c0265
2022-04-08 13:07:27 +02:00
2c1bfbb5b2
Encode number barriers
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When programming number of barriers use BARRIER_SIZE enumeration.
Resolves: NEO-6785
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-04-08 10:32:23 +02:00
81739c0265
Improve multi storage handling.
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- color always basing on granularity
- align all chunks to granularity size
- make all chunks equal in size
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-04-08 10:21:34 +02:00
4d4ccfd128
Remove cache info base class
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There is only one implementation of said class and we don't
even adhere to the interface it provides.
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
2022-04-07 18:15:57 +02:00
2d92379fe8
Fix typo
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Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
2022-04-07 16:56:51 +02:00
fc4eaa1894
Refactor passing GlobalFenceAllocation to DirectSubmission
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-04-07 16:08:07 +02:00
fffcf2612e
Flush tag only if needed in deferred deleter
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-04-07 15:36:29 +02:00
db9c0d1103
Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-04-07 12:53:56 +02:00
3c4b442c79
Virtual engines for BCS
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Signed-off-by: Daniel Chabrowski daniel.chabrowski@intel.com
Related-To: NEO-6591
2022-04-07 11:52:29 +02:00
fd45ac133d
Unify append calls
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Related-To: NEO-6242
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-04-07 10:18:55 +02:00
5b175ebb4a
Fix Scratch surface state programming on PVC
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- program max num of threads in surface state
Resolves: NEO-6850
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-04-07 07:44:23 +02:00
7a3976ad64
Revert "Force 64KB page size for cpu alignment in dual storage allocation"
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This reverts commit 7ff6a5c1fa
2022-04-07 00:45:07 +02:00
64d3f95410
Revert "Allow for zebin rebuild when IR is present"
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This reverts commit 2ae3f3e521
2022-04-06 23:17:22 +02:00
fe9fe80fc6
Avoid dynamic memory allocation [3/n]
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- use reference on auto type to prevent copy.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-04-06 18:07:19 +02:00
7ff6a5c1fa
Force 64KB page size for cpu alignment in dual storage allocation
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There is no need to force 2MB alignment for CPU allocation in dual
storage usage. Additionaly for WSL this will allow to avoid usage of
malloc in driver path.
Relates-To: NEO-6620
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2022-04-06 15:28:17 +02:00
4044320301
Limit allocations in execute command list
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Reserve space in ResidencyContainer
Related-To: NEO-6837
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-04-06 15:00:34 +02:00
8d5c674110
Dynamic memory tracking, update function printing
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Print only demangled name if it succeeded.
Related-To: NEO-6837
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-04-06 14:34:24 +02:00
6e9c890890
Enable sfence instruction programming for DirectSubmission dispatch
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-04-06 14:24:04 +02:00
f4407064a4
Refactor store register mem encoder to include partition parameter
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Related-To: NEO-6811
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-04-06 14:00:56 +02:00
4fdb0700fe
Disable flush task path on ATS
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Related-To: LOCI-2984
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2022-04-06 02:14:41 +02:00
f7a767c767
Add demangling to dynamic memory tracking
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Related-To: NEO-6837
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-04-05 20:38:27 +02:00
d3b7ea10c8
Dont allocate dynamic memory when preparing params for vm bind call
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Related-To: NEO-6837
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-04-05 19:41:56 +02:00
eaba246464
Test prelim command stream and clos cache
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Signed-off-by: Daniel Chabrowski daniel.chabrowski@intel.com
Related-To: NEO-6591
2022-04-05 16:48:00 +02:00
2ae3f3e521
Allow for zebin rebuild when IR is present
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Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-04-05 10:25:06 +02:00
95103c3a33
Correct getters in generated commands
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cast to uint64_t before shifting value
Related-To: NEO-6475
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-04-04 16:35:17 +02:00
d2462ff8fb
Add debug flag to control ISA allocation padding
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-04-04 15:12:30 +02:00
7f6296174c
Add PVC device ids
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-04-04 10:48:59 +02:00
787c74ce7a
Do not make dynamic allocations in hot calls.
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std::stringstream does memory allocation even though it is not used.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-04-01 20:23:59 +02:00
779bca39a7
Debug flag to add sfence instruction prior to DirectSubmission dispatch
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-04-01 15:53:03 +02:00
beff0019d1
SBA tracking for single address space
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Related-To: NEO-6539
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-04-01 15:24:11 +02:00
4374197c9d
Fixes for bindless configuration
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- enhance ults code, do not inject memory manager
- fix some issues related to bindless global heap
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-04-01 15:08:43 +02:00
7910567a76
Handle missing tag address in getting completion address
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rename test fixture to comply one definition rule
Related-To: NEO-6643
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-04-01 15:00:35 +02:00
88193cc242
Minor fixes
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-03-31 20:02:11 +02:00
9d502dea25
Refactor waitOnCompletionFence method in DrmMemoryManager
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get completion address and value from command stream receiver
Related-To: NEO-6643
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-03-31 19:30:16 +02:00
0c0603966b
Add debug functionality to track dynamic allocations.
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- available only via manual build with ENABLE_DYNAMIC_MEMORY_TRACKING.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-03-31 13:24:15 +02:00
308f9ccfff
Do not allocate dynamic state heap if not needed
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Dynamic state heap is only used for sampler data.
Related-To: NEO-6821
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-03-31 12:13:13 +02:00
afd71beee9
Add slm_alignment entry to .zeInfo payload_arguments section
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This commit adds suport for parsing "slm_alignment" entry in .ze_info
section.
- Set requiredSlmAlignment for addresing mode slm
- Enable optional passed slm alignment parsing (with default value=16
left).
Related-To: NEO-6817
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
2022-03-31 12:00:16 +02:00
Milczarek, Slawomir