Jaroslaw Chodor
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345e56a151
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Zebin improvements
* cleaning-up per-thread buffer size calculations
* fixing default slm alignment to 16
* adding scratch space slots
* renaming slm addressing mode
* adding support for zeinfo version
Change-Id: I0450353788b8488a685976d7f1dd26a44360383c
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2020-10-29 16:33:21 +01:00 |
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Bartosz Dunajski
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1926ef8319
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is_simt_thread token support
Change-Id: I8cee6ff26229f0f492ba0d1e5e61d6e46e0c2486
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
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2020-10-21 14:14:43 +02:00 |
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Jaroslaw Chodor
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321f649854
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Zebin support
Change-Id: I1e426ee2c5174fd0a4c51c1644cda467c2b88881
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2020-08-07 11:48:41 +02:00 |
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Zbigniew Zdanowicz
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134462919d
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Move barrier programming to Encode class
Related-To: NEO-4576
Change-Id: I34b93b3118528b449c4e1b81826f9784633377a9
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
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2020-07-17 14:28:46 +02:00 |
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Jaroslaw Chodor
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a8269f55f9
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Removing grf size from kernel descriptor
Change-Id: I62954d5de596410a463459cc185ff950871fcd36
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2020-04-25 00:15:05 +02:00 |
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Jaroslaw Chodor
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915b80b1df
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Introducing kernel descriptor
Change-Id: I4ce6ebf27a81cf14b055817ebfe76d8427e349ab
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2020-02-25 00:03:15 +01:00 |