aa587b3bc5
Pass HardwareInfo to AubHelper::checkPTEAddress()
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Change-Id: Ie5370b52eb79a8d118bd8033a335dc1319e93be1
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-02-19 08:37:58 +01:00
05d02a6fe7
Change DevicesBitfield type to struct
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Change-Id: I7a005b07737cdd21efc174a2ee2be0f6b7f9068d
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
2019-02-18 13:57:50 +01:00
7f98db617c
Move expectMemory/writeMemory methods to CSRSimulatedCommon
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- fix aub tests with --tbx option
Change-Id: I227449dd8614a8aada3eaa4f28ff6dcca7530956
2019-02-18 10:01:32 +01:00
2bcecf3e62
Align command buffers to 64KB
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Change-Id: Id1fbd7c6f1aee48c4b69ec305d5332cb0aa86507
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-02-18 09:58:45 +01:00
af2dc200c5
Improve creating HwContextController
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Change-Id: If81ec18793a5af7fb58d66bb26a3bc476eaf94e0
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-18 08:57:35 +01:00
51d34da7ec
Add multiEngineQueue field to DispatchFlags and modify interfaces
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Change-Id: Iaa4754a22e9b88201aed7df01c7d6e5fd06c84a9
2019-02-14 17:12:15 +01:00
958d931cd9
Allow to create HardwareContextController for multiple Devices
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Change-Id: Ib066c937809536196182ca87359c487570cc2e89
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-14 16:00:00 +01:00
8e1e874a76
Refactor headers and reorder include order
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Change-Id: I6b341e2b37e569af7d741bfd7a63804c0b25a4c9
2019-02-14 13:39:01 +01:00
76276d4c23
Add unit test for events
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Change-Id: I13d74626a244d234a5bbaff369ed09fb59d6e33f
2019-02-14 12:42:44 +01:00
0f36265f55
Pass CsrType to initAubCenter
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- create AubManager with correct mode
Change-Id: I89c9c3c7edf553854b8b82788cec3dec53a62d79
2019-02-13 09:48:05 +01:00
db8c2bc57e
Unify write memory in simulated csr when aub manager is available
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Change-Id: I28d0496b1b1fb973af4869e5626082142b5818dd
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
2019-02-12 14:43:26 +01:00
f014f27370
Support the EnableLocalMemory debug variable in CSR.
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Change-Id: I902b06ab0b4a3df477d12804ba74b2727d8863f6
2019-02-12 13:09:23 +01:00
6882cf09c1
Avoid manual memory management.
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Change-Id: Id29d9ec366e338d519aad5353a15a44ecf5998e4
2019-02-12 09:14:51 +01:00
5e8fb19e5d
Remove OCL Events concept from EnqueueOperation and dispatchWalker
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Change-Id: Iec55b0be673a2a40b9621212add224a33d4abc5d
2019-02-12 08:46:18 +01:00
12da1b0616
Remove osContextCount parameter from GraphicsAllocation
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Change-Id: I23b650e97f107008b1122a1ecea48722fe129863
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-11 15:44:37 +01:00
75fe358e5d
Add HardwareContextController to use multiple Contexts in single AubCsr
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Change-Id: Ica0f1c8c4e0f55310f4650788e468640406abf51
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-11 15:22:50 +01:00
66e3f3c16c
Remove OCL Events concept from command stream receiver
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Change-Id: I4d5a97b41efe601c92c2f3f33e9e24bb7d4fa3d2
2019-02-08 15:02:40 +01:00
6e0d04e25a
Adding debug flag to disable DC flush in epilogue
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Change-Id: I1784be279ee9f837a0994997bec49c1925a68390
2019-02-08 11:04:25 +01:00
947794f166
Fix for setting context flags in AubDump
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Change-Id: Ia5fba17aac19fbcbfa6676557d1af0889f538b90
2019-02-07 16:28:53 +01:00
4d9acf3352
Pass aubfile name to TbxCommandStreamReceiver::create and CSRWithAubDump
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Change-Id: Ib10c017ce4ed2a572815053dae3f517e0dfd9eb3
2019-02-07 15:05:54 +01:00
4733ce32cf
Move pollForCompletionMask for TBX to new method
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Change-Id: I1ce760ea185064ec9122eb5bf11d9b99c9c700e2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-06 11:18:33 +01:00
048098ce66
Refactor around cache flush after walker
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Change-Id: If5c7399df91bd076b684bcab83f50b4852e53429
2019-02-06 11:12:55 +01:00
ea8aa29e12
Change pollForCompletion() insertion locations
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Poll is done on:
- Aub CSR destruction
- expectMemory
- blocking calls
Poll is not done on flush
Change-Id: I1a776a932cb608c01f0de249e7cef26b00147f31
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-02-05 14:33:42 +01:00
ce4a75e121
Require same allocation type when obtaining reusable allocation
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Change-Id: I829301b83a6214bcfb4fc9f2692f21ae9a002456
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-02-01 16:10:28 +01:00
d30cc221df
Update disabling caching for a resource
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Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-01 10:50:21 +01:00
32ecd91401
Add parameters to HardwareContext read call
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Change-Id: Iba70d4b90d76199df6f0bf90c95adb7dc059c715
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-01 10:22:15 +01:00
6ef2822643
TBX CSR to call writeMemory on aubManager
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Change-Id: Ie10a30944e0c3a8e136816fa91ff501887a3d0d2
2019-01-31 16:18:57 +01:00
783f408f9f
Dont pass EngineType or Index as parameter in Aub/Tbx CSR
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Change-Id: I4583a09a9fa5dd5b0508132c86156c91aaf24c28
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-31 10:30:05 +01:00
666d8854f8
Remove setCsrProgrammingMode() method from AUB CSR
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Change-Id: I04f86e367d919ddd5afd98e9ed07bc505306bcc7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-30 13:32:04 +01:00
f157943610
Allocate internal allocations through preferred pool
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Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-30 11:18:15 +01:00
303014582a
Extend semaphore synchronization for different command stream receivers.
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Change-Id: Ic904b8c1e052adbb7b2ef82a6dec74ec69837f9f
2019-01-30 09:33:41 +01:00
b11e0825c9
AUB capture with support for allocation dumps
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Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
2019-01-28 21:20:08 +01:00
72da161769
Add function to detect conditions to reset CSR
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Change-Id: I76d21eee26e22e841670180392c1b9262f6b59e1
2019-01-28 17:00:00 +01:00
c878590162
Remove EngineInstance parameter from pollForCompletion call
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Change-Id: I07652db2de656032cdb3452239b671edbe876b75
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-28 16:49:25 +01:00
5c66211537
Extract mask and value for pollForCompletion in AubCsr from pollForCompletion
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Change-Id: Ice43f5d57ff7281735d002d389255abe4135feec
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-01-27 13:50:31 +01:00
f332bf369e
Set allocation's lock state only in lockResource and unlockResource methods
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Change-Id: I60f35801287166f5bdb0dfcd31ff0118c56ec22a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-24 15:15:27 +01:00
b2fe74ca9d
AUB capture with writeMemory on aubManager
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Change-Id: Ie954b0d0f72b093f12ef33c93af5a3dc845559dc
2019-01-23 13:54:28 +01:00
21f855b719
AubStream update (1/n)
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Change-Id: I6579e7af2015493490c5edcc413dcb2e6c804b9f
2019-01-22 12:19:21 +01:00
158f200476
Add HW commands const definitions
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Change-Id: If2e9d7f7f707b7b8c7bd8dbd3853ab3b6dad0c9a
2019-01-18 12:13:25 +01:00
9036882d11
Refactoring of additional MMIO registers in AubDump
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Change-Id: I97c0cc25aa24c6abcff4ba7469d6a6e3f0c12b86
2019-01-16 11:16:54 +01:00
f18f9a5f88
Use queue command buffer to program media sampler at submit
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Change-Id: I7cc410a7432564b5f15dbb6943f48b577dfa6936
2019-01-15 15:45:44 +01:00
1de0bda212
Initialize HardwareContext with valid deviceIndex and engineIndex
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Change-Id: I8848936340e8f4b33ac5ed5d0ae85d9f580171ca
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-15 15:33:42 +01:00
06600f169b
Define GPGPU engines per gen
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Change-Id: Ie0e565d11184c5355b5bf09f5b10a567deb5c106
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-15 12:05:19 +01:00
84d35c8951
Add media programming call at the end of command buffer
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Change-Id: Ie60bc384c9385071aa77d2516e1d3649298a1233
2019-01-15 11:35:58 +01:00
ec03210687
Update clEnqueueVerifyMemory
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- return success also for non aub CSRs
Change-Id: Iac7fdcd58e4b76a325ef67fd266f183d779ca956
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-01-14 14:37:09 +01:00
8ae7de7b0e
Create HardwareContext only when osContext is available
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Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-13 15:12:07 +01:00
6ea2d8c2a9
Extract creating aub file name to separate function
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Change-Id: Ie0506f1847684cc3aabd8bee153c944b2f49bdb8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-09 20:45:04 +01:00
ea028d2a9b
Moved TBX and AUB CSR members to SimulatedCommonHw CSR
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Change-Id: I4b49b0cf886c70127a9983dd1c9d7b15f7a45b7a
2019-01-08 09:39:28 +01:00
aee69779fa
Minor renaming in a scope of multi os context allocations:
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shareable -> multiOsContextCapable
resetTaskCount -> releaseUsageInOsContext
resetResidencyTaskCount -> releaseResidencyInOsContext
isUsedByContext -> isUsedByOsContext
Change-Id: If824246a0e393b962bd12f8c63d429a0fcfcda25
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-07 11:42:43 +01:00
9083761dce
Add AUBFillBuffer test with concurrent execution on CS
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Change-Id: Ia01614a9763ff67d27ed68c46a5ae1b9f7dd0ee8
2019-01-04 17:04:55 +01:00
Maciej Dziuban