6ea83f322d
fix: do not override user data beyond slice region
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Related-To: NEO-14538
If user passes slice pitch which is larger than region
to copy, do not override memory beyond region but within
that slice pitch.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2025-04-03 12:37:35 +02:00
62baf28316
fix: remove unnecesarry WA for DG2 compression
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Related-To: NEO-9465
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com>
2025-04-03 08:04:19 +02:00
bc87b1cff0
test: Minor test improvements
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Related-To: NEO-14526
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2025-04-03 07:53:18 +02:00
4651e72b0b
fix: Fail device init if kernel debugging is misconfigured
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Also print error to stderr
Related-to: GSD-10780
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
2025-04-02 21:06:30 +02:00
504440fc4d
feature: Add ftrHeaplessMode flag
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Pass hwInfo to isHeaplessModeEnabled and isForceBindlessRequired functions.
Related-To: NEO-14526
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2025-04-02 21:06:05 +02:00
deca36fd32
fix: Stop ULLS light when evict resource
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Related-To: NEO-14406
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2025-04-02 16:37:43 +02:00
7ef3880793
feature: implement pool allocator for gpuTimestampDeviceBuffer
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The patch applies to Level Zero.
Only allocations < 2MB will be fetched from the pool.
Allocations are shared and reused within a given device.
Additionally, I added a new debug flag to control the allocator:
EnableTimestampPoolAllocator
Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
2025-04-02 14:28:56 +02:00
8836f6df0b
fix: forward mip map level for 3D images
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Related-To: NEO-14539
1D and 2D images have already mip map level set correctly.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2025-04-02 11:46:41 +02:00
3a7d7e022c
fix: Add platform support for reservation on svm heap
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Related-To: GSD-10816
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2025-04-02 02:46:30 +02:00
a48d66ad75
feature: Add programExceptions stub to CSR
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Related-to: NEO-12967
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
2025-04-01 18:33:40 +02:00
3010af596e
performance: add infrastructure for staging with 3D images
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Related-To: NEO-14026
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2025-04-01 15:30:30 +02:00
744ff08454
test: correct verifying programmed GPU addresses
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use memcmp instead of comparing dereferenced pointer
when address is programmed within Walker's inline data the memory location
address is 4B aligned and is not 8B aligned
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2025-04-01 13:18:14 +02:00
0a11a96a53
refactor: Add dedicated method to check if any ULLS light enabled
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2025-03-31 16:36:20 +02:00
e3e01e94a0
Revert "performance: enable Direct Submission on LNL Linux"
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This reverts commit cb3b4d326d
2025-03-31 15:22:29 +02:00
831b488685
fix: improve media engine handling
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Related-To: NEO-14462
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2025-03-31 10:40:21 +02:00
3560b016bd
test: Add errno check to SysCalls wrapper for mkfifo
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Related-To: NEO-11817
Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
2025-03-28 17:07:10 +01:00
a5e19330e9
fix: lock csr before locking residency controller in trim to budget path
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Lock on csr is needed before lock on residency controller to prevent
incorrect lock order. Csr may be locked in waitOnCpu called from trimToBudget,
which may lead to deadlocks
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2025-03-28 16:18:20 +01:00
3fff3dd77b
fix: set misaligned source memory 1-way coherent
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Related-To: NEO-14443
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2025-03-28 14:16:45 +01:00
88a48f1c5b
Revert "performance: Improve ULLS light residency management"
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This reverts commit 35eae3f977
2025-03-28 11:21:27 +01:00
c105c77930
fix: calculation of os context count
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Related-To: NEO-12952
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2025-03-28 09:55:17 +01:00
cb3b4d326d
performance: enable Direct Submission on LNL Linux
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Related-To: NEO-9004
Signed-off-by: Andrzej Koska <andrzej.koska@intel.com>
2025-03-27 17:09:54 +01:00
b43b23b6ed
fix: Init wait utils after hwInfo init for both OS
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Resolves: HSD-18041922513
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2025-03-27 16:45:22 +01:00
ead0842763
feature: add L0 API to query kernel argument info
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Related-To: NEO-14358
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2025-03-27 16:43:33 +01:00
85f2734ca4
fix: correct gt_id to tile_id engine mapping
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2025-03-27 15:57:57 +01:00
c76edaba4e
fix: enable usm reuse limit based on memory usage
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Related-To: NEO-14160, NEO-6893
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2025-03-27 15:14:08 +01:00
915d657420
fix: flag to limit usm reuse based on memory usage
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Host usm and device usm for igfx checks system memory usage.
Device usm for dgfx checks local memory usage.
If used memory is above limit threshold:
- no new allocations will be saved for reuse
- cleaner will use shorter hold time of 2 seconds
- cleaner will free all eligible allocations, regardless of async
deleter thread having work
Motivation: in case of gfx memory being full, making resident new
allocations will require evictions which leads to massive slowdown on
enqueue calls.
This change aims to minimize cases where extra memory usage from usm
reuse mechanism leads to above situation.
Related-To: NEO-6893, NEO-14160
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2025-03-27 10:25:19 +01:00
0aa2c4f0cb
feature: allow removal of heapful code paths
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Related-To: NEO-13007
Signed-off-by: Jack Myers <jack.myers@intel.com>
2025-03-27 01:34:35 +01:00
0243004907
feature: additional checkers to enable feature
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Resolves: NEO-13973
Signed-off-by: Damian Tomczak <damian.tomczak@intel.com>
2025-03-26 18:06:20 +01:00
4bc13fa0dc
fix: correct MetricsLibraryGenId for Xe3
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2025-03-26 16:35:10 +01:00
60b551758c
performance: Adjust waitpkg threshold for discrete devices
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Related-To: NEO-14336
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2025-03-26 14:59:19 +01:00
a89113fa1a
Revert "fix: Fail device init if kernel debugging is misconfigured"
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This reverts commit c122bc51f9
2025-03-26 13:27:12 +01:00
214277125d
Revert "performance: enable ULLS on LNL Linux"
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This reverts commit a15de0c4f6
2025-03-26 13:26:57 +01:00
eeeed9edd8
refactor: cleanup in product helpers
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Related-To: NEO-12681
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com>
2025-03-25 21:07:55 +01:00
c122bc51f9
fix: Fail device init if kernel debugging is misconfigured
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Also print error to stderr
Related-to: GSD-10780
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
2025-03-25 20:40:25 +01:00
75119f1887
test: add compression_tests_xe2_and_later
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Related-To: NEO-9465
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com>
2025-03-25 18:15:20 +01:00
35eae3f977
performance: Improve ULLS light residency management
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-skip bo::wait if completion fence not needed
-do not restart exec on evict
Related-To: NEO-13922
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2025-03-24 17:48:55 +01:00
f67663d863
fix(sysman): Create Engine Handles for multiple gt w.r.t Xe driver
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For the Xe driver, a single tile can have multiple gts. Now the Engine
handles are created for multiple gts available on the single tile as in
the case for the Xe driver.
Related-To: NEO-14401
Signed-off-by: Pratik Bari <pratik.bari@intel.com>
2025-03-24 17:14:02 +01:00
ad49418575
test: change incorrect name of constant
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Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2025-03-24 17:13:45 +01:00
73795ced64
refactor: add setupTimestampPacketFlushL3 function
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2025-03-24 13:10:03 +01:00
26c23460cb
fix: set heapless mode for builtins compilation
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Related-to: NEO-13973
Signed-off-by: Damian Tomczak <damian.tomczak@intel.com>
2025-03-24 12:01:58 +01:00
8fbde30432
fix: Adjust waitpkg threshold to 12 us
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Resolves: NEO-14434, NEO-14435
Related-To: NEO-14336
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2025-03-24 11:43:54 +01:00
a15de0c4f6
performance: enable ULLS on LNL Linux
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Related-To: NEO-9004
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2025-03-24 10:44:23 +01:00
f4f13dfeec
Revert "performance: disable cpu caching for buffers on PTL"
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This reverts commit c3f0c4e4ac
2025-03-24 10:23:07 +01:00
6e998fc3c1
fix: move host usm reuse max size to mem manager
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Intialize value on memory manager creation.
Related-To: NEO-6893
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2025-03-24 08:53:30 +01:00
54cb0e24f8
performance: Switch waitpkg use to tpause for ULLS light
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Related-To: NEO-13922, NEO-14336
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2025-03-21 18:09:37 +01:00
bb10290828
fix: make misaligned user memory 2-Way coherent
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Related-To: NEO-9004
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2025-03-21 17:56:37 +01:00
7c75807987
performance: Enable waitpkg with tpause
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Resolves: NEO-14336
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2025-03-21 17:30:55 +01:00
28dd4cf4d8
Revert "feature: additional checkers to enable feature"
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This reverts commit c95a67b420
2025-03-21 16:48:05 +01:00
1b7bf690d2
fix: update fence values when residency list passed to switch ring buffer
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Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2025-03-21 12:26:08 +01:00
8a85a96ed2
feature: Add 3-level wait scheme with tpause intrinsic
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Related-To: NEO-14336
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2025-03-21 12:12:57 +01:00
Szymon Morek