Commit Graph

1063 Commits

Author SHA1 Message Date
Bartosz Dunajski 24c6a1ed96 Add MI_FLUSH_DW command estimation
Change-Id: I71d966209ce1a9996bfe3f48f3d8da00156211a3
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2020-03-13 14:11:24 +01:00
Kacper Nowak b94ce17cb4 remove magic numbers + add reg_global_timestamp to helper
Change-Id: I8a42139ef73586edc7f826750f7d6582e1750cad
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
2020-03-12 16:04:49 +01:00
Milczarek, Slawomir beb52c58b1 Moved additional synchronization helpers to base inl file
Related-To: NEO-4227

Change-Id: If79559b6a7fbf71d76983bfb9bf518d902fc235a
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2020-03-11 13:51:41 +01:00
Bartosz Dunajski 1399e55df7 Flush cache for blit aux translation
Change-Id: I108273bee286cdeed06e0c287945099cea481a73
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2020-03-11 08:40:06 +01:00
Bartosz Dunajski db012c9d5c Add cache flush for blit enqueues
Change-Id: I31dbeed9973c5077bf79ea7c7534b2430bca5083
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2020-02-27 16:16:20 +01:00
Sebastian Sanchez 54b2763466 Enforce ALU register type for EncodeMath interface
General purpose register cannot be used for MI_MATH
calculations. ALU registers must be used.

To prevent passing general purpose register into the
EncodeMath interface, enforce a ALU register type
at compile time.

Change-Id: I98aa8605cde27e7003029d33b3ef3bcfb2306878
Signed-off-by: Sebastian Sanchez <sebastian.sanchez@intel.com>
2020-02-27 08:33:04 +01:00
Mateusz Jablonski 2c62dadd97 Pass RootDeviceEnvironment to setRenderSurfaceStateForBuffer method
Change-Id: I3d3b9515be7d31aef64c260d0988db357e8122ca
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2020-02-25 15:50:18 +01:00
Kamil Kopryk 71468dd11d Add selector for copy engines
Change-Id: I28b11aead8e554b7299ff7f504751847068a2edf
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-4320
2020-02-25 14:10:25 +01:00
Maciej Plewka 357fdc2e65 Move built ins to share directory
Change-Id: I740a349a0f15229cd356fffe996932029bf0f98b
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2020-02-24 15:46:44 +01:00
Dunajski, Bartosz 750036742d Create only available engines
Change-Id: If7880db0dd7aa76b578d0e4e300f510ca686b825
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2020-02-24 14:06:36 +01:00
Mateusz Jablonski 9dbeeea18f Clang-format: restore sorting includes
Change-Id: I34eb993b562c77f56d8fbd51a02ee266c1f76678
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2020-02-24 10:22:30 +01:00
Mateusz Jablonski 7df9945ebe Add absolute include paths
Change-Id: I67a6919bbbff1d30c7d6cdb257b41c87bad51e7f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2020-02-23 23:49:12 +01:00
kamdiedrich e072275ae6 Reorganization directory structure [3/n]
Change-Id: If3dfa3f6007f8810a6a1ae1a4f0c7da38544648d
2020-02-23 23:48:28 +01:00