Commit Graph

158 Commits

Author SHA1 Message Date
b8fb5e683b Move basic_math.h and vec.h to core directory
Change-Id: I143b7af450ff48d4958b4bc7137b393a2dc0eb64
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-05-14 21:32:55 +02:00
0f87e9aa1a Rename HardwareInfo members
Change-Id: I85f56b677bafdd75dd958b488522393fc18b68af
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-09 09:13:55 +02:00
bb80d327c7 Move HardwareInfo ownership to ExecutionEnvironment [1/n]
Change-Id: I5e5b4cc45947a8841282c7d431fb69d9c397a2d4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-08 16:11:01 +02:00
bc35cd250a Do not use max power saving mode in VA sharing scenarios.
-This can be achieved by passing CL_QUEUE_THROTTLE_LOW_KHR as throttle hint
to command queue.
- This gives much better control about the granularity of this feature
instead of triggering this for the whole context user may still have
power saving mode queues.

Change-Id: I066729f963119ddc1f62ad2785c342af2fea588e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-05-07 15:23:13 +02:00
79e22a09b9 Report SPIRV 1.2 as supported
Change-Id: I3ce078f166d5257ee4e06281b6f42c1091e05b91
Signed-off-by: Adam Cetnerowski <adam.cetnerowski@intel.com>
2019-04-23 09:58:24 +02:00
1d42fe169a Add allocation types for MCS, preemption and shared context image
Related-To: NEO-2733

Change-Id: I3e3e4ea6d4fe084c8c32c0e24c537c9131ce1e60
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-04-17 14:41:01 +02:00
b51b4a173b Pass hwInfo to getExtraDeviceInfo
Resolves: NEO-3106
Change-Id: I8d74ac536f4325b35536f3895015a571eecafc3a
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-04-17 11:48:20 +02:00
78e50cae56 Add registry key to always select engine 0.
Change-Id: Ia2bb3307dfd69be32a77217b54bedf7178610db0
Resolves: NEO-3089
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-04-09 18:51:56 +02:00
d4a0c4852b Move EngineType to aub_stream.
Change-Id: Ieaa75aaf4aca4487833754eb38ff709adcbf0f11
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-27 10:06:29 +01:00
9e52684f5b Change namespace from OCLRT to NEO
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-03-26 15:48:19 +01:00
14824f1dff Add support for device specific extensions.
Change-Id: I3ffd125875067b00bc225556c09fbe2d02f11022
Signed-off-by: Zdunowski, Piotr <piotr.zdunowski@intel.com>
2019-03-25 16:02:11 +01:00
9ecb3193af Reverse logic of creating Memory Manager - part 3
-Move a Device::getEnabled64kbPages method's logic
 to the Memory Manager constructor

Change-Id: Ide88898000e5817a79f9a6ad5dfc9d680bec0533
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-03-25 14:42:16 +01:00
cc13045ddd Move definitions out of engine_node.h.
Change-Id: I18692a444663c11103f8991415b38000c633f24a
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-25 13:22:55 +01:00
a8db48dbca Refactor Device::getEngine to get Engine by its type
Change-Id: I640b32c0d226686e6648d39dd62404f5d507c98f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-03-25 10:49:37 +01:00
16aee8cc46 [2/n] Move Hardware Info to Execution Environment
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
2019-03-22 10:08:26 +01:00
db9afd06cd Remove EngineInstanceT.
Change-Id: I08543b5f4ef5e91e6beb8390d448e53702cd9dac
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-20 10:56:22 +01:00
cacab6b1bc Expose cl_khr_spirv_no_integer_wrap_decoration extension
Change-Id: If64a6e86386064ec659b1870dd7fe0c4b00333e9
Signed-off-by: Adam Cetnerowski <adam.cetnerowski@intel.com>
2019-03-19 15:33:23 +01:00
a25cca2099 Move Device helpers to namespace
Change-Id: Id7aa7b7e490c5ae87a517b3e0be16292a7de9a93
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-03-19 15:01:34 +01:00
429487fad0 Add constructor parameter to select low priority context.
Change-Id: Ieb3fa008a2f1b54052e393516038c88f00944fa0
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-18 15:09:59 +01:00
25e6494443 Use std::bitset for deviceBitfield.
Change-Id: I9078ffbb38967b753980cb1c5ebcab00f5292598
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-14 08:36:01 +01:00
341fcfc091 [1/n] Move Hardware Info to Execution Environment
- remove gmm_environment_fixture
- remove hwInfo parameter from ExecutionEnvironment methods

Change-Id: Ieb0f9b5b89191fbbaf7676685c77644d42d69c26
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
2019-03-12 08:39:26 +01:00
4386d10e40 Reverse logic of creating Memory Manager - part 2
-remove MM initialization from Device::CreateEngines method

Change-Id: Iaee268b002cb0f0a4edd07907c12da6dd6076b3a
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-03-08 14:52:55 +01:00
878fd43a1a Reverse logic of creating Memory Manager - part 1
-remove CSR::createMemoryManager method
-create MM from platform before creating devices

Change-Id: I0e7f091c53b0e60ae7101e82a305253af626330e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-03-08 09:47:29 +01:00
f24b428cf7 Improve HardwareContextController creation
Change-Id: Iba929a2b4fcd993b38dd674be578aad0a481e8de
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-03-06 12:31:20 +01:00
8b57d28116 clang-format: enable sorting includes
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-27 11:50:07 +01:00
64fbfb21bf Improve iterating over existing CommandStreamReceivers
Change-Id: I12a10852d43c625ec5521ae91918fcb12e1a6aec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-19 11:48:56 +01:00
958d931cd9 Allow to create HardwareContextController for multiple Devices
Change-Id: Ib066c937809536196182ca87359c487570cc2e89
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-14 16:00:00 +01:00
8e1e874a76 Refactor headers and reorder include order
Change-Id: I6b341e2b37e569af7d741bfd7a63804c0b25a4c9
2019-02-14 13:39:01 +01:00
f014f27370 Support the EnableLocalMemory debug variable in CSR.
Change-Id: I902b06ab0b4a3df477d12804ba74b2727d8863f6
2019-02-12 13:09:23 +01:00
dc181defba Use GpuAddress for TimestampPacket programming
Change-Id: I1303605c33e2e0267a1716e12a0bfcb341fcfbd7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-11 15:31:17 +01:00
30c57fd507 Simplify Device creation
Change-Id: Iac07194db73d7f0a6914bc3550c6cba67135c24c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-07 10:41:00 +01:00
3a11da8ec8 Reduce max planar YUV height to 16352 rows
The UV plane placement granularity has been changed to full tile (32 rows).
Because UV plane offset size in Surface State is 14 bits, the maximal height
has to be reduced from 16380 to 16352 to allow maximal offset to fit into
14 bits.

Change-Id: I2b21719d8d63a7f075150eef492ee44bd4dfe294
Signed-off-by: Wilma, Pawel <pawel.wilma@intel.com>
2019-01-17 13:02:46 +01:00
06600f169b Define GPGPU engines per gen
Change-Id: Ie0e565d11184c5355b5bf09f5b10a567deb5c106
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-15 12:05:19 +01:00
8ae7de7b0e Create HardwareContext only when osContext is available
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-13 15:12:07 +01:00
30dd15144c Add debug variable to disable host ptr tracking.
Change-Id: Ifc866e06a4519e7590d40d8ad136147ecc80225d
2019-01-11 12:06:52 +01:00
a2a4bcc33d Correct extension string typo
Change-Id: I1305a0251b06e8601e78a9b8774c285e035ff28d
2018-12-27 12:36:49 +01:00
ba66999f28 Add DebugFlag capability to force disabling/enabling local memory
Change-Id: Ic59780d200cc4b0e1a764b436aa7273c3ca8c728
2018-12-19 12:00:30 +01:00
6b8d8cbcbb Revert "Revert "Expose spirv extensions""
This reverts commit 469fe40072.

Change-Id: I8b634ef05a3b7e4e6abb05b42eacae24b7871632
2018-12-17 10:52:49 +01:00
8ec072d39c Simplify Memory Manager API [3/4]
- remove method allocateGraphicsMemory(size_t size)
- pass allocation type in allocation properties
- set allocation type in allocateGraphicsMemoryInPreferredPool

Change-Id: Ia9296d0ab2f711b7d78aff615cb56b3a246b60ec
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-17 10:42:16 +01:00
3581bdb804 Add capability to enable/disable local memory via debug flags.
Change-Id: Ica388751f4be3afbd2c78a0f169576d2654e1a0f
2018-12-14 12:08:21 +01:00
a6be6533ea Simplify Memory Manager API [2/n]
- make AllocationData a protected structure
- use AllocationProperties instead of AllocationFlags
- refactor methods: allocateGraphicsMemory64kb, allocateGraphicsMemoryForSVM
- call AllocateGraphicsMemoryInPreferredPool in AllocateGraphicsMemory
  where there is no host ptr

Change-Id: Ie9ca47b1bccacd00f8486e7d1bf6fb3985e5cb12
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-11 13:12:00 +01:00
0b839722f4 Don't store preemption mode in Wddm.
Change-Id: I6088e5fec65b6910fefb42ec9735181867c44a1b
2018-12-10 14:48:52 +01:00
7f7808fb71 Select RCS1 for low priority CommandQueue
Change-Id: I1f86b0afedb8f6e76fee896c2751a0bf196996d7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-07 13:18:13 +01:00
c8748b77a0 Simplify memory manager API [1/n]
pass struct with properties to allocate graphics memory methods:
for protected methods use AllocationData
for public methods use AllocationProperties

Change-Id: Ie1c3cb6b5e330bc4adac2ca8b0bf02d30ec76065
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-06 15:09:25 +01:00
ace20aba5b Add slm size to capabilityTable
Change-Id: Ia8839b2268069ac3815ff21cf247deefbf3b5335
Signed-off-by: Woloszyn, Wojciech <wojciech.woloszyn@intel.com>
2018-12-06 13:43:39 +01:00
1f7448425d Allow Device creating multiple CSRs [7/n]
Create and initialize all supported Engines

Change-Id: If0adf1a06b5005ef2698cebc6f1aaa6eacf562ec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-30 15:48:44 +01:00
0131e66a70 Allow Device creating multiple CSRs [6/n]
- Introduce default Engine query
- Improve Deferred Deleter usage
- Remove Tag Allocation from Device

Change-Id: Iaa88d8dc0166325acf9a157dcd2217ea408ee285
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-29 16:20:13 +01:00
d39309adf2 Use const values instead of constexpr from std::array::size()
Change-Id: I705888b77801cd32487c4d53fc320cf839ec9079
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-28 22:57:33 +01:00
ef33c57245 Initialize SipKernel after all devices are created
Change-Id: Iec5de27fd1e5106c78de0bc5c1861a894162b274
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-11-28 11:36:54 +01:00
b0de2a11d2 Set OsContext as reference
Change-Id: I3b682fabde9c2ddb2c33a95aef77bf6ce400a21f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-27 15:32:14 +01:00