This change prepares infrastructure for pipeline select handling in
command lists and queues by optimization of number of commands dispatched.
State is synchronized between flush-task immediate and regular command lists.
Next step is to add optimization itself which disables legacy hw command
dispatch algorithm.
This change corrects ADL-P support for systolic mode changes.
Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6075
Binding table entry count was zeroed even when
ForceBtpPrefetchMode debug flag was enabled
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-7156
Additional pipeline select is required only on specific
gen12lp products. That check was missing only in cmdstream size
estimation path, hence we had an overestimation.
Command lists and their helper classes should use engine group type
assigned to the particular command list to check if it is RCS group
and not use default CSR class assigned to the device, since default
and current in command list might be different.
Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
Remove function clearComputeModePropertiesIfNeeded.
If a field has to be programmed unconditionally, ignore isDirty flag.
Related-To: NEO-6728
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
When linear stream created for command container has not enough space
for command and BB_END it will program BB_END and allocate new command
buffer allocation. Pointer returned from getSpace in this case will
return storage from new command buffer allocation.
Related-To: NEO-5707
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
This allocates the buffer on a per-device basis and enables ray
tracing on devices that support it when given a kernel with ray
tracing calls.
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
return if context has multiple sub devices related to a given root device
Related-To: NEO-3691
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
encodeMulRegVal() makes extensive use of encodeAluAdd().
The following problems are addressed:
* encodeAluAdd() performs an addition and saves the
calculated result to the first register. Saving the
result to the first register clears the calculated result.
* An array of MI_MATH buffers is setup prior to performing a
series of encodeAluAdd()'s where the same registers are
reused for the calculations. For calculated results to be
carried over from one encodeAluAdd() operation to subsequent
encodeAluAdd() operations, the MI_MATH buffer needs to be
setup per encodeAluAdd().
Create EncodeMath<Family>::addition() to reserve a MI_MATH buffer
and performs the addition by calling encodeAluAdd().
Modify encodeAluAdd() to save calculated result to a third
register. Then, after EncodeMath<Family>::addition() is called
in encodeMulRegVal(), copy the calculated result from the result
register to the first register from the EncodeMath<Family>::addition()
operation. This will allow the calculated value to be carried over
to subsequent addition operations.
Change-Id: I9c6f8362a1ca2f7e3361aaa48d8748dd6ff0f4c8
Signed-off-by: Sebastian Sanchez <sebastian.sanchez@intel.com>
Zbigniew Zdanowicz