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55 Commits

Author SHA1 Message Date
Hoppe, Mateusz 0f36265f55 Pass CsrType to initAubCenter 
- create AubManager with correct mode

Change-Id: I89c9c3c7edf553854b8b82788cec3dec53a62d79
 2019-02-13 09:48:05 +01:00
Jablonski, Mateusz db8c2bc57e Unify write memory in simulated csr when aub manager is available 
Change-Id: I28d0496b1b1fb973af4869e5626082142b5818dd
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-12 14:43:26 +01:00
Piotr Fusik f014f27370 Support the EnableLocalMemory debug variable in CSR. 
Change-Id: I902b06ab0b4a3df477d12804ba74b2727d8863f6
 2019-02-12 13:09:23 +01:00
Dunajski, Bartosz 75fe358e5d Add HardwareContextController to use multiple Contexts in single AubCsr 
Change-Id: Ica0f1c8c4e0f55310f4650788e468640406abf51
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:22:50 +01:00
Hoppe, Mateusz 4d9acf3352 Pass aubfile name to TbxCommandStreamReceiver::create and CSRWithAubDump 
Change-Id: Ib10c017ce4ed2a572815053dae3f517e0dfd9eb3
 2019-02-07 15:05:54 +01:00
Dunajski, Bartosz 4733ce32cf Move pollForCompletionMask for TBX to new method 
Change-Id: I1ce760ea185064ec9122eb5bf11d9b99c9c700e2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-06 11:18:33 +01:00
Dunajski, Bartosz 32ecd91401 Add parameters to HardwareContext read call 
Change-Id: Iba70d4b90d76199df6f0bf90c95adb7dc059c715
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-01 10:22:15 +01:00
Milczarek, Slawomir 6ef2822643 TBX CSR to call writeMemory on aubManager 
Change-Id: Ie10a30944e0c3a8e136816fa91ff501887a3d0d2
 2019-01-31 16:18:57 +01:00
Dunajski, Bartosz 783f408f9f Dont pass EngineType or Index as parameter in Aub/Tbx CSR 
Change-Id: I4583a09a9fa5dd5b0508132c86156c91aaf24c28
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-31 10:30:05 +01:00
Milczarek, Slawomir b11e0825c9 AUB capture with support for allocation dumps 
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
 2019-01-28 21:20:08 +01:00
Dunajski, Bartosz c878590162 Remove EngineInstance parameter from pollForCompletion call 
Change-Id: I07652db2de656032cdb3452239b671edbe876b75
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-28 16:49:25 +01:00
Zdanowicz, Zbigniew 158f200476 Add HW commands const definitions 
Change-Id: If2e9d7f7f707b7b8c7bd8dbd3853ab3b6dad0c9a
 2019-01-18 12:13:25 +01:00
Dunajski, Bartosz 8ae7de7b0e Create HardwareContext only when osContext is available 
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-13 15:12:07 +01:00
Milczarek, Slawomir ea028d2a9b Moved TBX and AUB CSR members to SimulatedCommonHw CSR 
Change-Id: I4b49b0cf886c70127a9983dd1c9d7b15f7a45b7a
 2019-01-08 09:39:28 +01:00
Hoppe, Mateusz e195b0e380 Initialize TBX stream only when hardwareContext is not created 
Change-Id: I05d8c5c395cc342ea699333dd59966913f9a98df
 2018-12-31 12:14:55 +01:00
Milczarek, Slawomir 541ab5af50 TBX CSR with an option to create and operate on hardware context 
Change-Id: Ib5febc8e36e61195a5fcce91e1783117717ff6cb
 2018-12-20 10:59:53 +01:00
Kowalczuk, Jakub 53fb222fe7 Unify AUB and TBX CSRs part 3 
Move:
- getCsTraits
- initEngineMMIO
- submitLRCA
to common CSR

Change-Id: I8f172b017be2e8f7c54efc8420edd2671d99a927
 2018-12-19 12:02:24 +01:00
Pawel Wilma 068582445d Move physical address allocator to CommandStreamReceiverSimulatedHw 
Change-Id: Ic3c397fe1a93eccae9235f1315a26ae31a3f5b60
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-19 09:26:31 +01:00
Dunajski, Bartosz 403fedfb7b Improve EngineInstance usage in Aub CSR 
Change-Id: I9097f7cc8c930fcf531744af9bddfa38b2c5e1da
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-18 12:11:00 +01:00
Kowalczuk, Jakub 9e53740130 Unify AUB and TBX CSRs part 2 
Move:
- getEngineIndexFromInstance
- getEngineIndex
to common CSR
Unification of arguments of some AUB/TBX methods

Change-Id: I46f25e16aa9fbad10ffc3890cc31915fa5edb1d9
 2018-12-10 12:23:27 +01:00
Kowalczuk, Jakub 2dd71c2e25 Unify AUB and TBX CSRs part 1 
Move:
- getPPGTTAdditionalBits
- getGTTData
- getMemoryBankForGtt
to common CSR

Change-Id: I7c9616bc18a4cffb0673d7964af168ea3ddad2dd
 2018-12-07 09:24:54 +01:00
Dunajski, Bartosz b728526c4e Allow Device creating multiple CSRs [8/n] 
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
 2018-12-04 15:36:59 +01:00
Mrozek, Michal 38fb8cd9c3 Refactor mmio programming. 
Change-Id: I2ec9294b800adcd537f03d69fd4ba4e015e8db7a
 2018-12-03 14:40:00 +01:00
Dunajski, Bartosz 2d77b86e70 Allow Device creating multiple CSRs [5/n] 
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 14:25:04 +01:00
Mateusz Jablonski 0e0a280803 Create structure UsageInfo for task count and residency task count 
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-15 14:07:05 +01:00
Milczarek, Slawomir aa18a62d70 A partial unification of AUB and TBX CSR classes 
This commit moves initialization of global MMIOs from AUB CSR to Simulated CSR

Change-Id: I93a612d4f0c82e7135287f6508870190790141bc
 2018-11-10 13:12:22 -08:00
Zdanowicz, Zbigniew ce75767ca3 Add AUB registry key to override MMIO offset value 
Change-Id: Iac3bf9074e544a03e38fc437d7b21ea478d9cc5d
 2018-11-03 00:33:50 +01:00
Maciej Dziuban 130a7ac8b8 Delete TypeSelector helper 
Change-Id: Iff5fe62d31fa7b07658cfcf81ebd2c12d47e2b3b
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-08 13:18:36 +02:00
Hoppe, Mateusz 2f7158e035 Move createPhysicalAllocator() to a common CSR class 
- AUB and TBX use this method and it was duplicated,
- moving to common base class allows to remove duplicates

Change-Id: Ia9f08dfb0967de1b5968ac0e531733c5b868e504
 2018-10-08 11:38:57 +02:00
Hoppe, Mateusz 7ddf1d554b Move getAddressSpace from AUB & TBX CSRs to CSRSimulatedHw 
Change-Id: Iaa6164445f55efba3681fc41e2ec614f999e1362
 2018-09-27 10:43:00 -07:00
Mrozek, Michal 4912f41759 Add additional layer for common AUB & TBX stuff. 
- Move one function there.
- This layer will cover common functions that are not branch specific.

Change-Id: Ia8a288f8f51647a333a73f35cf999df9f2d5f5b1
 2018-09-26 02:20:59 +02:00
Mrozek, Michal f564792895 Create common class for TBX & AUB. 
- Move one method there.

Change-Id: I96cc0a64e24e4931a8d71a552f5cbf22bf99bfc2
 2018-09-26 01:24:59 +02:00
Maciej Dziuban f48b90ffee Change CommandStreamReceiver::flush() argument to a reference 
Change-Id: Ic933a297d4c4e243138d0d62323ba82a8b91240f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-25 17:28:44 +02:00
Hoppe, Mateusz 91aaa92fb6 Refactor PhysicalAddressAllocator 
- create allocator dynamically in AUB & TBX CSRs

Change-Id: I3b01a3fc2f4824b552ef27cbda5bdcc140e92e53
 2018-09-21 21:48:57 +02:00
Mrozek, Michal 78f828fcd1 Make residency in graphics allocation OsContext dependent. 
- Graphics Allocation now holds residency control per OsContext.

Change-Id: Ie0a0d3aa9fdaf542fdd42dee3aba236a5af635c7
 2018-09-20 16:44:04 +02:00
Hoppe, Mateusz 4af432ae10 Store page entry bits in PageTable entries 
- set Present bit when entry is allocated regardless entry bits passed.

Change-Id: Ib1393927f66c4ed0b577a4df58d2760fbff86df7
 2018-09-20 09:25:34 +02:00
Hoppe, Mateusz 619d2217cb Pass AubHelper to reserveAddressPPGTT(). 
- get PageTable entry data hints and address space from AubHelper
based on local memory flag
- add enableLocalMemory flag in CSR HW

Change-Id: I061bda62be8da55d52cff48ecddcf26c4212dc67
 2018-09-17 18:48:06 +02:00
Maciej Dziuban ac1d2b9901 Change processResidency argument to a reference 
Change-Id: Ie313a8cc4e479a314bcf170917397c13fbb70d14
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-14 13:36:20 +02:00
Hoppe, Mateusz 610eda5ad1 Add PhysicalAddressAllocator to PageTables 
- Allocator is responsible for physical pages allocation

Change-Id: I3a9034c87292484da8f4f0eb1d1e0cc5122a4d8a
 2018-09-14 13:23:07 +02:00
Maciej Dziuban 4da2dd471d Get rid of processResidency() calls with null ResidencyContainer 2/n 
Change-Id: Ic2495cd21304710825727177a1d90889e22808d8
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-11 15:01:01 +02:00
Milczarek, Slawomir 991bbddeba Add function to get Page Table entry bits 
This commit adds a helper function to get Page Table entry bits
and control a configuration of first levels page walks (non-PTE).

Change-Id: I85666ffae8e89a193d1ac4a065c2b84b814d47ec
 2018-09-11 14:10:42 +02:00
Hoppe, Mateusz 2315403542 Refactor AUB & TBX CSRs 
- add method for getting addressSpace

Change-Id: I12d466e358db1d21c038bd9e0201cae433a5ec1a
 2018-09-10 09:42:35 +02:00
Stefanowski, Adam 8a005434f4 [1/n] Initialize WDDM only once 
- remove Wddm parameter from WddmCommandStreamReceiver
and pass it via ExecutionEnvironment
- remove drm parameter from DrmCommandStreamReceiver
and pass it via ExecutionEnvironment
- remove void parametr from TbxCommandStreamReceiverHw

Change-Id: Ib76332f1341339426e86e0ce2b6ce96919219881
 2018-09-06 14:14:29 +02:00
Mateusz Jablonski 92bfd2e3d2 Move OsContext to Device 
Change-Id: I030b65372fbdc075423d22720e9da34ac65b8e68
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-09-03 10:42:26 +02:00
Mrozek, Michal 1599ea800e Pass execution environment to command stream receiver. 
Change-Id: I598f67f8b005b5ce8249b638e080657eb6dc3547
 2018-08-08 17:10:39 +02:00
Mrozek, Michal 6f251f5ea1 Fix TBX completion loop. 
- resources are dumped in make non resident call
- in order to dump correct data we need to be sure that GPU is done processing
- waiting needs to be unconditional to handle all cases
- remove not needed parameter to makeSurfacePackNonResident

Change-Id: Ib2b065d486cd3a5d86e599c51b24f3c958c3a10b
 2018-08-03 09:32:24 +02:00
Hoppe, Mateusz 64277ee849 TBX CommandStreamReceiver fix for makeCoherent 
- makeCoherent should be called after TBX finished processing
 - this is when tagAddress is updated with taskCount
makeCoherent is called from makeNonResident which is invoked just
after flush and may happen before TBX server finished processing
leading to invalid data to be read back to CPU accessible memory

- this fix adds waiting for taskCount to blocking calls for TBX CSR
before calling makeNonResident on surfaces to guarantee correct data
from TBX server is ready.

Change-Id: I498a5454e0826eec2a5413a08880af40268550e1
 2018-07-04 12:04:32 +02:00
Milczarek, Slawomir fb10f666e9 AUB CSR: Ensured PTE bits be set correctly for Global GTT 
This commit fixes the issue with setting reserved bits in PTE for GGTT.

Change-Id: I08582e20914419a3363c9e61085dcf03ba355a61
 2018-06-21 22:23:01 +02:00
Zdanowicz, Zbigniew 36621b2488 Use product aub device id and make it configurable by using debug flag 
Change-Id: Ie65eea0f72497ef68e805ad438f4f53df731d304
 2018-06-06 17:09:21 +02:00
Zdanowicz, Zbigniew f94844305f Add new arguments to aub dumping interface 
Change-Id: I226ec04a919f4ca6ae5c237cf189e043f8286d5e
 2018-05-10 13:33:54 +02:00