Commit Graph

295 Commits

Author SHA1 Message Date
f5d683063b test: pass empty execution environment when preparing device environments
Related-To: NEO-8187

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-08-02 13:05:34 +02:00
12ab74fe96 performance: flag to program barrier in task cs
Add debug flag ProgramBarrierInCommandStreamTask to program barrier
pipe control in task command stream instead of csr command stream.
This will reduce the number of batch buffer starts.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-08-02 10:26:34 +02:00
e2ad2e8db0 fix: initialize GPU VA for additional synchronization WA
Related-To: NEO-8072

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2023-08-01 11:43:52 +02:00
997b599168 fix(debugger): pass correct sipAllocation to makeResident
- sipAllocation for context must be resident in Offline mode

Related-To: NEO-7630

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-07-28 20:51:12 +02:00
cd9ad1f04c fix: decanonize GPU VA during TBX memory read.
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-07-26 19:44:19 +02:00
a241099dff feature: use WaitUserFence on zeEventHostSynchronize
Disabled by default. Debug flag is required.

Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-07-26 19:41:09 +02:00
2c50fd9486 fix: waiting for completion in TBX mode
- use testTaskCountReady method to check TaskCount value
- download all allocations when TaskCount is ready

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-07-25 11:54:09 +02:00
8c155a2e89 Revert "performance: Memory handling improvements"
This reverts commit 5b80bd4d7c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-07-20 11:37:09 +02:00
1434872427 refactor: remove unused code
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2023-07-20 11:09:55 +02:00
5b80bd4d7c performance: Memory handling improvements
By default prefer allocating memory first by KMD, instead of malloc first.

By default prefer not caching allocations on MTL devices. This results
in allocations being handled with non-coherent pat index.

For integrated devices when caching is not preferred do not allow
direct memory access in CPU domain. For map/unmap operations create
a dedicated memory allocation for CPU access, instead of accessing it
directly, reusing the same logic as when mapping/unmapping local memory.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-07-19 19:21:44 +02:00
622a3ed89c performance(ocl): flag to not dcFlush on no event
If waitForBarrier is not passed outEvent then do
dcFlush on the next synchronize call.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-07-18 15:38:54 +02:00
1c0285a156 fix: correct alignment of per thread scratch size
Related-To: NEO-5288

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-12 12:31:47 +02:00
3f7269d401 fix: make sip state programing once for all level zero command queues
Related-To: NEO-7828

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-11 11:34:21 +02:00
8836838c7c performance: add one time context init sip state to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-06 14:25:35 +02:00
59949bc833 performance: add one time context init csr surface to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-05 16:18:21 +02:00
69d80ee5bc performance: add one time context init preemption mode to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-05 14:06:14 +02:00
e52e4f28f2 fix: correct csr state and command programming
- global stateless mode should save surface state base address
- correctly retrieve scratch offset for front end programming
- do not override general base address value and use indirect heap property

Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-03 15:55:55 +02:00
21823af419 performance: add skeleton method to cmdlist immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-30 10:46:20 +02:00
eb4e7fb2a6 performance: immediate flush add flushing mechanism to gpu
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-29 15:52:13 +02:00
b3ebcfe811 performance: immediate flush add ending commands to command list buffer
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-28 08:22:29 +02:00
bd15d067d5 performance: immediate flush add jump to batch buffer when preamble is present
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-23 09:28:15 +02:00
c37dbc4cf0 performance: add one time context init ray tracing to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-21 18:27:31 +02:00
67b74e211d performance: add one time context init partition data to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-20 14:45:37 +02:00
7aff4e1bf4 performance: add one time context init system fence to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-20 07:25:09 +02:00
1146f42bcb performance: add scratch space handling to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-16 13:08:35 +02:00
305f24ec9d performance: add state base address dispatch to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-14 18:00:04 +02:00
60d5e22f3b fix(ocl): reduce busy waiting in clFinish
Use flushStamp=taskCount when passed flushStamp==0.
This will cause driver to busy wait for a short while before falling
back to use kmd notify.

Related-To: GSD-3612

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-06-14 13:56:40 +02:00
5fe9d70066 feature: new multitile post sync layout for immediate write [1/n]
No functional changes in this commit. This is prework.

Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-06-07 13:11:10 +02:00
8d983d3e7a performance: add new copy operations to state base address properties
Adding properties to selectively copy properties for surface state,
dynamic state and binding table base addresses.

Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-07 11:34:28 +02:00
831363e51b performance: add state compute mode dispatch to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-06 13:29:39 +02:00
b66a2bf32c performance: add front end dispatch to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-05 13:04:57 +02:00
cf5100c134 performance: add pipeline select dispatch to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-02 10:31:13 +02:00
5aeffbf673 refactor: define initial value for TimestampPacket
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-05-30 12:09:05 +02:00
ded9d7bff2 feature: Get Peer Allocation with specified base Pointer
Related-To: LOCI-4176

- Given a Base Pointer passed into Get Peer Allocation, then the base
pointer is used in the map of the new allocation to the virtual memory.
- Enables users to use the same pointer for all devices in Peer To Peer.
- Currently unsupported on reserved memory due to mapped and exec
resiedency of Virtual addresses.

Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
2023-05-24 20:41:20 +02:00
d236bcbba9 feature: add isTranslationExceptionSupported method
Related-To: NEO-7782

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-05-17 15:12:46 +02:00
425a2a6fa2 fix: set NotLockable flag when resource does not need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-15 16:47:21 +02:00
e0d3db3d91 fix: improve release helper
Related-To: NEO-7786
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-05-15 14:30:15 +02:00
57851a5d29 Revert "fix: set NotLockable flag when resource does not need to be lockable"
This reverts commit c597b03a33.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-05-14 04:55:30 +02:00
c597b03a33 fix: set NotLockable flag when resource does not need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-12 13:15:50 +02:00
9bf472839d Revert "fix: set NotLockable flag when resource does not need to be lockable"
This reverts commit 50c67a759e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-05-11 18:23:55 +02:00
50c67a759e fix: set NotLockable flag when resource does not need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-11 13:47:15 +02:00
c4a80e193a Revert "fix: set NotLockable flag when resource doesn't need to be lockable"
This reverts commit 7b2af39fd6.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-05-11 09:17:34 +02:00
7b2af39fd6 fix: set NotLockable flag when resource doesn't need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-10 10:16:24 +02:00
5d653c8536 fix: Add alignment support to createUnifiedMemoryAllocation
Allows the user to use alignments > 64KB in `createUnifiedMemoryAllocation`

So that the restriction in `piextUSMDeviceAlloc` of the DPC++ runtime
could be lifted

Related-To: LOCI-4168

Signed-off-by: Lu, Wenbin <wenbin.lu@intel.com>
2023-05-02 09:19:23 +02:00
cbce863dc2 refactor: Rename member variables to camelCase 3/n
Additionally enable clang-tidy check for member variables

Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-28 16:01:14 +02:00
e351a90f81 refactor: Rename member variables to camelCase 2/n
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-27 20:39:22 +02:00
2f9135a4e6 fix: change type of container with registered engines per root device
use StackVec instead of unordered map
resize container at MemoryManager's creation time

Related-To: NEO-7925
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-04-27 17:06:42 +02:00
e2e00413a8 Apply CamelCase for class and struct names
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-24 15:36:27 +02:00
685a579456 fix: check largeGrfMode in tests if supported
Related-To: NEO-7357

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-04-18 08:09:40 +02:00
e695059152 [perf] reduce host overhead in command list reset call
There is no need to reset all fields and load support flags every reset call.
Add dedicated calls that will reset values and dirty flags.
Call virtual methods only once at init time.

Related-To: NEO-7828

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-04-05 11:29:39 +02:00