Commit Graph

1783 Commits

Author SHA1 Message Date
15b9ec57d1 Revert "Enable Flush task by default for immediate commandlist"
This reverts commit 22bbce42dd.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-26 04:53:03 +01:00
e3ac89adbe Remove non-needed DEBUG_BREAK_IF
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-01-25 23:39:40 +01:00
dbf0f90186 Return pageSize in getMemAllocProperties
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-01-25 18:26:13 +01:00
6df17f5a30 [3/n] Optimize indirect allocations handling.
Add new debug variable to trigger new mode.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-25 16:40:56 +01:00
a12f9cb377 [2/n] Optimize indirect calls.
Migrate shared allocation when command list sets indirect flags.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-25 13:10:53 +01:00
22bbce42dd Enable Flush task by default for immediate commandlist
Related-To: LOCI-1988

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2022-01-25 01:12:30 +01:00
0c933d83af Update RENDER_SURFACE_STATE for Xe Hpc
For Xe Hp and later rename RSS tile mode enum from YMAJOR to TILE4

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-24 18:06:42 +01:00
c54633388d Release support for L0 v1.3
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-01-24 15:12:33 +01:00
1634ac9ec3 Revert "Dont generate gen file by default"
This reverts commit 95943dee0f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-24 14:46:29 +01:00
151aaf7678 Fix alignment for host allocations.
- it is 4k not 64k.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-24 13:24:03 +01:00
ad7f2f1f6e Notify kernel loads after copying fully linked ISA
- notify through make resident call

Related-To: NEO-6556

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-01-21 14:28:22 +01:00
715b9d31d2 Find sscanf alternative.
Used strtol() to write sscanfUtil to extraxt info of BDF pcipath.

Related-To: LOCI-1002

Signed-off-by: Ayush Pandey <ayush.pandey@intel.com>
2022-01-21 09:02:48 +01:00
6968bfdb33 Use correct enum values for sampler in clamp mode
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-01-20 18:15:53 +01:00
d9bf1886c2 Remove GMock from GMockMemoryManagerFailFirstAllocation, GMockMemoryManager...
Removed GMock from
- GMockMemoryManagerFailFirstAllocation
- GMockMemoryManager
- TestEventCsr
- MockKmdNotifyCsr
- MockMemoryOperationsHandlerTests
- GmockGmmMemory
- MockMemoryManagerCommandQueueSBA
- TestCmdQueueCsr

Renamed:
- GMockMemoryManagerFailFirstAllocation -> MockMemoryManagerFailFirstAllocation

Moved class body:
- GMockMemoryManager to MockMemoryManager
- GmockGmmMemory to MockGmmMemoryBase

Related-To: NEO-4914
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2022-01-20 16:08:34 +01:00
8aaa927869 Return default context for multi-tile device in low-priority queue
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-20 14:48:11 +01:00
6082865eb4 Revert "Optimize Level Zero indirect allocations handling."
This reverts commit 3ecbc55ba9.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-20 11:41:13 +01:00
d3d803cdb0 Enable Implicit Scaling on Level Zero
* This commits enables by default implicit scaling, but only on PVC B step
* Users can disable this feature by debug flag EnableImplicitScaling=0|

Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-19 19:13:43 +01:00
c724f35abb Fixed offsets in calculation for multidevices. Fixed metric types.
Related-To: LOCI-2870
Signed-off-by: Robert Krzemien <robert.krzemien@intel.com>
2022-01-19 17:10:09 +01:00
3ecbc55ba9 Optimize Level Zero indirect allocations handling.
Make them resident directly instead of populating residency container
Remove finds, not needed, CSR resolves duplicates at makeResident calls
Observed gain is 32x for 10k indirect allocations.


Co-authored-by: Michal Mrozek <michal.mrozek@intel.com>

Co-authored-by: Dominik Dabek <dominik.dabek@intel.com>

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-01-19 13:08:35 +01:00
8ebef3769c Update RENDER_SURFACE_STATE for Xe Hpg
Program Multi Gpu params in surface state only on Xe Hp Sdv
Respect zero-size image scenario when programming surface state
Move XeHp-only tests to dedicated subdir

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-18 21:06:14 +01:00
5f8913f291 ULT fix for pmt handle
Fixed failing ULTs  for the  pmt object created in map were not deleted

Related-To: LOCI-2835

Signed-off-by: Ayush Pandey <ayush.pandey@intel.com>
2022-01-18 16:35:28 +01:00
de9112d942 Simplify code - remove not needed static cast
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-01-18 14:29:06 +01:00
4238679078 Refactor implicit scaling device support
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-18 13:08:43 +01:00
40483acd17 Improve blitter programming
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-01-18 10:36:05 +01:00
95943dee0f Dont generate gen file by default
Ocloc can dump gen file when we add -gen_file flag to cmd.
Otherwise gen is not generated

Signed-off-by: Mateusz Borzyszkowski <mateusz.borzyszkowski@intel.com>
2022-01-17 18:14:50 +01:00
625575209a Add new test matcher
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-17 16:13:45 +01:00
e5a18177c5 Add unit test helper function to set pipe control hdc flush
Separate unit test helper definitions bdw_and_later / xe_hp_and_later

Related-To: NEO-6466

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-17 15:45:29 +01:00
fc224202d6 Create debug zebin in OCL
This commit adds debug zebin creation in OCL.
- Added returning debug zebin in build/linking paths in OCL if
corresponding device binary format was detected.
- Refactored getZebinSegments() method - added common ctor for both
L0/OCL paths

Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
2022-01-17 14:27:23 +01:00
d9aae805c7 Do not apply L0 debugger WA (Disable L3 cache) for highest DG2 steppings
Related-To: NEO-6320

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2022-01-17 13:46:40 +01:00
c36c083812 Refactor implicit scaling parameters for surface state
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-17 09:30:58 +01:00
b78bb26cbf Refactor partitioning of state base address
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-14 19:06:24 +01:00
504b49effa Add new unit test to command list compute barrier suite
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-14 16:15:36 +01:00
79bf9401ef Fallback to buildFromSpirV given < 2 static link targets
Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
2022-01-14 02:17:52 +01:00
9c4f05387b Refactor partitioning of dispatched kernels
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-13 22:54:07 +01:00
182042b04d Revert "Update default thread arbitration policy"
This reverts commit 8c3e9ace69.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-13 21:32:29 +01:00
8c3e9ace69 Update default thread arbitration policy
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-13 16:24:11 +01:00
201c3347ff Rename dispatchBlitCommandsRegion to dispatchBlitCommandsForImageRegion
As this function no longer applies to buffers it needed to be renamed.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2022-01-13 15:42:12 +01:00
caa19489fc Tweak dispatch kernel args structure
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-13 15:06:12 +01:00
9785ab7828 Refactor encode dispatch kernel class interface
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-13 12:08:38 +01:00
71746a2fff Register zebin binary in L0 debugger
Related-To: NEO-5571

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2022-01-12 23:17:59 +01:00
5b3e20a2aa Add some missing ULTs for device_imp.cpp
Related-To: LOCI-2834

Signed-off-by: Barigou, Youcef <youcef.barigou@intel.com>
2022-01-12 23:07:52 +01:00
e39a09e6db Unify core and product commandList structures
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-01-12 22:33:11 +01:00
394c0e90e1 Return error when failing on submission
Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
2022-01-12 16:42:30 +01:00
45ae4fe881 Remove device enqueue part 3
- isSchedulerKernel

Related-To: NEO-6559
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-01-12 13:50:18 +01:00
f182259a97 Return user size on zeMemGetAddressRange
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-01-11 23:12:23 +01:00
8030b7001c Fix magic value used to skip odd packets for timestamps
Related-To: LOCI-2718

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2022-01-11 20:21:52 +01:00
8729521769 Use dispatchBlitCommandsForBufferRegion when copying buffers in L0
First step to separate dispatch blit commands for buffers
from dispatch blit commands for images.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6134
2022-01-11 13:52:56 +01:00
b249c10e09 Revert "Add ze_eu_count_t to get total number of EUs"
This reverts commit 635c02e1ff.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-10 20:06:52 +01:00
5e626a15bf Add untyped flush to level zero barrier command
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-10 16:42:30 +01:00
26a24e8fde Query engine info with distances
If prelim kernel is being used, query distances
and set correctly number of available engines

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-01-10 13:30:26 +01:00